2 * Copyright (c) 2012 Ian Lepore
3 * Copyright (c) 2004 Olivier Houchard
4 * Copyright (c) 2002 Peter Grehan
5 * Copyright (c) 1997, 1998 Justin T. Gibbs.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions, and the following disclaimer,
13 * without modification, immediately at the beginning of the file.
14 * 2. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * From i386/busdma_machdep.c,v 1.26 2002/04/19 22:58:09 alfred
32 #include <sys/cdefs.h>
33 __FBSDID("$FreeBSD$");
36 * ARM bus dma support routines.
38 * XXX Things to investigate / fix some day...
39 * - What is the earliest that this API can be called? Could there be any
40 * fallout from changing the SYSINIT() order from SI_SUB_VM to SI_SUB_KMEM?
41 * - The manpage mentions the BUS_DMA_NOWAIT flag only in the context of the
42 * bus_dmamap_load() function. This code has historically (and still does)
43 * honor it in bus_dmamem_alloc(). If we got rid of that we could lose some
44 * error checking because some resource management calls would become WAITOK
45 * and thus "cannot fail."
46 * - The decisions made by _bus_dma_can_bounce() should be made once, at tag
47 * creation time, and the result stored in the tag.
48 * - It should be possible to take some shortcuts when mapping a buffer we know
49 * came from the uma(9) allocators based on what we know about such buffers
50 * (aligned, contiguous, etc).
51 * - The allocation of bounce pages could probably be cleaned up, then we could
52 * retire arm_remap_nocache().
55 #define _ARM32_BUS_DMA_PRIVATE
56 #include <sys/param.h>
57 #include <sys/systm.h>
58 #include <sys/malloc.h>
60 #include <sys/busdma_bufalloc.h>
61 #include <sys/counter.h>
62 #include <sys/interrupt.h>
63 #include <sys/kernel.h>
66 #include <sys/memdesc.h>
68 #include <sys/mutex.h>
69 #include <sys/sysctl.h>
73 #include <vm/vm_page.h>
74 #include <vm/vm_map.h>
75 #include <vm/vm_extern.h>
76 #include <vm/vm_kern.h>
78 #include <machine/atomic.h>
79 #include <machine/bus.h>
80 #include <machine/cpufunc.h>
81 #include <machine/md_var.h>
84 #define MAX_DMA_SEGMENTS 4096
85 #define BUS_DMA_COULD_BOUNCE BUS_DMA_BUS3
86 #define BUS_DMA_MIN_ALLOC_COMP BUS_DMA_BUS4
96 bus_dma_filter_t *filter;
104 bus_dma_lock_t *lockfunc;
106 struct bounce_zone *bounce_zone;
108 * DMA range for this tag. If the page doesn't fall within
109 * one of these ranges, an error is returned. The caller
110 * may then decide what to do with the transfer. If the
111 * range pointer is NULL, it is ignored.
113 struct arm32_dma_range *ranges;
118 vm_offset_t vaddr; /* kva of bounce buffer */
119 bus_addr_t busaddr; /* Physical address */
120 vm_offset_t datavaddr; /* kva of client data */
121 vm_page_t datapage; /* physical page of client data */
122 vm_offset_t dataoffs; /* page offset of client data */
123 bus_size_t datacount; /* client data count */
124 STAILQ_ENTRY(bounce_page) links;
128 vm_offset_t vaddr; /* kva of client data */
129 vm_page_t pages; /* starting page of client data */
130 vm_offset_t dataoffs; /* page offset of client data */
131 bus_size_t datacount; /* client data count */
134 int busdma_swi_pending;
137 STAILQ_ENTRY(bounce_zone) links;
138 STAILQ_HEAD(bp_list, bounce_page) bounce_page_list;
146 bus_size_t alignment;
150 struct sysctl_ctx_list sysctl_tree;
151 struct sysctl_oid *sysctl_tree_top;
154 static struct mtx bounce_lock;
155 static int total_bpages;
156 static int busdma_zonecount;
157 static uint32_t tags_total;
158 static uint32_t maps_total;
159 static uint32_t maps_dmamem;
160 static uint32_t maps_coherent;
161 static counter_u64_t maploads_total;
162 static counter_u64_t maploads_bounced;
163 static counter_u64_t maploads_coherent;
164 static counter_u64_t maploads_dmamem;
165 static counter_u64_t maploads_mbuf;
166 static counter_u64_t maploads_physmem;
168 static STAILQ_HEAD(, bounce_zone) bounce_zone_list;
170 SYSCTL_NODE(_hw, OID_AUTO, busdma, CTLFLAG_RD, 0, "Busdma parameters");
171 SYSCTL_UINT(_hw_busdma, OID_AUTO, tags_total, CTLFLAG_RD, &tags_total, 0,
172 "Number of active tags");
173 SYSCTL_UINT(_hw_busdma, OID_AUTO, maps_total, CTLFLAG_RD, &maps_total, 0,
174 "Number of active maps");
175 SYSCTL_UINT(_hw_busdma, OID_AUTO, maps_dmamem, CTLFLAG_RD, &maps_dmamem, 0,
176 "Number of active maps for bus_dmamem_alloc buffers");
177 SYSCTL_UINT(_hw_busdma, OID_AUTO, maps_coherent, CTLFLAG_RD, &maps_coherent, 0,
178 "Number of active maps with BUS_DMA_COHERENT flag set");
179 SYSCTL_COUNTER_U64(_hw_busdma, OID_AUTO, maploads_total, CTLFLAG_RD,
180 &maploads_total, "Number of load operations performed");
181 SYSCTL_COUNTER_U64(_hw_busdma, OID_AUTO, maploads_bounced, CTLFLAG_RD,
182 &maploads_bounced, "Number of load operations that used bounce buffers");
183 SYSCTL_COUNTER_U64(_hw_busdma, OID_AUTO, maploads_coherent, CTLFLAG_RD,
184 &maploads_dmamem, "Number of load operations on BUS_DMA_COHERENT memory");
185 SYSCTL_COUNTER_U64(_hw_busdma, OID_AUTO, maploads_dmamem, CTLFLAG_RD,
186 &maploads_dmamem, "Number of load operations on bus_dmamem_alloc buffers");
187 SYSCTL_COUNTER_U64(_hw_busdma, OID_AUTO, maploads_mbuf, CTLFLAG_RD,
188 &maploads_mbuf, "Number of load operations for mbufs");
189 SYSCTL_COUNTER_U64(_hw_busdma, OID_AUTO, maploads_physmem, CTLFLAG_RD,
190 &maploads_physmem, "Number of load operations on physical buffers");
191 SYSCTL_INT(_hw_busdma, OID_AUTO, total_bpages, CTLFLAG_RD, &total_bpages, 0,
192 "Total bounce pages");
195 struct bp_list bpages;
200 bus_dmamap_callback_t *callback;
203 #define DMAMAP_COHERENT (1 << 0)
204 #define DMAMAP_DMAMEM_ALLOC (1 << 1)
205 #define DMAMAP_MBUF (1 << 2)
206 #define DMAMAP_CACHE_ALIGNED (1 << 3)
207 STAILQ_ENTRY(bus_dmamap) links;
208 bus_dma_segment_t *segments;
210 struct sync_list slist[];
213 static STAILQ_HEAD(, bus_dmamap) bounce_map_waitinglist;
214 static STAILQ_HEAD(, bus_dmamap) bounce_map_callbacklist;
216 static void init_bounce_pages(void *dummy);
217 static int alloc_bounce_zone(bus_dma_tag_t dmat);
218 static int alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages);
219 static int reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map,
221 static bus_addr_t add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map,
222 vm_offset_t vaddr, bus_addr_t addr, bus_size_t size);
223 static void free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage);
224 static void bus_dmamap_sync_sl(struct sync_list *sl, bus_dmasync_op_t op,
228 * ----------------------------------------------------------------------------
229 * Begin block of code useful to transplant to other implementations.
232 static busdma_bufalloc_t coherent_allocator; /* Cache of coherent buffers */
233 static busdma_bufalloc_t standard_allocator; /* Cache of standard buffers */
235 MALLOC_DEFINE(M_BUSDMA, "busdma", "busdma metadata");
236 MALLOC_DEFINE(M_BOUNCE, "bounce", "busdma bounce pages");
239 busdma_init(void *dummy)
242 maploads_total = counter_u64_alloc(M_WAITOK);
243 maploads_bounced = counter_u64_alloc(M_WAITOK);
244 maploads_coherent = counter_u64_alloc(M_WAITOK);
245 maploads_dmamem = counter_u64_alloc(M_WAITOK);
246 maploads_mbuf = counter_u64_alloc(M_WAITOK);
247 maploads_physmem = counter_u64_alloc(M_WAITOK);
249 /* Create a cache of buffers in standard (cacheable) memory. */
250 standard_allocator = busdma_bufalloc_create("buffer",
251 arm_dcache_align, /* minimum_alignment */
252 NULL, /* uma_alloc func */
253 NULL, /* uma_free func */
254 0); /* uma_zcreate_flags */
257 * Create a cache of buffers in uncacheable memory, to implement the
258 * BUS_DMA_COHERENT (and potentially BUS_DMA_NOCACHE) flag.
260 coherent_allocator = busdma_bufalloc_create("coherent",
261 arm_dcache_align, /* minimum_alignment */
262 busdma_bufalloc_alloc_uncacheable,
263 busdma_bufalloc_free_uncacheable,
264 0); /* uma_zcreate_flags */
268 * This init historically used SI_SUB_VM, but now the init code requires
269 * malloc(9) using M_BUSDMA memory and the pcpu zones for counter(9), which get
270 * set up by SI_SUB_KMEM and SI_ORDER_LAST, so we'll go right after that by
271 * using SI_SUB_KMEM+1.
273 SYSINIT(busdma, SI_SUB_KMEM+1, SI_ORDER_FIRST, busdma_init, NULL);
276 * End block of code useful to transplant to other implementations.
277 * ----------------------------------------------------------------------------
281 * Return true if a match is made.
283 * To find a match walk the chain of bus_dma_tag_t's looking for 'paddr'.
285 * If paddr is within the bounds of the dma tag then call the filter callback
286 * to check for a match, if there is no filter callback then assume a match.
289 run_filter(bus_dma_tag_t dmat, bus_addr_t paddr)
296 if (((paddr > dmat->lowaddr && paddr <= dmat->highaddr)
297 || ((paddr & (dmat->alignment - 1)) != 0))
298 && (dmat->filter == NULL
299 || (*dmat->filter)(dmat->filterarg, paddr) != 0))
303 } while (retval == 0 && dmat != NULL);
308 * This routine checks the exclusion zone constraints from a tag against the
309 * physical RAM available on the machine. If a tag specifies an exclusion zone
310 * but there's no RAM in that zone, then we avoid allocating resources to bounce
311 * a request, and we can use any memory allocator (as opposed to needing
312 * kmem_alloc_contig() just because it can allocate pages in an address range).
314 * Most tags have BUS_SPACE_MAXADDR or BUS_SPACE_MAXADDR_32BIT (they are the
315 * same value on 32-bit architectures) as their lowaddr constraint, and we can't
316 * possibly have RAM at an address higher than the highest address we can
317 * express, so we take a fast out.
320 _bus_dma_can_bounce(vm_offset_t lowaddr, vm_offset_t highaddr)
324 if (lowaddr >= BUS_SPACE_MAXADDR)
327 for (i = 0; phys_avail[i] && phys_avail[i + 1]; i += 2) {
328 if ((lowaddr >= phys_avail[i] && lowaddr <= phys_avail[i + 1])
329 || (lowaddr < phys_avail[i] &&
330 highaddr > phys_avail[i]))
336 static __inline struct arm32_dma_range *
337 _bus_dma_inrange(struct arm32_dma_range *ranges, int nranges,
340 struct arm32_dma_range *dr;
343 for (i = 0, dr = ranges; i < nranges; i++, dr++) {
344 if (curaddr >= dr->dr_sysbase &&
345 round_page(curaddr) <= (dr->dr_sysbase + dr->dr_len))
353 * Convenience function for manipulating driver locks from busdma (during
354 * busdma_swi, for example). Drivers that don't provide their own locks
355 * should specify &Giant to dmat->lockfuncarg. Drivers that use their own
356 * non-mutex locking scheme don't have to use this at all.
359 busdma_lock_mutex(void *arg, bus_dma_lock_op_t op)
363 dmtx = (struct mtx *)arg;
372 panic("Unknown operation 0x%x for busdma_lock_mutex!", op);
377 * dflt_lock should never get called. It gets put into the dma tag when
378 * lockfunc == NULL, which is only valid if the maps that are associated
379 * with the tag are meant to never be defered.
380 * XXX Should have a way to identify which driver is responsible here.
383 dflt_lock(void *arg, bus_dma_lock_op_t op)
386 panic("driver error: busdma dflt_lock called");
388 printf("DRIVER_ERROR: busdma dflt_lock called\n");
393 * Allocate a device specific dma_tag.
396 bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment,
397 bus_addr_t boundary, bus_addr_t lowaddr, bus_addr_t highaddr,
398 bus_dma_filter_t *filter, void *filterarg, bus_size_t maxsize,
399 int nsegments, bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc,
400 void *lockfuncarg, bus_dma_tag_t *dmat)
402 bus_dma_tag_t newtag;
404 /* Return a NULL tag on failure */
407 newtag = (bus_dma_tag_t)malloc(sizeof(*newtag), M_BUSDMA, M_NOWAIT);
408 if (newtag == NULL) {
409 CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d",
410 __func__, newtag, 0, error);
414 newtag->parent = parent;
415 newtag->alignment = alignment ? alignment : 1;
416 newtag->boundary = boundary;
417 newtag->lowaddr = trunc_page((vm_offset_t)lowaddr) + (PAGE_SIZE - 1);
418 newtag->highaddr = trunc_page((vm_offset_t)highaddr) + (PAGE_SIZE - 1);
419 newtag->filter = filter;
420 newtag->filterarg = filterarg;
421 newtag->maxsize = maxsize;
422 newtag->nsegments = nsegments;
423 newtag->maxsegsz = maxsegsz;
424 newtag->flags = flags;
425 newtag->ref_count = 1; /* Count ourself */
426 newtag->map_count = 0;
427 newtag->ranges = bus_dma_get_range();
428 newtag->_nranges = bus_dma_get_range_nb();
429 if (lockfunc != NULL) {
430 newtag->lockfunc = lockfunc;
431 newtag->lockfuncarg = lockfuncarg;
433 newtag->lockfunc = dflt_lock;
434 newtag->lockfuncarg = NULL;
437 /* Take into account any restrictions imposed by our parent tag */
438 if (parent != NULL) {
439 newtag->lowaddr = MIN(parent->lowaddr, newtag->lowaddr);
440 newtag->highaddr = MAX(parent->highaddr, newtag->highaddr);
441 if (newtag->boundary == 0)
442 newtag->boundary = parent->boundary;
443 else if (parent->boundary != 0)
444 newtag->boundary = MIN(parent->boundary,
446 if ((newtag->filter != NULL) ||
447 ((parent->flags & BUS_DMA_COULD_BOUNCE) != 0))
448 newtag->flags |= BUS_DMA_COULD_BOUNCE;
449 if (newtag->filter == NULL) {
451 * Short circuit looking at our parent directly
452 * since we have encapsulated all of its information
454 newtag->filter = parent->filter;
455 newtag->filterarg = parent->filterarg;
456 newtag->parent = parent->parent;
458 if (newtag->parent != NULL)
459 atomic_add_int(&parent->ref_count, 1);
461 if (_bus_dma_can_bounce(newtag->lowaddr, newtag->highaddr)
462 || newtag->alignment > 1)
463 newtag->flags |= BUS_DMA_COULD_BOUNCE;
465 if (((newtag->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
466 (flags & BUS_DMA_ALLOCNOW) != 0) {
467 struct bounce_zone *bz;
471 if ((error = alloc_bounce_zone(newtag)) != 0) {
472 free(newtag, M_BUSDMA);
475 bz = newtag->bounce_zone;
477 if (ptoa(bz->total_bpages) < maxsize) {
480 pages = atop(maxsize) - bz->total_bpages;
482 /* Add pages to our bounce pool */
483 if (alloc_bounce_pages(newtag, pages) < pages)
486 /* Performed initial allocation */
487 newtag->flags |= BUS_DMA_MIN_ALLOC_COMP;
489 newtag->bounce_zone = NULL;
492 free(newtag, M_BUSDMA);
494 atomic_add_32(&tags_total, 1);
497 CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d",
498 __func__, newtag, (newtag != NULL ? newtag->flags : 0), error);
503 bus_dma_tag_set_domain(bus_dma_tag_t dmat, int domain)
510 bus_dma_tag_destroy(bus_dma_tag_t dmat)
512 bus_dma_tag_t dmat_copy;
520 if (dmat->map_count != 0) {
525 while (dmat != NULL) {
526 bus_dma_tag_t parent;
528 parent = dmat->parent;
529 atomic_subtract_int(&dmat->ref_count, 1);
530 if (dmat->ref_count == 0) {
531 atomic_subtract_32(&tags_total, 1);
532 free(dmat, M_BUSDMA);
534 * Last reference count, so
535 * release our reference
536 * count on our parent.
544 CTR3(KTR_BUSDMA, "%s tag %p error %d", __func__, dmat_copy, error);
549 allocate_bz_and_pages(bus_dma_tag_t dmat, bus_dmamap_t map)
554 * Bouncing might be required if the driver asks for an active
555 * exclusion region, a data alignment that is stricter than 1, and/or
556 * an active address boundary.
558 if (dmat->flags & BUS_DMA_COULD_BOUNCE) {
561 struct bounce_zone *bz;
564 if (dmat->bounce_zone == NULL) {
565 if ((error = alloc_bounce_zone(dmat)) != 0) {
569 bz = dmat->bounce_zone;
571 /* Initialize the new map */
572 STAILQ_INIT(&(map->bpages));
575 * Attempt to add pages to our pool on a per-instance
576 * basis up to a sane limit.
578 maxpages = MAX_BPAGES;
579 if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0
580 || (bz->map_count > 0 && bz->total_bpages < maxpages)) {
583 pages = MAX(atop(dmat->maxsize), 1);
584 pages = MIN(maxpages - bz->total_bpages, pages);
585 pages = MAX(pages, 1);
586 if (alloc_bounce_pages(dmat, pages) < pages)
589 if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0)
590 dmat->flags |= BUS_DMA_MIN_ALLOC_COMP;
598 allocate_map(bus_dma_tag_t dmat, int mflags)
600 int mapsize, segsize;
604 * Allocate the map. The map structure ends with an embedded
605 * variable-sized array of sync_list structures. Following that
606 * we allocate enough extra space to hold the array of bus_dma_segments.
608 KASSERT(dmat->nsegments <= MAX_DMA_SEGMENTS,
609 ("cannot allocate %u dma segments (max is %u)",
610 dmat->nsegments, MAX_DMA_SEGMENTS));
611 segsize = sizeof(struct bus_dma_segment) * dmat->nsegments;
612 mapsize = sizeof(*map) + sizeof(struct sync_list) * dmat->nsegments;
613 map = malloc(mapsize + segsize, M_BUSDMA, mflags | M_ZERO);
615 CTR3(KTR_BUSDMA, "%s: tag %p error %d", __func__, dmat, ENOMEM);
618 map->segments = (bus_dma_segment_t *)((uintptr_t)map + mapsize);
623 * Allocate a handle for mapping from kva/uva/physical
624 * address space into bus device space.
627 bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp)
632 *mapp = map = allocate_map(dmat, M_NOWAIT);
634 CTR3(KTR_BUSDMA, "%s: tag %p error %d", __func__, dmat, ENOMEM);
639 * Bouncing might be required if the driver asks for an exclusion
640 * region, a data alignment that is stricter than 1, or DMA that begins
641 * or ends with a partial cacheline. Whether bouncing will actually
642 * happen can't be known until mapping time, but we need to pre-allocate
643 * resources now because we might not be allowed to at mapping time.
645 error = allocate_bz_and_pages(dmat, map);
651 if (map->flags & DMAMAP_COHERENT)
652 atomic_add_32(&maps_coherent, 1);
653 atomic_add_32(&maps_total, 1);
660 * Destroy a handle for mapping from kva/uva/physical
661 * address space into bus device space.
664 bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map)
667 if (STAILQ_FIRST(&map->bpages) != NULL || map->sync_count != 0) {
668 CTR3(KTR_BUSDMA, "%s: tag %p error %d",
669 __func__, dmat, EBUSY);
672 if (dmat->bounce_zone)
673 dmat->bounce_zone->map_count--;
674 if (map->flags & DMAMAP_COHERENT)
675 atomic_subtract_32(&maps_coherent, 1);
676 atomic_subtract_32(&maps_total, 1);
679 CTR2(KTR_BUSDMA, "%s: tag %p error 0", __func__, dmat);
684 * Allocate a piece of memory that can be efficiently mapped into bus device
685 * space based on the constraints listed in the dma tag. Returns a pointer to
686 * the allocated memory, and a pointer to an associated bus_dmamap.
689 bus_dmamem_alloc(bus_dma_tag_t dmat, void **vaddr, int flags,
692 busdma_bufalloc_t ba;
693 struct busdma_bufzone *bufzone;
695 vm_memattr_t memattr;
698 if (flags & BUS_DMA_NOWAIT)
702 if (flags & BUS_DMA_ZERO)
705 *mapp = map = allocate_map(dmat, mflags);
707 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
708 __func__, dmat, dmat->flags, ENOMEM);
711 map->flags = DMAMAP_DMAMEM_ALLOC;
713 /* Choose a busdma buffer allocator based on memory type flags. */
714 if (flags & BUS_DMA_COHERENT) {
715 memattr = VM_MEMATTR_UNCACHEABLE;
716 ba = coherent_allocator;
717 map->flags |= DMAMAP_COHERENT;
719 memattr = VM_MEMATTR_DEFAULT;
720 ba = standard_allocator;
724 * Try to find a bufzone in the allocator that holds a cache of buffers
725 * of the right size for this request. If the buffer is too big to be
726 * held in the allocator cache, this returns NULL.
728 bufzone = busdma_bufalloc_findzone(ba, dmat->maxsize);
731 * Allocate the buffer from the uma(9) allocator if...
732 * - It's small enough to be in the allocator (bufzone not NULL).
733 * - The alignment constraint isn't larger than the allocation size
734 * (the allocator aligns buffers to their size boundaries).
735 * - There's no need to handle lowaddr/highaddr exclusion zones.
736 * else allocate non-contiguous pages if...
737 * - The page count that could get allocated doesn't exceed nsegments.
738 * - The alignment constraint isn't larger than a page boundary.
739 * - There are no boundary-crossing constraints.
740 * else allocate a block of contiguous pages because one or more of the
741 * constraints is something that only the contig allocator can fulfill.
743 if (bufzone != NULL && dmat->alignment <= bufzone->size &&
744 !_bus_dma_can_bounce(dmat->lowaddr, dmat->highaddr)) {
745 *vaddr = uma_zalloc(bufzone->umazone, mflags);
746 } else if (dmat->nsegments >=
747 howmany(dmat->maxsize, MIN(dmat->maxsegsz, PAGE_SIZE)) &&
748 dmat->alignment <= PAGE_SIZE &&
749 (dmat->boundary % PAGE_SIZE) == 0) {
750 *vaddr = (void *)kmem_alloc_attr(dmat->maxsize, mflags, 0,
751 dmat->lowaddr, memattr);
753 *vaddr = (void *)kmem_alloc_contig(dmat->maxsize, mflags, 0,
754 dmat->lowaddr, dmat->alignment, dmat->boundary, memattr);
756 if (*vaddr == NULL) {
757 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
758 __func__, dmat, dmat->flags, ENOMEM);
763 if (map->flags & DMAMAP_COHERENT)
764 atomic_add_32(&maps_coherent, 1);
765 atomic_add_32(&maps_dmamem, 1);
766 atomic_add_32(&maps_total, 1);
769 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
770 __func__, dmat, dmat->flags, 0);
775 * Free a piece of memory that was allocated via bus_dmamem_alloc, along with
776 * its associated map.
779 bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map)
781 struct busdma_bufzone *bufzone;
782 busdma_bufalloc_t ba;
784 if (map->flags & DMAMAP_COHERENT)
785 ba = coherent_allocator;
787 ba = standard_allocator;
789 bufzone = busdma_bufalloc_findzone(ba, dmat->maxsize);
791 if (bufzone != NULL && dmat->alignment <= bufzone->size &&
792 !_bus_dma_can_bounce(dmat->lowaddr, dmat->highaddr))
793 uma_zfree(bufzone->umazone, vaddr);
795 kmem_free(kernel_arena, (vm_offset_t)vaddr, dmat->maxsize);
798 if (map->flags & DMAMAP_COHERENT)
799 atomic_subtract_32(&maps_coherent, 1);
800 atomic_subtract_32(&maps_total, 1);
801 atomic_subtract_32(&maps_dmamem, 1);
803 CTR3(KTR_BUSDMA, "%s: tag %p flags 0x%x", __func__, dmat, dmat->flags);
807 _bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_t map, vm_paddr_t buf,
808 bus_size_t buflen, int flags)
813 if (map->pagesneeded == 0) {
814 CTR3(KTR_BUSDMA, "lowaddr= %d, boundary= %d, alignment= %d",
815 dmat->lowaddr, dmat->boundary, dmat->alignment);
816 CTR2(KTR_BUSDMA, "map= %p, pagesneeded= %d",
817 map, map->pagesneeded);
819 * Count the number of bounce pages
820 * needed in order to complete this transfer
823 while (buflen != 0) {
824 sgsize = MIN(buflen, dmat->maxsegsz);
825 if (run_filter(dmat, curaddr) != 0) {
827 PAGE_SIZE - (curaddr & PAGE_MASK));
833 CTR1(KTR_BUSDMA, "pagesneeded= %d\n", map->pagesneeded);
838 _bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map, pmap_t pmap,
839 void *buf, bus_size_t buflen, int flags)
842 vm_offset_t vendaddr;
845 if (map->pagesneeded == 0) {
846 CTR3(KTR_BUSDMA, "lowaddr= %d, boundary= %d, alignment= %d",
847 dmat->lowaddr, dmat->boundary, dmat->alignment);
848 CTR2(KTR_BUSDMA, "map= %p, pagesneeded= %d",
849 map, map->pagesneeded);
851 * Count the number of bounce pages
852 * needed in order to complete this transfer
854 vaddr = trunc_page((vm_offset_t)buf);
855 vendaddr = (vm_offset_t)buf + buflen;
857 while (vaddr < vendaddr) {
858 if (__predict_true(pmap == kernel_pmap))
859 paddr = pmap_kextract(vaddr);
861 paddr = pmap_extract(pmap, vaddr);
862 if (run_filter(dmat, paddr) != 0)
866 CTR1(KTR_BUSDMA, "pagesneeded= %d\n", map->pagesneeded);
871 _bus_dmamap_reserve_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int flags)
874 /* Reserve Necessary Bounce Pages */
875 mtx_lock(&bounce_lock);
876 if (flags & BUS_DMA_NOWAIT) {
877 if (reserve_bounce_pages(dmat, map, 0) != 0) {
878 mtx_unlock(&bounce_lock);
882 if (reserve_bounce_pages(dmat, map, 1) != 0) {
883 /* Queue us for resources */
884 STAILQ_INSERT_TAIL(&bounce_map_waitinglist, map, links);
885 mtx_unlock(&bounce_lock);
886 return (EINPROGRESS);
889 mtx_unlock(&bounce_lock);
895 * Add a single contiguous physical range to the segment list.
898 _bus_dmamap_addseg(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t curaddr,
899 bus_size_t sgsize, bus_dma_segment_t *segs, int *segp)
901 bus_addr_t baddr, bmask;
905 * Make sure we don't cross any boundaries.
907 bmask = ~(dmat->boundary - 1);
908 if (dmat->boundary > 0) {
909 baddr = (curaddr + dmat->boundary) & bmask;
910 if (sgsize > (baddr - curaddr))
911 sgsize = (baddr - curaddr);
914 struct arm32_dma_range *dr;
916 dr = _bus_dma_inrange(dmat->ranges, dmat->_nranges,
921 * In a valid DMA range. Translate the physical
922 * memory address to an address in the DMA window.
924 curaddr = (curaddr - dr->dr_sysbase) + dr->dr_busbase;
930 * Insert chunk into a segment, coalescing with
931 * the previous segment if possible.
934 curaddr == segs[seg].ds_addr + segs[seg].ds_len &&
935 (segs[seg].ds_len + sgsize) <= dmat->maxsegsz &&
936 (dmat->boundary == 0 ||
937 (segs[seg].ds_addr & bmask) == (curaddr & bmask))) {
938 segs[seg].ds_len += sgsize;
940 if (++seg >= dmat->nsegments)
942 segs[seg].ds_addr = curaddr;
943 segs[seg].ds_len = sgsize;
950 * Utility function to load a physical buffer. segp contains
951 * the starting segment on entrace, and the ending segment on exit.
954 _bus_dmamap_load_phys(bus_dma_tag_t dmat, bus_dmamap_t map, vm_paddr_t buf,
955 bus_size_t buflen, int flags, bus_dma_segment_t *segs, int *segp)
958 bus_addr_t sl_end = 0;
960 struct sync_list *sl;
964 segs = map->segments;
966 counter_u64_add(maploads_total, 1);
967 counter_u64_add(maploads_physmem, 1);
969 if ((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) {
970 _bus_dmamap_count_phys(dmat, map, buf, buflen, flags);
971 if (map->pagesneeded != 0) {
972 counter_u64_add(maploads_bounced, 1);
973 error = _bus_dmamap_reserve_pages(dmat, map, flags);
979 sl = map->slist + map->sync_count - 1;
983 sgsize = MIN(buflen, dmat->maxsegsz);
984 if (((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
985 map->pagesneeded != 0 && run_filter(dmat, curaddr)) {
986 sgsize = MIN(sgsize, PAGE_SIZE - (curaddr & PAGE_MASK));
987 curaddr = add_bounce_page(dmat, map, 0, curaddr,
990 if (map->sync_count > 0)
991 sl_end = VM_PAGE_TO_PHYS(sl->pages) +
992 sl->dataoffs + sl->datacount;
994 if (map->sync_count == 0 || curaddr != sl_end) {
995 if (++map->sync_count > dmat->nsegments)
999 sl->datacount = sgsize;
1000 sl->pages = PHYS_TO_VM_PAGE(curaddr);
1001 sl->dataoffs = curaddr & PAGE_MASK;
1003 sl->datacount += sgsize;
1005 sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs,
1017 bus_dmamap_unload(dmat, map);
1018 return (EFBIG); /* XXX better return value here? */
1024 _bus_dmamap_load_ma(bus_dma_tag_t dmat, bus_dmamap_t map,
1025 struct vm_page **ma, bus_size_t tlen, int ma_offs, int flags,
1026 bus_dma_segment_t *segs, int *segp)
1029 return (bus_dmamap_load_ma_triv(dmat, map, ma, tlen, ma_offs, flags,
1034 * Utility function to load a linear buffer. segp contains
1035 * the starting segment on entrance, and the ending segment on exit.
1038 _bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf,
1039 bus_size_t buflen, struct pmap *pmap, int flags, bus_dma_segment_t *segs,
1044 bus_addr_t sl_pend = 0;
1045 struct sync_list *sl;
1047 vm_offset_t vaddr = (vm_offset_t)buf;
1048 vm_offset_t sl_vend = 0;
1051 counter_u64_add(maploads_total, 1);
1052 if (map->flags & DMAMAP_COHERENT)
1053 counter_u64_add(maploads_coherent, 1);
1054 if (map->flags & DMAMAP_DMAMEM_ALLOC)
1055 counter_u64_add(maploads_dmamem, 1);
1058 segs = map->segments;
1059 if (flags & BUS_DMA_LOAD_MBUF) {
1060 counter_u64_add(maploads_mbuf, 1);
1061 map->flags |= DMAMAP_CACHE_ALIGNED;
1064 if ((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) {
1065 _bus_dmamap_count_pages(dmat, map, pmap, buf, buflen, flags);
1066 if (map->pagesneeded != 0) {
1067 counter_u64_add(maploads_bounced, 1);
1068 error = _bus_dmamap_reserve_pages(dmat, map, flags);
1073 CTR3(KTR_BUSDMA, "lowaddr= %d boundary= %d, "
1074 "alignment= %d", dmat->lowaddr, dmat->boundary, dmat->alignment);
1076 sl = map->slist + map->sync_count - 1;
1078 while (buflen > 0) {
1080 * Get the physical address for this segment.
1082 if (__predict_true(pmap == kernel_pmap)) {
1083 curaddr = pmap_kextract(vaddr);
1086 curaddr = pmap_extract(pmap, vaddr);
1087 map->flags &= ~DMAMAP_COHERENT;
1092 * Compute the segment size, and adjust counts.
1094 sgsize = PAGE_SIZE - (curaddr & PAGE_MASK);
1095 if (sgsize > dmat->maxsegsz)
1096 sgsize = dmat->maxsegsz;
1097 if (buflen < sgsize)
1100 if (((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
1101 map->pagesneeded != 0 && run_filter(dmat, curaddr)) {
1102 curaddr = add_bounce_page(dmat, map, kvaddr, curaddr,
1105 if (map->sync_count > 0) {
1106 sl_pend = VM_PAGE_TO_PHYS(sl->pages) +
1107 sl->dataoffs + sl->datacount;
1108 sl_vend = sl->vaddr + sl->datacount;
1111 if (map->sync_count == 0 ||
1112 (kvaddr != 0 && kvaddr != sl_vend) ||
1113 (kvaddr == 0 && curaddr != sl_pend)) {
1115 if (++map->sync_count > dmat->nsegments)
1119 sl->datacount = sgsize;
1120 sl->pages = PHYS_TO_VM_PAGE(curaddr);
1121 sl->dataoffs = curaddr & PAGE_MASK;
1123 sl->datacount += sgsize;
1125 sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs,
1138 bus_dmamap_unload(dmat, map);
1139 return (EFBIG); /* XXX better return value here? */
1145 _bus_dmamap_waitok(bus_dma_tag_t dmat, bus_dmamap_t map, struct memdesc *mem,
1146 bus_dmamap_callback_t *callback, void *callback_arg)
1149 KASSERT(dmat != NULL, ("dmatag is NULL"));
1150 KASSERT(map != NULL, ("dmamap is NULL"));
1152 map->callback = callback;
1153 map->callback_arg = callback_arg;
1157 _bus_dmamap_complete(bus_dma_tag_t dmat, bus_dmamap_t map,
1158 bus_dma_segment_t *segs, int nsegs, int error)
1162 segs = map->segments;
1167 * Release the mapping held by map.
1170 bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map)
1172 struct bounce_page *bpage;
1173 struct bounce_zone *bz;
1175 if ((bz = dmat->bounce_zone) != NULL) {
1176 while ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) {
1177 STAILQ_REMOVE_HEAD(&map->bpages, links);
1178 free_bounce_page(dmat, bpage);
1181 bz = dmat->bounce_zone;
1182 bz->free_bpages += map->pagesreserved;
1183 bz->reserved_bpages -= map->pagesreserved;
1184 map->pagesreserved = 0;
1185 map->pagesneeded = 0;
1187 map->sync_count = 0;
1188 map->flags &= ~DMAMAP_MBUF;
1192 bus_dmamap_sync_buf(vm_offset_t buf, int len, bus_dmasync_op_t op,
1195 char _tmp_cl[arm_dcache_align], _tmp_clend[arm_dcache_align];
1199 if ((op & BUS_DMASYNC_PREWRITE) && !(op & BUS_DMASYNC_PREREAD)) {
1200 cpu_dcache_wb_range(buf, len);
1201 cpu_l2cache_wb_range(buf, len);
1205 * If the caller promises the buffer is properly aligned to a cache line
1206 * (even if the call parms make it look like it isn't) we can avoid
1207 * attempting to preserve the non-DMA part of the cache line in the
1208 * POSTREAD case, but we MUST still do a writeback in the PREREAD case.
1210 * This covers the case of mbufs, where we know how they're aligned and
1211 * know the CPU doesn't touch the header in front of the DMA data area
1212 * during the IO, but it may have touched it right before invoking the
1213 * sync, so a PREREAD writeback is required.
1215 * It also handles buffers we created in bus_dmamem_alloc(), which are
1216 * always aligned and padded to cache line size even if the IO length
1217 * isn't a multiple of cache line size. In this case the PREREAD
1218 * writeback probably isn't required, but it's harmless.
1220 partial = (((vm_offset_t)buf) | len) & arm_dcache_align_mask;
1222 if (op & BUS_DMASYNC_PREREAD) {
1223 if (!(op & BUS_DMASYNC_PREWRITE) && !partial) {
1224 cpu_dcache_inv_range(buf, len);
1225 cpu_l2cache_inv_range(buf, len);
1227 cpu_dcache_wbinv_range(buf, len);
1228 cpu_l2cache_wbinv_range(buf, len);
1231 if (op & BUS_DMASYNC_POSTREAD) {
1232 if (partial && !bufaligned) {
1234 if (buf & arm_dcache_align_mask)
1235 memcpy(_tmp_cl, (void *)(buf &
1236 ~arm_dcache_align_mask),
1237 buf & arm_dcache_align_mask);
1238 if ((buf + len) & arm_dcache_align_mask)
1240 (void *)(buf + len),
1242 ((buf + len) & arm_dcache_align_mask));
1244 cpu_dcache_inv_range(buf, len);
1245 cpu_l2cache_inv_range(buf, len);
1246 if (partial && !bufaligned) {
1247 if (buf & arm_dcache_align_mask)
1248 memcpy((void *)(buf &
1249 ~arm_dcache_align_mask), _tmp_cl,
1250 buf & arm_dcache_align_mask);
1251 if ((buf + len) & arm_dcache_align_mask)
1252 memcpy((void *)(buf + len),
1253 _tmp_clend, arm_dcache_align -
1254 ((buf + len) & arm_dcache_align_mask));
1261 bus_dmamap_sync_sl(struct sync_list *sl, bus_dmasync_op_t op,
1264 vm_offset_t tempvaddr;
1268 if (sl->vaddr != 0) {
1269 bus_dmamap_sync_buf(sl->vaddr, sl->datacount, op, bufaligned);
1274 npages = atop(round_page(sl->dataoffs + sl->datacount));
1276 for (curpage = sl->pages; curpage != sl->pages + npages; ++curpage) {
1278 * If the page is mapped to some other VA that hasn't
1279 * been supplied to busdma, then pmap_quick_enter_page()
1280 * will find all duplicate mappings and mark them
1282 * That will also do any necessary wb/inv. Otherwise,
1283 * if the page is truly unmapped, then we don't actually
1284 * need to do cache maintenance.
1285 * XXX: May overwrite DMA'ed data in the POSTREAD
1286 * case where the CPU has written to a cacheline not
1287 * completely covered by the DMA region.
1289 KASSERT(VM_PAGE_TO_PHYS(curpage) == VM_PAGE_TO_PHYS(sl->pages) +
1290 ptoa(curpage - sl->pages),
1291 ("unexpected vm_page_t phys: 0x%08x != 0x%08x",
1292 VM_PAGE_TO_PHYS(curpage), VM_PAGE_TO_PHYS(sl->pages) +
1293 ptoa(curpage - sl->pages)));
1294 tempvaddr = pmap_quick_enter_page(curpage);
1295 pmap_quick_remove_page(tempvaddr);
1300 _bus_dmamap_sync_bp(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op)
1302 struct bounce_page *bpage;
1303 vm_offset_t datavaddr, tempvaddr;
1305 if ((op & (BUS_DMASYNC_PREWRITE | BUS_DMASYNC_POSTREAD)) == 0)
1308 STAILQ_FOREACH(bpage, &map->bpages, links) {
1310 datavaddr = bpage->datavaddr;
1311 if (op & BUS_DMASYNC_PREWRITE) {
1312 if (datavaddr == 0) {
1314 pmap_quick_enter_page(bpage->datapage);
1315 datavaddr = tempvaddr | bpage->dataoffs;
1317 bcopy((void *)datavaddr,
1318 (void *)bpage->vaddr, bpage->datacount);
1320 pmap_quick_remove_page(tempvaddr);
1321 cpu_dcache_wb_range(bpage->vaddr, bpage->datacount);
1322 cpu_l2cache_wb_range(bpage->vaddr, bpage->datacount);
1323 dmat->bounce_zone->total_bounced++;
1325 if (op & BUS_DMASYNC_POSTREAD) {
1326 cpu_dcache_inv_range(bpage->vaddr, bpage->datacount);
1327 cpu_l2cache_inv_range(bpage->vaddr, bpage->datacount);
1328 if (datavaddr == 0) {
1330 pmap_quick_enter_page(bpage->datapage);
1331 datavaddr = tempvaddr | bpage->dataoffs;
1333 bcopy((void *)bpage->vaddr,
1334 (void *)datavaddr, bpage->datacount);
1336 pmap_quick_remove_page(tempvaddr);
1337 dmat->bounce_zone->total_bounced++;
1343 bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op)
1345 struct sync_list *sl, *end;
1348 if (op == BUS_DMASYNC_POSTWRITE)
1350 if (map->flags & DMAMAP_COHERENT)
1352 if (STAILQ_FIRST(&map->bpages))
1353 _bus_dmamap_sync_bp(dmat, map, op);
1354 CTR3(KTR_BUSDMA, "%s: op %x flags %x", __func__, op, map->flags);
1355 bufaligned = (map->flags & DMAMAP_CACHE_ALIGNED);
1356 if (map->sync_count) {
1357 end = &map->slist[map->sync_count];
1358 for (sl = &map->slist[0]; sl != end; sl++)
1359 bus_dmamap_sync_sl(sl, op, bufaligned);
1364 cpu_drain_writebuf();
1368 init_bounce_pages(void *dummy __unused)
1372 STAILQ_INIT(&bounce_zone_list);
1373 STAILQ_INIT(&bounce_map_waitinglist);
1374 STAILQ_INIT(&bounce_map_callbacklist);
1375 mtx_init(&bounce_lock, "bounce pages lock", NULL, MTX_DEF);
1377 SYSINIT(bpages, SI_SUB_LOCK, SI_ORDER_ANY, init_bounce_pages, NULL);
1379 static struct sysctl_ctx_list *
1380 busdma_sysctl_tree(struct bounce_zone *bz)
1383 return (&bz->sysctl_tree);
1386 static struct sysctl_oid *
1387 busdma_sysctl_tree_top(struct bounce_zone *bz)
1390 return (bz->sysctl_tree_top);
1394 alloc_bounce_zone(bus_dma_tag_t dmat)
1396 struct bounce_zone *bz;
1398 /* Check to see if we already have a suitable zone */
1399 STAILQ_FOREACH(bz, &bounce_zone_list, links) {
1400 if ((dmat->alignment <= bz->alignment) &&
1401 (dmat->lowaddr >= bz->lowaddr)) {
1402 dmat->bounce_zone = bz;
1407 if ((bz = (struct bounce_zone *)malloc(sizeof(*bz), M_BUSDMA,
1408 M_NOWAIT | M_ZERO)) == NULL)
1411 STAILQ_INIT(&bz->bounce_page_list);
1412 bz->free_bpages = 0;
1413 bz->reserved_bpages = 0;
1414 bz->active_bpages = 0;
1415 bz->lowaddr = dmat->lowaddr;
1416 bz->alignment = MAX(dmat->alignment, PAGE_SIZE);
1418 snprintf(bz->zoneid, 8, "zone%d", busdma_zonecount);
1420 snprintf(bz->lowaddrid, 18, "%#jx", (uintmax_t)bz->lowaddr);
1421 STAILQ_INSERT_TAIL(&bounce_zone_list, bz, links);
1422 dmat->bounce_zone = bz;
1424 sysctl_ctx_init(&bz->sysctl_tree);
1425 bz->sysctl_tree_top = SYSCTL_ADD_NODE(&bz->sysctl_tree,
1426 SYSCTL_STATIC_CHILDREN(_hw_busdma), OID_AUTO, bz->zoneid,
1428 if (bz->sysctl_tree_top == NULL) {
1429 sysctl_ctx_free(&bz->sysctl_tree);
1430 return (0); /* XXX error code? */
1433 SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1434 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1435 "total_bpages", CTLFLAG_RD, &bz->total_bpages, 0,
1436 "Total bounce pages");
1437 SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1438 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1439 "free_bpages", CTLFLAG_RD, &bz->free_bpages, 0,
1440 "Free bounce pages");
1441 SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1442 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1443 "reserved_bpages", CTLFLAG_RD, &bz->reserved_bpages, 0,
1444 "Reserved bounce pages");
1445 SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1446 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1447 "active_bpages", CTLFLAG_RD, &bz->active_bpages, 0,
1448 "Active bounce pages");
1449 SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1450 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1451 "total_bounced", CTLFLAG_RD, &bz->total_bounced, 0,
1452 "Total bounce requests (pages bounced)");
1453 SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1454 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1455 "total_deferred", CTLFLAG_RD, &bz->total_deferred, 0,
1456 "Total bounce requests that were deferred");
1457 SYSCTL_ADD_STRING(busdma_sysctl_tree(bz),
1458 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1459 "lowaddr", CTLFLAG_RD, bz->lowaddrid, 0, "");
1460 SYSCTL_ADD_ULONG(busdma_sysctl_tree(bz),
1461 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1462 "alignment", CTLFLAG_RD, &bz->alignment, "");
1468 alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages)
1470 struct bounce_zone *bz;
1473 bz = dmat->bounce_zone;
1475 while (numpages > 0) {
1476 struct bounce_page *bpage;
1478 bpage = (struct bounce_page *)malloc(sizeof(*bpage), M_BUSDMA,
1483 bpage->vaddr = (vm_offset_t)contigmalloc(PAGE_SIZE, M_BOUNCE,
1484 M_NOWAIT, 0ul, bz->lowaddr, PAGE_SIZE, 0);
1485 if (bpage->vaddr == 0) {
1486 free(bpage, M_BUSDMA);
1489 bpage->busaddr = pmap_kextract(bpage->vaddr);
1490 mtx_lock(&bounce_lock);
1491 STAILQ_INSERT_TAIL(&bz->bounce_page_list, bpage, links);
1495 mtx_unlock(&bounce_lock);
1503 reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int commit)
1505 struct bounce_zone *bz;
1508 mtx_assert(&bounce_lock, MA_OWNED);
1509 bz = dmat->bounce_zone;
1510 pages = MIN(bz->free_bpages, map->pagesneeded - map->pagesreserved);
1511 if (commit == 0 && map->pagesneeded > (map->pagesreserved + pages))
1512 return (map->pagesneeded - (map->pagesreserved + pages));
1513 bz->free_bpages -= pages;
1514 bz->reserved_bpages += pages;
1515 map->pagesreserved += pages;
1516 pages = map->pagesneeded - map->pagesreserved;
1522 add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map, vm_offset_t vaddr,
1523 bus_addr_t addr, bus_size_t size)
1525 struct bounce_zone *bz;
1526 struct bounce_page *bpage;
1528 KASSERT(dmat->bounce_zone != NULL, ("no bounce zone in dma tag"));
1529 KASSERT(map != NULL, ("add_bounce_page: bad map %p", map));
1531 bz = dmat->bounce_zone;
1532 if (map->pagesneeded == 0)
1533 panic("add_bounce_page: map doesn't need any pages");
1536 if (map->pagesreserved == 0)
1537 panic("add_bounce_page: map doesn't need any pages");
1538 map->pagesreserved--;
1540 mtx_lock(&bounce_lock);
1541 bpage = STAILQ_FIRST(&bz->bounce_page_list);
1543 panic("add_bounce_page: free page list is empty");
1545 STAILQ_REMOVE_HEAD(&bz->bounce_page_list, links);
1546 bz->reserved_bpages--;
1547 bz->active_bpages++;
1548 mtx_unlock(&bounce_lock);
1550 if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) {
1551 /* Page offset needs to be preserved. */
1552 bpage->vaddr |= addr & PAGE_MASK;
1553 bpage->busaddr |= addr & PAGE_MASK;
1555 bpage->datavaddr = vaddr;
1556 bpage->datapage = PHYS_TO_VM_PAGE(addr);
1557 bpage->dataoffs = addr & PAGE_MASK;
1558 bpage->datacount = size;
1559 STAILQ_INSERT_TAIL(&(map->bpages), bpage, links);
1560 return (bpage->busaddr);
1564 free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage)
1566 struct bus_dmamap *map;
1567 struct bounce_zone *bz;
1569 bz = dmat->bounce_zone;
1570 bpage->datavaddr = 0;
1571 bpage->datacount = 0;
1572 if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) {
1574 * Reset the bounce page to start at offset 0. Other uses
1575 * of this bounce page may need to store a full page of
1576 * data and/or assume it starts on a page boundary.
1578 bpage->vaddr &= ~PAGE_MASK;
1579 bpage->busaddr &= ~PAGE_MASK;
1582 mtx_lock(&bounce_lock);
1583 STAILQ_INSERT_HEAD(&bz->bounce_page_list, bpage, links);
1585 bz->active_bpages--;
1586 if ((map = STAILQ_FIRST(&bounce_map_waitinglist)) != NULL) {
1587 if (reserve_bounce_pages(map->dmat, map, 1) == 0) {
1588 STAILQ_REMOVE_HEAD(&bounce_map_waitinglist, links);
1589 STAILQ_INSERT_TAIL(&bounce_map_callbacklist,
1591 busdma_swi_pending = 1;
1592 bz->total_deferred++;
1593 swi_sched(vm_ih, 0);
1596 mtx_unlock(&bounce_lock);
1603 struct bus_dmamap *map;
1605 mtx_lock(&bounce_lock);
1606 while ((map = STAILQ_FIRST(&bounce_map_callbacklist)) != NULL) {
1607 STAILQ_REMOVE_HEAD(&bounce_map_callbacklist, links);
1608 mtx_unlock(&bounce_lock);
1610 dmat->lockfunc(dmat->lockfuncarg, BUS_DMA_LOCK);
1611 bus_dmamap_load_mem(map->dmat, map, &map->mem, map->callback,
1612 map->callback_arg, BUS_DMA_WAITOK);
1613 dmat->lockfunc(dmat->lockfuncarg, BUS_DMA_UNLOCK);
1614 mtx_lock(&bounce_lock);
1616 mtx_unlock(&bounce_lock);