2 * Copyright (c) 2012 Ian Lepore
3 * Copyright (c) 2010 Mark Tinguely
4 * Copyright (c) 2004 Olivier Houchard
5 * Copyright (c) 2002 Peter Grehan
6 * Copyright (c) 1997, 1998 Justin T. Gibbs.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions, and the following disclaimer,
14 * without modification, immediately at the beginning of the file.
15 * 2. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
22 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * From i386/busdma_machdep.c 191438 2009-04-23 20:24:19Z jhb
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
36 #define _ARM32_BUS_DMA_PRIVATE
37 #include <sys/param.h>
40 #include <ddb/db_output.h>
41 #include <sys/systm.h>
42 #include <sys/malloc.h>
44 #include <sys/busdma_bufalloc.h>
45 #include <sys/interrupt.h>
46 #include <sys/kernel.h>
49 #include <sys/memdesc.h>
51 #include <sys/mutex.h>
52 #include <sys/sysctl.h>
56 #include <vm/vm_page.h>
57 #include <vm/vm_map.h>
58 #include <vm/vm_extern.h>
59 #include <vm/vm_kern.h>
61 #include <machine/atomic.h>
62 #include <machine/bus.h>
63 #include <machine/cpufunc.h>
64 #include <machine/md_var.h>
67 #define BUS_DMA_COULD_BOUNCE BUS_DMA_BUS3
68 #define BUS_DMA_MIN_ALLOC_COMP BUS_DMA_BUS4
78 bus_dma_filter_t *filter;
86 bus_dma_lock_t *lockfunc;
88 struct bounce_zone *bounce_zone;
90 * DMA range for this tag. If the page doesn't fall within
91 * one of these ranges, an error is returned. The caller
92 * may then decide what to do with the transfer. If the
93 * range pointer is NULL, it is ignored.
95 struct arm32_dma_range *ranges;
98 * Most tags need one or two segments, and can use the local tagsegs
99 * array. For tags with a larger limit, we'll allocate a bigger array
102 bus_dma_segment_t *segments;
103 bus_dma_segment_t tagsegs[2];
109 vm_offset_t vaddr; /* kva of bounce buffer */
110 bus_addr_t busaddr; /* Physical address */
111 vm_offset_t datavaddr; /* kva of client data */
112 bus_addr_t dataaddr; /* client physical address */
113 bus_size_t datacount; /* client data count */
114 STAILQ_ENTRY(bounce_page) links;
118 vm_offset_t vaddr; /* kva of bounce buffer */
119 bus_addr_t busaddr; /* Physical address */
120 bus_size_t datacount; /* client data count */
123 int busdma_swi_pending;
126 STAILQ_ENTRY(bounce_zone) links;
127 STAILQ_HEAD(bp_list, bounce_page) bounce_page_list;
135 bus_size_t alignment;
139 struct sysctl_ctx_list sysctl_tree;
140 struct sysctl_oid *sysctl_tree_top;
143 static struct mtx bounce_lock;
144 static int total_bpages;
145 static int busdma_zonecount;
146 static STAILQ_HEAD(, bounce_zone) bounce_zone_list;
148 SYSCTL_NODE(_hw, OID_AUTO, busdma, CTLFLAG_RD, 0, "Busdma parameters");
149 SYSCTL_INT(_hw_busdma, OID_AUTO, total_bpages, CTLFLAG_RD, &total_bpages, 0,
150 "Total bounce pages");
153 struct bp_list bpages;
159 bus_dmamap_callback_t *callback;
162 #define DMAMAP_COHERENT (1 << 0)
163 STAILQ_ENTRY(bus_dmamap) links;
165 struct sync_list slist[];
168 static STAILQ_HEAD(, bus_dmamap) bounce_map_waitinglist;
169 static STAILQ_HEAD(, bus_dmamap) bounce_map_callbacklist;
171 static void init_bounce_pages(void *dummy);
172 static int alloc_bounce_zone(bus_dma_tag_t dmat);
173 static int alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages);
174 static int reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map,
176 static bus_addr_t add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map,
177 vm_offset_t vaddr, bus_addr_t addr,
179 static void free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage);
180 int run_filter(bus_dma_tag_t dmat, bus_addr_t paddr, bus_size_t size, int coherent);
181 static void _bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map,
182 void *buf, bus_size_t buflen, int flags);
183 static void _bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_t map,
184 vm_paddr_t buf, bus_size_t buflen, int flags);
185 static int _bus_dmamap_reserve_pages(bus_dma_tag_t dmat, bus_dmamap_t map,
188 static busdma_bufalloc_t coherent_allocator; /* Cache of coherent buffers */
189 static busdma_bufalloc_t standard_allocator; /* Cache of standard buffers */
191 busdma_init(void *dummy)
197 /* Create a cache of buffers in standard (cacheable) memory. */
198 standard_allocator = busdma_bufalloc_create("buffer",
199 arm_dcache_align, /* minimum_alignment */
200 NULL, /* uma_alloc func */
201 NULL, /* uma_free func */
202 uma_flags); /* uma_zcreate_flags */
206 * Force UMA zone to allocate service structures like
207 * slabs using own allocator. uma_debug code performs
208 * atomic ops on uma_slab_t fields and safety of this
209 * operation is not guaranteed for write-back caches
211 uma_flags = UMA_ZONE_OFFPAGE;
214 * Create a cache of buffers in uncacheable memory, to implement the
215 * BUS_DMA_COHERENT (and potentially BUS_DMA_NOCACHE) flag.
217 coherent_allocator = busdma_bufalloc_create("coherent",
218 arm_dcache_align, /* minimum_alignment */
219 busdma_bufalloc_alloc_uncacheable,
220 busdma_bufalloc_free_uncacheable,
221 uma_flags); /* uma_zcreate_flags */
225 * This init historically used SI_SUB_VM, but now the init code requires
226 * malloc(9) using M_DEVBUF memory, which is set up later than SI_SUB_VM, by
227 * SI_SUB_KMEM and SI_ORDER_SECOND, so we'll go right after that by using
228 * SI_SUB_KMEM and SI_ORDER_THIRD.
230 SYSINIT(busdma, SI_SUB_KMEM, SI_ORDER_THIRD, busdma_init, NULL);
233 _bus_dma_can_bounce(vm_offset_t lowaddr, vm_offset_t highaddr)
236 for (i = 0; phys_avail[i] && phys_avail[i + 1]; i += 2) {
237 if ((lowaddr >= phys_avail[i] && lowaddr <= phys_avail[i + 1])
238 || (lowaddr < phys_avail[i] &&
239 highaddr > phys_avail[i]))
245 static __inline struct arm32_dma_range *
246 _bus_dma_inrange(struct arm32_dma_range *ranges, int nranges,
249 struct arm32_dma_range *dr;
252 for (i = 0, dr = ranges; i < nranges; i++, dr++) {
253 if (curaddr >= dr->dr_sysbase &&
254 round_page(curaddr) <= (dr->dr_sysbase + dr->dr_len))
262 * Return true if a match is made.
264 * To find a match walk the chain of bus_dma_tag_t's looking for 'paddr'.
266 * If paddr is within the bounds of the dma tag then call the filter callback
267 * to check for a match, if there is no filter callback then assume a match.
270 run_filter(bus_dma_tag_t dmat, bus_addr_t paddr, bus_size_t size, int coherent)
277 if (((paddr > dmat->lowaddr && paddr <= dmat->highaddr)
278 || ((paddr & (dmat->alignment - 1)) != 0) ||
279 (!coherent && (size & arm_dcache_align_mask)) ||
280 (!coherent && (paddr & arm_dcache_align_mask)))
281 && (dmat->filter == NULL
282 || (*dmat->filter)(dmat->filterarg, paddr) != 0))
286 } while (retval == 0 && dmat != NULL);
291 * Convenience function for manipulating driver locks from busdma (during
292 * busdma_swi, for example). Drivers that don't provide their own locks
293 * should specify &Giant to dmat->lockfuncarg. Drivers that use their own
294 * non-mutex locking scheme don't have to use this at all.
297 busdma_lock_mutex(void *arg, bus_dma_lock_op_t op)
301 dmtx = (struct mtx *)arg;
310 panic("Unknown operation 0x%x for busdma_lock_mutex!", op);
315 * dflt_lock should never get called. It gets put into the dma tag when
316 * lockfunc == NULL, which is only valid if the maps that are associated
317 * with the tag are meant to never be defered.
318 * XXX Should have a way to identify which driver is responsible here.
321 dflt_lock(void *arg, bus_dma_lock_op_t op)
323 panic("driver error: busdma dflt_lock called");
327 * Allocate a device specific dma_tag.
330 bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment,
331 bus_size_t boundary, bus_addr_t lowaddr,
332 bus_addr_t highaddr, bus_dma_filter_t *filter,
333 void *filterarg, bus_size_t maxsize, int nsegments,
334 bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc,
335 void *lockfuncarg, bus_dma_tag_t *dmat)
337 bus_dma_tag_t newtag;
342 parent = arm_root_dma_tag;
345 /* Basic sanity checking */
346 if (boundary != 0 && boundary < maxsegsz)
349 /* Return a NULL tag on failure */
356 newtag = (bus_dma_tag_t)malloc(sizeof(*newtag), M_DEVBUF,
358 if (newtag == NULL) {
359 CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d",
360 __func__, newtag, 0, error);
364 newtag->parent = parent;
365 newtag->alignment = alignment;
366 newtag->boundary = boundary;
367 newtag->lowaddr = trunc_page((vm_paddr_t)lowaddr) + (PAGE_SIZE - 1);
368 newtag->highaddr = trunc_page((vm_paddr_t)highaddr) +
370 newtag->filter = filter;
371 newtag->filterarg = filterarg;
372 newtag->maxsize = maxsize;
373 newtag->nsegments = nsegments;
374 newtag->maxsegsz = maxsegsz;
375 newtag->flags = flags;
376 newtag->ref_count = 1; /* Count ourself */
377 newtag->map_count = 0;
378 newtag->ranges = bus_dma_get_range();
379 newtag->_nranges = bus_dma_get_range_nb();
380 if (lockfunc != NULL) {
381 newtag->lockfunc = lockfunc;
382 newtag->lockfuncarg = lockfuncarg;
384 newtag->lockfunc = dflt_lock;
385 newtag->lockfuncarg = NULL;
388 * If all the segments we need fit into the local tagsegs array, set the
389 * pointer now. Otherwise NULL the pointer and an array of segments
390 * will be allocated later, on first use. We don't pre-allocate now
391 * because some tags exist just to pass contraints to children in the
392 * device hierarchy, and they tend to use BUS_SPACE_UNRESTRICTED and we
393 * sure don't want to try to allocate an array for that.
395 if (newtag->nsegments <= nitems(newtag->tagsegs))
396 newtag->segments = newtag->tagsegs;
398 newtag->segments = NULL;
400 /* Take into account any restrictions imposed by our parent tag */
401 if (parent != NULL) {
402 newtag->lowaddr = MIN(parent->lowaddr, newtag->lowaddr);
403 newtag->highaddr = MAX(parent->highaddr, newtag->highaddr);
404 if (newtag->boundary == 0)
405 newtag->boundary = parent->boundary;
406 else if (parent->boundary != 0)
407 newtag->boundary = MIN(parent->boundary,
409 if ((newtag->filter != NULL) ||
410 ((parent->flags & BUS_DMA_COULD_BOUNCE) != 0))
411 newtag->flags |= BUS_DMA_COULD_BOUNCE;
412 if (newtag->filter == NULL) {
414 * Short circuit looking at our parent directly
415 * since we have encapsulated all of its information
417 newtag->filter = parent->filter;
418 newtag->filterarg = parent->filterarg;
419 newtag->parent = parent->parent;
421 if (newtag->parent != NULL)
422 atomic_add_int(&parent->ref_count, 1);
425 if (_bus_dma_can_bounce(newtag->lowaddr, newtag->highaddr)
426 || newtag->alignment > 1)
427 newtag->flags |= BUS_DMA_COULD_BOUNCE;
430 * Any request can auto-bounce due to cacheline alignment, in addition
431 * to any alignment or boundary specifications in the tag, so if the
432 * ALLOCNOW flag is set, there's always work to do.
434 if ((flags & BUS_DMA_ALLOCNOW) != 0) {
435 struct bounce_zone *bz;
437 * Round size up to a full page, and add one more page because
438 * there can always be one more boundary crossing than the
439 * number of pages in a transfer.
441 maxsize = roundup2(maxsize, PAGE_SIZE) + PAGE_SIZE;
443 if ((error = alloc_bounce_zone(newtag)) != 0) {
444 free(newtag, M_DEVBUF);
447 bz = newtag->bounce_zone;
449 if (ptoa(bz->total_bpages) < maxsize) {
452 pages = atop(maxsize) - bz->total_bpages;
454 /* Add pages to our bounce pool */
455 if (alloc_bounce_pages(newtag, pages) < pages)
458 /* Performed initial allocation */
459 newtag->flags |= BUS_DMA_MIN_ALLOC_COMP;
461 newtag->bounce_zone = NULL;
464 free(newtag, M_DEVBUF);
468 CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d",
469 __func__, newtag, (newtag != NULL ? newtag->flags : 0), error);
474 bus_dma_tag_destroy(bus_dma_tag_t dmat)
476 bus_dma_tag_t dmat_copy;
484 if (dmat->map_count != 0) {
489 while (dmat != NULL) {
490 bus_dma_tag_t parent;
492 parent = dmat->parent;
493 atomic_subtract_int(&dmat->ref_count, 1);
494 if (dmat->ref_count == 0) {
495 if (dmat->segments != NULL &&
496 dmat->segments != dmat->tagsegs)
497 free(dmat->segments, M_DEVBUF);
498 free(dmat, M_DEVBUF);
500 * Last reference count, so
501 * release our reference
502 * count on our parent.
510 CTR3(KTR_BUSDMA, "%s tag %p error %d", __func__, dmat_copy, error);
514 static int allocate_bz_and_pages(bus_dma_tag_t dmat, bus_dmamap_t mapp)
516 struct bounce_zone *bz;
520 if (dmat->bounce_zone == NULL)
521 if ((error = alloc_bounce_zone(dmat)) != 0)
523 bz = dmat->bounce_zone;
524 /* Initialize the new map */
525 STAILQ_INIT(&(mapp->bpages));
528 * Attempt to add pages to our pool on a per-instance basis up to a sane
529 * limit. Even if the tag isn't flagged as COULD_BOUNCE due to
530 * alignment and boundary constraints, it could still auto-bounce due to
531 * cacheline alignment, which requires at most two bounce pages.
533 if (dmat->flags & BUS_DMA_COULD_BOUNCE)
534 maxpages = MAX_BPAGES;
536 maxpages = 2 * bz->map_count;
537 if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0
538 || (bz->map_count > 0 && bz->total_bpages < maxpages)) {
541 pages = atop(roundup2(dmat->maxsize, PAGE_SIZE)) + 1;
542 pages = MIN(maxpages - bz->total_bpages, pages);
543 pages = MAX(pages, 2);
544 if (alloc_bounce_pages(dmat, pages) < pages)
547 if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0)
548 dmat->flags |= BUS_DMA_MIN_ALLOC_COMP;
555 * Allocate a handle for mapping from kva/uva/physical
556 * address space into bus device space.
559 bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp)
564 mapsize = sizeof(**mapp) + (sizeof(struct sync_list) * dmat->nsegments);
565 *mapp = (bus_dmamap_t)malloc(mapsize, M_DEVBUF, M_NOWAIT | M_ZERO);
567 CTR3(KTR_BUSDMA, "%s: tag %p error %d", __func__, dmat, ENOMEM);
570 (*mapp)->sync_count = 0;
572 if (dmat->segments == NULL) {
573 dmat->segments = (bus_dma_segment_t *)malloc(
574 sizeof(bus_dma_segment_t) * dmat->nsegments, M_DEVBUF,
576 if (dmat->segments == NULL) {
577 CTR3(KTR_BUSDMA, "%s: tag %p error %d",
578 __func__, dmat, ENOMEM);
579 free(*mapp, M_DEVBUF);
585 * Bouncing might be required if the driver asks for an active
586 * exclusion region, a data alignment that is stricter than 1, and/or
587 * an active address boundary.
589 error = allocate_bz_and_pages(dmat, *mapp);
591 free(*mapp, M_DEVBUF);
599 * Destroy a handle for mapping from kva/uva/physical
600 * address space into bus device space.
603 bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map)
605 if (STAILQ_FIRST(&map->bpages) != NULL || map->sync_count != 0) {
606 CTR3(KTR_BUSDMA, "%s: tag %p error %d",
607 __func__, dmat, EBUSY);
610 if (dmat->bounce_zone)
611 dmat->bounce_zone->map_count--;
614 CTR2(KTR_BUSDMA, "%s: tag %p error 0", __func__, dmat);
620 * Allocate a piece of memory that can be efficiently mapped into
621 * bus device space based on the constraints lited in the dma tag.
622 * A dmamap to for use with dmamap_load is also allocated.
625 bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags,
628 busdma_bufalloc_t ba;
629 struct busdma_bufzone *bufzone;
630 vm_memattr_t memattr;
635 if (flags & BUS_DMA_NOWAIT)
640 /* ARM non-snooping caches need a map for the VA cache sync structure */
642 mapsize = sizeof(**mapp) + (sizeof(struct sync_list) * dmat->nsegments);
643 *mapp = (bus_dmamap_t)malloc(mapsize, M_DEVBUF, M_NOWAIT | M_ZERO);
645 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
646 __func__, dmat, dmat->flags, ENOMEM);
650 (*mapp)->sync_count = 0;
651 /* We may need bounce pages, even for allocated memory */
652 error = allocate_bz_and_pages(dmat, *mapp);
654 free(*mapp, M_DEVBUF);
659 if (dmat->segments == NULL) {
660 dmat->segments = (bus_dma_segment_t *)malloc(
661 sizeof(bus_dma_segment_t) * dmat->nsegments, M_DEVBUF,
663 if (dmat->segments == NULL) {
664 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
665 __func__, dmat, dmat->flags, ENOMEM);
666 free(*mapp, M_DEVBUF);
672 if (flags & BUS_DMA_ZERO)
674 if (flags & BUS_DMA_COHERENT) {
675 memattr = VM_MEMATTR_UNCACHEABLE;
676 ba = coherent_allocator;
677 (*mapp)->flags |= DMAMAP_COHERENT;
679 memattr = VM_MEMATTR_DEFAULT;
680 ba = standard_allocator;
685 * Try to find a bufzone in the allocator that holds a cache of buffers
686 * of the right size for this request. If the buffer is too big to be
687 * held in the allocator cache, this returns NULL.
689 bufzone = busdma_bufalloc_findzone(ba, dmat->maxsize);
692 * Allocate the buffer from the uma(9) allocator if...
693 * - It's small enough to be in the allocator (bufzone not NULL).
694 * - The alignment constraint isn't larger than the allocation size
695 * (the allocator aligns buffers to their size boundaries).
696 * - There's no need to handle lowaddr/highaddr exclusion zones.
697 * else allocate non-contiguous pages if...
698 * - The page count that could get allocated doesn't exceed nsegments.
699 * - The alignment constraint isn't larger than a page boundary.
700 * - There are no boundary-crossing constraints.
701 * else allocate a block of contiguous pages because one or more of the
702 * constraints is something that only the contig allocator can fulfill.
704 if (bufzone != NULL && dmat->alignment <= bufzone->size &&
705 !_bus_dma_can_bounce(dmat->lowaddr, dmat->highaddr)) {
706 *vaddr = uma_zalloc(bufzone->umazone, mflags);
707 } else if (dmat->nsegments >= btoc(dmat->maxsize) &&
708 dmat->alignment <= PAGE_SIZE && dmat->boundary == 0) {
709 *vaddr = (void *)kmem_alloc_attr(kernel_arena, dmat->maxsize,
710 mflags, 0, dmat->lowaddr, memattr);
712 *vaddr = (void *)kmem_alloc_contig(kernel_arena, dmat->maxsize,
713 mflags, 0, dmat->lowaddr, dmat->alignment, dmat->boundary,
718 if (*vaddr == NULL) {
719 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
720 __func__, dmat, dmat->flags, ENOMEM);
721 free(*mapp, M_DEVBUF);
724 } else if ((uintptr_t)*vaddr & (dmat->alignment - 1)) {
725 printf("bus_dmamem_alloc failed to align memory properly.\n");
729 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
730 __func__, dmat, dmat->flags, 0);
735 * Free a piece of memory and it's allociated dmamap, that was allocated
736 * via bus_dmamem_alloc. Make the same choice for free/contigfree.
739 bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map)
741 struct busdma_bufzone *bufzone;
742 busdma_bufalloc_t ba;
744 if (map->flags & DMAMAP_COHERENT)
745 ba = coherent_allocator;
747 ba = standard_allocator;
749 /* Be careful not to access map from here on. */
751 bufzone = busdma_bufalloc_findzone(ba, dmat->maxsize);
753 if (bufzone != NULL && dmat->alignment <= bufzone->size &&
754 !_bus_dma_can_bounce(dmat->lowaddr, dmat->highaddr))
755 uma_zfree(bufzone->umazone, vaddr);
757 kmem_free(kernel_arena, (vm_offset_t)vaddr, dmat->maxsize);
761 CTR3(KTR_BUSDMA, "%s: tag %p flags 0x%x", __func__, dmat, dmat->flags);
765 _bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_t map, vm_paddr_t buf,
766 bus_size_t buflen, int flags)
771 if (map->pagesneeded == 0) {
772 CTR5(KTR_BUSDMA, "lowaddr= %d, boundary= %d, alignment= %d"
773 " map= %p, pagesneeded= %d",
774 dmat->lowaddr, dmat->boundary, dmat->alignment,
775 map, map->pagesneeded);
777 * Count the number of bounce pages
778 * needed in order to complete this transfer
781 while (buflen != 0) {
782 sgsize = MIN(buflen, dmat->maxsegsz);
783 if (run_filter(dmat, curaddr, sgsize,
784 map->flags & DMAMAP_COHERENT) != 0) {
785 sgsize = MIN(sgsize, PAGE_SIZE);
791 CTR1(KTR_BUSDMA, "pagesneeded= %d", map->pagesneeded);
796 _bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map,
797 void *buf, bus_size_t buflen, int flags)
800 vm_offset_t vendaddr;
803 if (map->pagesneeded == 0) {
804 CTR5(KTR_BUSDMA, "lowaddr= %d, boundary= %d, alignment= %d"
805 " map= %p, pagesneeded= %d",
806 dmat->lowaddr, dmat->boundary, dmat->alignment,
807 map, map->pagesneeded);
809 * Count the number of bounce pages
810 * needed in order to complete this transfer
812 vaddr = (vm_offset_t)buf;
813 vendaddr = (vm_offset_t)buf + buflen;
815 while (vaddr < vendaddr) {
816 if (__predict_true(map->pmap == kernel_pmap))
817 paddr = pmap_kextract(vaddr);
819 paddr = pmap_extract(map->pmap, vaddr);
820 if (run_filter(dmat, paddr,
821 min(vendaddr - vaddr,
822 (PAGE_SIZE - ((vm_offset_t)vaddr & PAGE_MASK))),
823 map->flags & DMAMAP_COHERENT) != 0) {
826 vaddr += (PAGE_SIZE - ((vm_offset_t)vaddr & PAGE_MASK));
829 CTR1(KTR_BUSDMA, "pagesneeded= %d", map->pagesneeded);
834 _bus_dmamap_reserve_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int flags)
837 /* Reserve Necessary Bounce Pages */
838 mtx_lock(&bounce_lock);
839 if (flags & BUS_DMA_NOWAIT) {
840 if (reserve_bounce_pages(dmat, map, 0) != 0) {
841 map->pagesneeded = 0;
842 mtx_unlock(&bounce_lock);
846 if (reserve_bounce_pages(dmat, map, 1) != 0) {
847 /* Queue us for resources */
848 STAILQ_INSERT_TAIL(&bounce_map_waitinglist, map, links);
849 mtx_unlock(&bounce_lock);
850 return (EINPROGRESS);
853 mtx_unlock(&bounce_lock);
859 * Add a single contiguous physical range to the segment list.
862 _bus_dmamap_addseg(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t curaddr,
863 bus_size_t sgsize, bus_dma_segment_t *segs, int *segp)
865 bus_addr_t baddr, bmask;
869 * Make sure we don't cross any boundaries.
871 bmask = ~(dmat->boundary - 1);
872 if (dmat->boundary > 0) {
873 baddr = (curaddr + dmat->boundary) & bmask;
874 if (sgsize > (baddr - curaddr))
875 sgsize = (baddr - curaddr);
879 struct arm32_dma_range *dr;
881 dr = _bus_dma_inrange(dmat->ranges, dmat->_nranges,
884 _bus_dmamap_unload(dmat, map);
888 * In a valid DMA range. Translate the physical
889 * memory address to an address in the DMA window.
891 curaddr = (curaddr - dr->dr_sysbase) + dr->dr_busbase;
895 * Insert chunk into a segment, coalescing with
896 * previous segment if possible.
901 segs[seg].ds_addr = curaddr;
902 segs[seg].ds_len = sgsize;
904 if (curaddr == segs[seg].ds_addr + segs[seg].ds_len &&
905 (segs[seg].ds_len + sgsize) <= dmat->maxsegsz &&
906 (dmat->boundary == 0 ||
907 (segs[seg].ds_addr & bmask) == (curaddr & bmask)))
908 segs[seg].ds_len += sgsize;
910 if (++seg >= dmat->nsegments)
912 segs[seg].ds_addr = curaddr;
913 segs[seg].ds_len = sgsize;
921 * Utility function to load a physical buffer. segp contains
922 * the starting segment on entrace, and the ending segment on exit.
925 _bus_dmamap_load_phys(bus_dma_tag_t dmat,
927 vm_paddr_t buf, bus_size_t buflen,
929 bus_dma_segment_t *segs,
937 segs = dmat->segments;
939 if (((map->flags & DMAMAP_COHERENT) == 0) ||
940 (dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) {
941 _bus_dmamap_count_phys(dmat, map, buf, buflen, flags);
942 if (map->pagesneeded != 0) {
943 error = _bus_dmamap_reserve_pages(dmat, map, flags);
951 sgsize = MIN(buflen, dmat->maxsegsz);
952 if ((((map->flags & DMAMAP_COHERENT) == 0) ||
953 ((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0)) &&
954 map->pagesneeded != 0 && run_filter(dmat, curaddr,
955 sgsize, map->flags & DMAMAP_COHERENT)) {
956 sgsize = MIN(sgsize, PAGE_SIZE);
957 curaddr = add_bounce_page(dmat, map, 0, curaddr,
960 sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs,
972 _bus_dmamap_unload(dmat, map);
973 return (EFBIG); /* XXX better return value here? */
979 _bus_dmamap_load_ma(bus_dma_tag_t dmat, bus_dmamap_t map,
980 struct vm_page **ma, bus_size_t tlen, int ma_offs, int flags,
981 bus_dma_segment_t *segs, int *segp)
984 return (bus_dmamap_load_ma_triv(dmat, map, ma, tlen, ma_offs, flags,
989 * Utility function to load a linear buffer. segp contains
990 * the starting segment on entrace, and the ending segment on exit.
993 _bus_dmamap_load_buffer(bus_dma_tag_t dmat,
995 void *buf, bus_size_t buflen,
998 bus_dma_segment_t *segs,
1004 struct sync_list *sl;
1008 segs = dmat->segments;
1012 if (!(map->flags & DMAMAP_COHERENT) ||
1013 (dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) {
1014 _bus_dmamap_count_pages(dmat, map, buf, buflen, flags);
1015 if (map->pagesneeded != 0) {
1016 error = _bus_dmamap_reserve_pages(dmat, map, flags);
1023 vaddr = (vm_offset_t)buf;
1025 while (buflen > 0) {
1027 * Get the physical address for this segment.
1029 if (__predict_true(map->pmap == kernel_pmap))
1030 curaddr = pmap_kextract(vaddr);
1032 curaddr = pmap_extract(map->pmap, vaddr);
1035 * Compute the segment size, and adjust counts.
1037 sgsize = PAGE_SIZE - ((u_long)curaddr & PAGE_MASK);
1038 if (sgsize > dmat->maxsegsz)
1039 sgsize = dmat->maxsegsz;
1040 if (buflen < sgsize)
1043 if ((((map->flags & DMAMAP_COHERENT) == 0) ||
1044 ((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0)) &&
1045 map->pagesneeded != 0 && run_filter(dmat, curaddr,
1046 sgsize, map->flags & DMAMAP_COHERENT)) {
1047 curaddr = add_bounce_page(dmat, map, vaddr, curaddr,
1050 sl = &map->slist[map->sync_count - 1];
1051 if (map->sync_count == 0 ||
1053 curaddr != sl->busaddr + sl->datacount ||
1055 vaddr != sl->vaddr + sl->datacount) {
1056 if (++map->sync_count > dmat->nsegments)
1060 sl->datacount = sgsize;
1061 sl->busaddr = curaddr;
1063 sl->datacount += sgsize;
1065 sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs,
1078 _bus_dmamap_unload(dmat, map);
1079 return (EFBIG); /* XXX better return value here? */
1086 __bus_dmamap_waitok(bus_dma_tag_t dmat, bus_dmamap_t map,
1087 struct memdesc *mem, bus_dmamap_callback_t *callback,
1093 map->callback = callback;
1094 map->callback_arg = callback_arg;
1098 _bus_dmamap_complete(bus_dma_tag_t dmat, bus_dmamap_t map,
1099 bus_dma_segment_t *segs, int nsegs, int error)
1103 segs = dmat->segments;
1108 * Release the mapping held by map.
1111 _bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map)
1113 struct bounce_page *bpage;
1114 struct bounce_zone *bz;
1116 if ((bz = dmat->bounce_zone) != NULL) {
1117 while ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) {
1118 STAILQ_REMOVE_HEAD(&map->bpages, links);
1119 free_bounce_page(dmat, bpage);
1122 bz = dmat->bounce_zone;
1123 bz->free_bpages += map->pagesreserved;
1124 bz->reserved_bpages -= map->pagesreserved;
1125 map->pagesreserved = 0;
1126 map->pagesneeded = 0;
1128 map->sync_count = 0;
1131 #ifdef notyetbounceuser
1132 /* If busdma uses user pages, then the interrupt handler could
1133 * be use the kernel vm mapping. Both bounce pages and sync list
1134 * do not cross page boundaries.
1135 * Below is a rough sequence that a person would do to fix the
1136 * user page reference in the kernel vmspace. This would be
1137 * done in the dma post routine.
1140 _bus_dmamap_fix_user(vm_offset_t buf, bus_size_t len,
1141 pmap_t pmap, int op)
1147 /* each synclist entry is contained within a single page.
1149 * this would be needed if BUS_DMASYNC_POSTxxxx was implemented
1151 curaddr = pmap_extract(pmap, buf);
1152 va = pmap_dma_map(curaddr);
1155 cpu_dcache_wb_range(va, sgsize);
1158 case SYNC_USER_COPYTO:
1159 bcopy((void *)va, (void *)bounce, sgsize);
1162 case SYNC_USER_COPYFROM:
1163 bcopy((void *) bounce, (void *)va, sgsize);
1175 #define l2cache_wb_range(va, pa, size) cpu_l2cache_wb_range(pa, size)
1176 #define l2cache_wbinv_range(va, pa, size) cpu_l2cache_wbinv_range(pa, size)
1177 #define l2cache_inv_range(va, pa, size) cpu_l2cache_inv_range(pa, size)
1179 #define l2cache_wb_range(va, pa, size) cpu_l2cache_wb_range(va, size)
1180 #define l2cache_wbinv_range(va, pa, size) cpu_l2cache_wbinv_range(va, size)
1181 #define l2cache_inv_range(va, pa, size) cpu_l2cache_inv_range(va, size)
1185 _bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op)
1187 struct bounce_page *bpage;
1188 struct sync_list *sl, *end;
1190 * If the buffer was from user space, it is possible that this is not
1191 * the same vm map, especially on a POST operation. It's not clear that
1192 * dma on userland buffers can work at all right now, certainly not if a
1193 * partial cacheline flush has to be handled. To be safe, until we're
1194 * able to test direct userland dma, panic on a map mismatch.
1196 if ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) {
1197 if (!pmap_dmap_iscurrent(map->pmap))
1198 panic("_bus_dmamap_sync: wrong user map for bounce sync.");
1199 /* Handle data bouncing. */
1200 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x op 0x%x "
1201 "performing bounce", __func__, dmat, dmat->flags, op);
1203 if (op & BUS_DMASYNC_PREWRITE) {
1204 while (bpage != NULL) {
1205 if (bpage->datavaddr != 0)
1206 bcopy((void *)bpage->datavaddr,
1207 (void *)bpage->vaddr,
1210 physcopyout(bpage->dataaddr,
1211 (void *)bpage->vaddr,
1213 cpu_dcache_wb_range((vm_offset_t)bpage->vaddr,
1215 l2cache_wb_range((vm_offset_t)bpage->vaddr,
1216 (vm_offset_t)bpage->busaddr,
1218 bpage = STAILQ_NEXT(bpage, links);
1220 dmat->bounce_zone->total_bounced++;
1223 if (op & BUS_DMASYNC_PREREAD) {
1224 bpage = STAILQ_FIRST(&map->bpages);
1225 while (bpage != NULL) {
1226 cpu_dcache_inv_range((vm_offset_t)bpage->vaddr,
1228 l2cache_inv_range((vm_offset_t)bpage->vaddr,
1229 (vm_offset_t)bpage->busaddr,
1231 bpage = STAILQ_NEXT(bpage, links);
1234 if (op & BUS_DMASYNC_POSTREAD) {
1235 while (bpage != NULL) {
1240 startv = bpage->vaddr &~ arm_dcache_align_mask;
1241 startp = bpage->busaddr &~ arm_dcache_align_mask;
1242 len = bpage->datacount;
1244 if (startv != bpage->vaddr)
1245 len += bpage->vaddr & arm_dcache_align_mask;
1246 if (len & arm_dcache_align_mask)
1248 (len & arm_dcache_align_mask)) +
1250 cpu_dcache_inv_range(startv, len);
1251 l2cache_inv_range(startv, startp, len);
1252 if (bpage->datavaddr != 0)
1253 bcopy((void *)bpage->vaddr,
1254 (void *)bpage->datavaddr,
1257 physcopyin((void *)bpage->vaddr,
1260 bpage = STAILQ_NEXT(bpage, links);
1262 dmat->bounce_zone->total_bounced++;
1265 if (map->flags & DMAMAP_COHERENT)
1268 if (map->sync_count != 0) {
1269 if (!pmap_dmap_iscurrent(map->pmap))
1270 panic("_bus_dmamap_sync: wrong user map for sync.");
1271 /* ARM caches are not self-snooping for dma */
1273 sl = &map->slist[0];
1274 end = &map->slist[map->sync_count];
1275 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x op 0x%x "
1276 "performing sync", __func__, dmat, dmat->flags, op);
1279 case BUS_DMASYNC_PREWRITE:
1281 cpu_dcache_wb_range(sl->vaddr, sl->datacount);
1282 l2cache_wb_range(sl->vaddr, sl->busaddr,
1288 case BUS_DMASYNC_PREREAD:
1290 cpu_dcache_inv_range(sl->vaddr, sl->datacount);
1291 l2cache_inv_range(sl->vaddr, sl->busaddr,
1297 case BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD:
1299 cpu_dcache_wbinv_range(sl->vaddr, sl->datacount);
1300 l2cache_wbinv_range(sl->vaddr,
1301 sl->busaddr, sl->datacount);
1306 case BUS_DMASYNC_POSTREAD:
1307 case BUS_DMASYNC_POSTWRITE:
1308 case BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE:
1311 panic("unsupported combination of sync operations: 0x%08x\n", op);
1318 init_bounce_pages(void *dummy __unused)
1322 STAILQ_INIT(&bounce_zone_list);
1323 STAILQ_INIT(&bounce_map_waitinglist);
1324 STAILQ_INIT(&bounce_map_callbacklist);
1325 mtx_init(&bounce_lock, "bounce pages lock", NULL, MTX_DEF);
1327 SYSINIT(bpages, SI_SUB_LOCK, SI_ORDER_ANY, init_bounce_pages, NULL);
1329 static struct sysctl_ctx_list *
1330 busdma_sysctl_tree(struct bounce_zone *bz)
1332 return (&bz->sysctl_tree);
1335 static struct sysctl_oid *
1336 busdma_sysctl_tree_top(struct bounce_zone *bz)
1338 return (bz->sysctl_tree_top);
1342 alloc_bounce_zone(bus_dma_tag_t dmat)
1344 struct bounce_zone *bz;
1346 /* Check to see if we already have a suitable zone */
1347 STAILQ_FOREACH(bz, &bounce_zone_list, links) {
1348 if ((dmat->alignment <= bz->alignment)
1349 && (dmat->lowaddr >= bz->lowaddr)) {
1350 dmat->bounce_zone = bz;
1355 if ((bz = (struct bounce_zone *)malloc(sizeof(*bz), M_DEVBUF,
1356 M_NOWAIT | M_ZERO)) == NULL)
1359 STAILQ_INIT(&bz->bounce_page_list);
1360 bz->free_bpages = 0;
1361 bz->reserved_bpages = 0;
1362 bz->active_bpages = 0;
1363 bz->lowaddr = dmat->lowaddr;
1364 bz->alignment = MAX(dmat->alignment, PAGE_SIZE);
1366 snprintf(bz->zoneid, 8, "zone%d", busdma_zonecount);
1368 snprintf(bz->lowaddrid, 18, "%#jx", (uintmax_t)bz->lowaddr);
1369 STAILQ_INSERT_TAIL(&bounce_zone_list, bz, links);
1370 dmat->bounce_zone = bz;
1372 sysctl_ctx_init(&bz->sysctl_tree);
1373 bz->sysctl_tree_top = SYSCTL_ADD_NODE(&bz->sysctl_tree,
1374 SYSCTL_STATIC_CHILDREN(_hw_busdma), OID_AUTO, bz->zoneid,
1376 if (bz->sysctl_tree_top == NULL) {
1377 sysctl_ctx_free(&bz->sysctl_tree);
1378 return (0); /* XXX error code? */
1381 SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1382 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1383 "total_bpages", CTLFLAG_RD, &bz->total_bpages, 0,
1384 "Total bounce pages");
1385 SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1386 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1387 "free_bpages", CTLFLAG_RD, &bz->free_bpages, 0,
1388 "Free bounce pages");
1389 SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1390 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1391 "reserved_bpages", CTLFLAG_RD, &bz->reserved_bpages, 0,
1392 "Reserved bounce pages");
1393 SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1394 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1395 "active_bpages", CTLFLAG_RD, &bz->active_bpages, 0,
1396 "Active bounce pages");
1397 SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1398 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1399 "total_bounced", CTLFLAG_RD, &bz->total_bounced, 0,
1400 "Total bounce requests");
1401 SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1402 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1403 "total_deferred", CTLFLAG_RD, &bz->total_deferred, 0,
1404 "Total bounce requests that were deferred");
1405 SYSCTL_ADD_STRING(busdma_sysctl_tree(bz),
1406 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1407 "lowaddr", CTLFLAG_RD, bz->lowaddrid, 0, "");
1408 SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1409 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1410 "alignment", CTLFLAG_RD, &bz->alignment, 0, "");
1416 alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages)
1418 struct bounce_zone *bz;
1421 bz = dmat->bounce_zone;
1423 while (numpages > 0) {
1424 struct bounce_page *bpage;
1426 bpage = (struct bounce_page *)malloc(sizeof(*bpage), M_DEVBUF,
1431 bpage->vaddr = (vm_offset_t)contigmalloc(PAGE_SIZE, M_DEVBUF,
1436 if (bpage->vaddr == 0) {
1437 free(bpage, M_DEVBUF);
1440 bpage->busaddr = pmap_kextract(bpage->vaddr);
1441 mtx_lock(&bounce_lock);
1442 STAILQ_INSERT_TAIL(&bz->bounce_page_list, bpage, links);
1446 mtx_unlock(&bounce_lock);
1454 reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int commit)
1456 struct bounce_zone *bz;
1459 mtx_assert(&bounce_lock, MA_OWNED);
1460 bz = dmat->bounce_zone;
1461 pages = MIN(bz->free_bpages, map->pagesneeded - map->pagesreserved);
1462 if (commit == 0 && map->pagesneeded > (map->pagesreserved + pages))
1463 return (map->pagesneeded - (map->pagesreserved + pages));
1464 bz->free_bpages -= pages;
1465 bz->reserved_bpages += pages;
1466 map->pagesreserved += pages;
1467 pages = map->pagesneeded - map->pagesreserved;
1473 add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map, vm_offset_t vaddr,
1474 bus_addr_t addr, bus_size_t size)
1476 struct bounce_zone *bz;
1477 struct bounce_page *bpage;
1479 KASSERT(dmat->bounce_zone != NULL, ("no bounce zone in dma tag"));
1480 KASSERT(map != NULL,
1481 ("add_bounce_page: bad map %p", map));
1483 bz = dmat->bounce_zone;
1484 if (map->pagesneeded == 0)
1485 panic("add_bounce_page: map doesn't need any pages");
1488 if (map->pagesreserved == 0)
1489 panic("add_bounce_page: map doesn't need any pages");
1490 map->pagesreserved--;
1492 mtx_lock(&bounce_lock);
1493 bpage = STAILQ_FIRST(&bz->bounce_page_list);
1495 panic("add_bounce_page: free page list is empty");
1497 STAILQ_REMOVE_HEAD(&bz->bounce_page_list, links);
1498 bz->reserved_bpages--;
1499 bz->active_bpages++;
1500 mtx_unlock(&bounce_lock);
1502 if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) {
1503 /* Page offset needs to be preserved. */
1504 bpage->vaddr |= vaddr & PAGE_MASK;
1505 bpage->busaddr |= vaddr & PAGE_MASK;
1507 bpage->datavaddr = vaddr;
1508 bpage->dataaddr = addr;
1509 bpage->datacount = size;
1510 STAILQ_INSERT_TAIL(&(map->bpages), bpage, links);
1511 return (bpage->busaddr);
1515 free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage)
1517 struct bus_dmamap *map;
1518 struct bounce_zone *bz;
1520 bz = dmat->bounce_zone;
1521 bpage->datavaddr = 0;
1522 bpage->datacount = 0;
1523 if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) {
1525 * Reset the bounce page to start at offset 0. Other uses
1526 * of this bounce page may need to store a full page of
1527 * data and/or assume it starts on a page boundary.
1529 bpage->vaddr &= ~PAGE_MASK;
1530 bpage->busaddr &= ~PAGE_MASK;
1533 mtx_lock(&bounce_lock);
1534 STAILQ_INSERT_HEAD(&bz->bounce_page_list, bpage, links);
1536 bz->active_bpages--;
1537 if ((map = STAILQ_FIRST(&bounce_map_waitinglist)) != NULL) {
1538 if (reserve_bounce_pages(map->dmat, map, 1) == 0) {
1539 STAILQ_REMOVE_HEAD(&bounce_map_waitinglist, links);
1540 STAILQ_INSERT_TAIL(&bounce_map_callbacklist,
1542 busdma_swi_pending = 1;
1543 bz->total_deferred++;
1544 swi_sched(vm_ih, 0);
1547 mtx_unlock(&bounce_lock);
1554 struct bus_dmamap *map;
1556 mtx_lock(&bounce_lock);
1557 while ((map = STAILQ_FIRST(&bounce_map_callbacklist)) != NULL) {
1558 STAILQ_REMOVE_HEAD(&bounce_map_callbacklist, links);
1559 mtx_unlock(&bounce_lock);
1561 (dmat->lockfunc)(dmat->lockfuncarg, BUS_DMA_LOCK);
1562 bus_dmamap_load_mem(map->dmat, map, &map->mem, map->callback,
1563 map->callback_arg, BUS_DMA_WAITOK);
1564 (dmat->lockfunc)(dmat->lockfuncarg, BUS_DMA_UNLOCK);
1565 mtx_lock(&bounce_lock);
1567 mtx_unlock(&bounce_lock);