sys/arm/arm/busdma_machdep.c

   1 /*-
   2  * Copyright (c) 2004 Olivier Houchard
   3  * Copyright (c) 2002 Peter Grehan
   4  * Copyright (c) 1997, 1998 Justin T. Gibbs.
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions, and the following disclaimer,
  12  *    without modification, immediately at the beginning of the file.
  13  * 2. The name of the author may not be used to endorse or promote products
  14  *    derived from this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
  20  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  26  * SUCH DAMAGE.
  27  *
  28  *   From i386/busdma_machdep.c,v 1.26 2002/04/19 22:58:09 alfred
  29  */
  30
  31 #include <sys/cdefs.h>
  32 __FBSDID("$FreeBSD$");
  33
  34 /*
  35  * ARM bus dma support routines
  36  */
  37
  38 #define _ARM32_BUS_DMA_PRIVATE
  39 #include <sys/param.h>
  40 #include <sys/systm.h>
  41 #include <sys/malloc.h>
  42 #include <sys/bus.h>
  43 #include <sys/interrupt.h>
  44 #include <sys/lock.h>
  45 #include <sys/proc.h>
  46 #include <sys/mutex.h>
  47 #include <sys/mbuf.h>
  48 #include <sys/uio.h>
  49 #include <sys/ktr.h>
  50 #include <sys/kernel.h>
  51 #include <sys/sysctl.h>
  52
  53 #include <vm/vm.h>
  54 #include <vm/vm_page.h>
  55 #include <vm/vm_map.h>
  56
  57 #include <machine/atomic.h>
  58 #include <machine/bus.h>
  59 #include <machine/cpufunc.h>
  60 #include <machine/md_var.h>
  61
  62 #define MAX_BPAGES 64
  63 #define BUS_DMA_COULD_BOUNCE    BUS_DMA_BUS3
  64 #define BUS_DMA_MIN_ALLOC_COMP  BUS_DMA_BUS4
  65
  66 struct bounce_zone;
  67
  68 struct bus_dma_tag {
  69         bus_dma_tag_t           parent;
  70         bus_size_t              alignment;
  71         bus_size_t              boundary;
  72         bus_addr_t              lowaddr;
  73         bus_addr_t              highaddr;
  74         bus_dma_filter_t        *filter;
  75         void                    *filterarg;
  76         bus_size_t              maxsize;
  77         u_int                   nsegments;
  78         bus_size_t              maxsegsz;
  79         int                     flags;
  80         int                     ref_count;
  81         int                     map_count;
  82         bus_dma_lock_t          *lockfunc;
  83         void                    *lockfuncarg;
  84         /*
  85          * DMA range for this tag.  If the page doesn't fall within
  86          * one of these ranges, an error is returned.  The caller
  87          * may then decide what to do with the transfer.  If the
  88          * range pointer is NULL, it is ignored.
  89          */
  90         struct arm32_dma_range  *ranges;
  91         int                     _nranges;
  92         struct bounce_zone *bounce_zone;
  93 };
  94
  95 struct bounce_page {
  96         vm_offset_t     vaddr;          /* kva of bounce buffer */
  97         vm_offset_t     vaddr_nocache;  /* kva of bounce buffer uncached */
  98         bus_addr_t      busaddr;        /* Physical address */
  99         vm_offset_t     datavaddr;      /* kva of client data */
 100         bus_size_t      datacount;      /* client data count */
 101         STAILQ_ENTRY(bounce_page) links;
 102 };
 103
 104 int busdma_swi_pending;
 105
 106 struct bounce_zone {
 107         STAILQ_ENTRY(bounce_zone) links;
 108         STAILQ_HEAD(bp_list, bounce_page) bounce_page_list;
 109         int             total_bpages;
 110         int             free_bpages;
 111         int             reserved_bpages;
 112         int             active_bpages;
 113         int             total_bounced;
 114         int             total_deferred;
 115         bus_size_t      alignment;
 116         bus_size_t      boundary;
 117         bus_addr_t      lowaddr;
 118         char            zoneid[8];
 119         char            lowaddrid[20];
 120         struct sysctl_ctx_list sysctl_tree;
 121         struct sysctl_oid *sysctl_tree_top;
 122 };
 123
 124 static struct mtx bounce_lock;
 125 static int total_bpages;
 126 static int busdma_zonecount;
 127 static STAILQ_HEAD(, bounce_zone) bounce_zone_list;
 128
 129 SYSCTL_NODE(_hw, OID_AUTO, busdma, CTLFLAG_RD, 0, "Busdma parameters");
 130 SYSCTL_INT(_hw_busdma, OID_AUTO, total_bpages, CTLFLAG_RD, &total_bpages, 0,
 131            "Total bounce pages");
 132
 133 #define DMAMAP_LINEAR           0x1
 134 #define DMAMAP_MBUF             0x2
 135 #define DMAMAP_UIO              0x4
 136 #define DMAMAP_ALLOCATED        0x10
 137 #define DMAMAP_TYPE_MASK        (DMAMAP_LINEAR|DMAMAP_MBUF|DMAMAP_UIO)
 138 #define DMAMAP_COHERENT         0x8
 139 struct bus_dmamap {
 140         struct bp_list  bpages;
 141         int             pagesneeded;
 142         int             pagesreserved;
 143         bus_dma_tag_t   dmat;
 144         int             flags;
 145         void            *buffer;
 146         void            *origbuffer;
 147         void            *allocbuffer;
 148         TAILQ_ENTRY(bus_dmamap) freelist;
 149         int             len;
 150         STAILQ_ENTRY(bus_dmamap) links;
 151         bus_dmamap_callback_t *callback;
 152         void                  *callback_arg;
 153
 154 };
 155
 156 static STAILQ_HEAD(, bus_dmamap) bounce_map_waitinglist;
 157 static STAILQ_HEAD(, bus_dmamap) bounce_map_callbacklist;
 158
 159 static TAILQ_HEAD(,bus_dmamap) dmamap_freelist =
 160         TAILQ_HEAD_INITIALIZER(dmamap_freelist);
 161
 162 #define BUSDMA_STATIC_MAPS      500
 163 static struct bus_dmamap map_pool[BUSDMA_STATIC_MAPS];
 164
 165 static struct mtx busdma_mtx;
 166
 167 MTX_SYSINIT(busdma_mtx, &busdma_mtx, "busdma lock", MTX_DEF);
 168
 169 static void init_bounce_pages(void *dummy);
 170 static int alloc_bounce_zone(bus_dma_tag_t dmat);
 171 static int alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages);
 172 static int reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map,
 173                                 int commit);
 174 static bus_addr_t add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map,
 175                                    vm_offset_t vaddr, bus_size_t size);
 176 static void free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage);
 177
 178 /* Default tag, as most drivers provide no parent tag. */
 179 bus_dma_tag_t arm_root_dma_tag;
 180
 181 /*
 182  * Return true if a match is made.
 183  *
 184  * To find a match walk the chain of bus_dma_tag_t's looking for 'paddr'.
 185  *
 186  * If paddr is within the bounds of the dma tag then call the filter callback
 187  * to check for a match, if there is no filter callback then assume a match.
 188  */
 189 static int
 190 run_filter(bus_dma_tag_t dmat, bus_addr_t paddr)
 191 {
 192         int retval;
 193
 194         retval = 0;
 195
 196         do {
 197                 if (((paddr > dmat->lowaddr && paddr <= dmat->highaddr)
 198                  || ((paddr & (dmat->alignment - 1)) != 0))
 199                  && (dmat->filter == NULL
 200                   || (*dmat->filter)(dmat->filterarg, paddr) != 0))
 201                         retval = 1;
 202
 203                 dmat = dmat->parent;
 204         } while (retval == 0 && dmat != NULL);
 205         return (retval);
 206 }
 207
 208 static void
 209 arm_dmamap_freelist_init(void *dummy)
 210 {
 211         int i;
 212
 213         for (i = 0; i < BUSDMA_STATIC_MAPS; i++)
 214                 TAILQ_INSERT_HEAD(&dmamap_freelist, &map_pool[i], freelist);
 215 }
 216
 217 SYSINIT(busdma, SI_SUB_VM, SI_ORDER_ANY, arm_dmamap_freelist_init, NULL);
 218
 219 /*
 220  * Check to see if the specified page is in an allowed DMA range.
 221  */
 222
 223 static __inline int
 224 bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dma_segment_t *segs,
 225     bus_dmamap_t map, void *buf, bus_size_t buflen, struct pmap *pmap,
 226     int flags, vm_offset_t *lastaddrp, int *segp);
 227
 228 static __inline int
 229 _bus_dma_can_bounce(vm_offset_t lowaddr, vm_offset_t highaddr)
 230 {
 231         int i;
 232         for (i = 0; phys_avail[i] && phys_avail[i + 1]; i += 2) {
 233                 if ((lowaddr >= phys_avail[i] && lowaddr <= phys_avail[i + 1])
 234                     || (lowaddr < phys_avail[i] &&
 235                     highaddr > phys_avail[i]))
 236                         return (1);
 237         }
 238         return (0);
 239 }
 240
 241 static __inline struct arm32_dma_range *
 242 _bus_dma_inrange(struct arm32_dma_range *ranges, int nranges,
 243     bus_addr_t curaddr)
 244 {
 245         struct arm32_dma_range *dr;
 246         int i;
 247
 248         for (i = 0, dr = ranges; i < nranges; i++, dr++) {
 249                 if (curaddr >= dr->dr_sysbase &&
 250                     round_page(curaddr) <= (dr->dr_sysbase + dr->dr_len))
 251                         return (dr);
 252         }
 253
 254         return (NULL);
 255 }
 256 /*
 257  * Convenience function for manipulating driver locks from busdma (during
 258  * busdma_swi, for example).  Drivers that don't provide their own locks
 259  * should specify &Giant to dmat->lockfuncarg.  Drivers that use their own
 260  * non-mutex locking scheme don't have to use this at all.
 261  */
 262 void
 263 busdma_lock_mutex(void *arg, bus_dma_lock_op_t op)
 264 {
 265         struct mtx *dmtx;
 266
 267         dmtx = (struct mtx *)arg;
 268         switch (op) {
 269         case BUS_DMA_LOCK:
 270                 mtx_lock(dmtx);
 271                 break;
 272         case BUS_DMA_UNLOCK:
 273                 mtx_unlock(dmtx);
 274                 break;
 275         default:
 276                 panic("Unknown operation 0x%x for busdma_lock_mutex!", op);
 277         }
 278 }
 279
 280 /*
 281  * dflt_lock should never get called.  It gets put into the dma tag when
 282  * lockfunc == NULL, which is only valid if the maps that are associated
 283  * with the tag are meant to never be defered.
 284  * XXX Should have a way to identify which driver is responsible here.
 285  */
 286 static void
 287 dflt_lock(void *arg, bus_dma_lock_op_t op)
 288 {
 289 #ifdef INVARIANTS
 290         panic("driver error: busdma dflt_lock called");
 291 #else
 292         printf("DRIVER_ERROR: busdma dflt_lock called\n");
 293 #endif
 294 }
 295
 296 static __inline bus_dmamap_t
 297 _busdma_alloc_dmamap(void)
 298 {
 299         bus_dmamap_t map;
 300
 301         mtx_lock(&busdma_mtx);
 302         map = TAILQ_FIRST(&dmamap_freelist);
 303         if (map)
 304                 TAILQ_REMOVE(&dmamap_freelist, map, freelist);
 305         mtx_unlock(&busdma_mtx);
 306         if (!map) {
 307                 map = malloc(sizeof(*map), M_DEVBUF, M_NOWAIT | M_ZERO);
 308                 if (map)
 309                         map->flags = DMAMAP_ALLOCATED;
 310         } else
 311                 map->flags = 0;
 312         STAILQ_INIT(&map->bpages);
 313         return (map);
 314 }
 315
 316 static __inline void
 317 _busdma_free_dmamap(bus_dmamap_t map)
 318 {
 319         if (map->flags & DMAMAP_ALLOCATED)
 320                 free(map, M_DEVBUF);
 321         else {
 322                 mtx_lock(&busdma_mtx);
 323                 TAILQ_INSERT_HEAD(&dmamap_freelist, map, freelist);
 324                 mtx_unlock(&busdma_mtx);
 325         }
 326 }
 327
 328 /*
 329  * Allocate a device specific dma_tag.
 330  */
 331 #define SEG_NB 1024
 332
 333 int
 334 bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment,
 335                    bus_size_t boundary, bus_addr_t lowaddr,
 336                    bus_addr_t highaddr, bus_dma_filter_t *filter,
 337                    void *filterarg, bus_size_t maxsize, int nsegments,
 338                    bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc,
 339                    void *lockfuncarg, bus_dma_tag_t *dmat)
 340 {
 341         bus_dma_tag_t newtag;
 342         int error = 0;
 343         /* Return a NULL tag on failure */
 344         *dmat = NULL;
 345         if (!parent)
 346                 parent = arm_root_dma_tag;
 347
 348         newtag = (bus_dma_tag_t)malloc(sizeof(*newtag), M_DEVBUF, M_NOWAIT);
 349         if (newtag == NULL) {
 350                 CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d",
 351                     __func__, newtag, 0, error);
 352                 return (ENOMEM);
 353         }
 354
 355         newtag->parent = parent;
 356         newtag->alignment = alignment;
 357         newtag->boundary = boundary;
 358         newtag->lowaddr = trunc_page((vm_offset_t)lowaddr) + (PAGE_SIZE - 1);
 359         newtag->highaddr = trunc_page((vm_offset_t)highaddr) + (PAGE_SIZE - 1);
 360         newtag->filter = filter;
 361         newtag->filterarg = filterarg;
 362         newtag->maxsize = maxsize;
 363         newtag->nsegments = nsegments;
 364         newtag->maxsegsz = maxsegsz;
 365         newtag->flags = flags;
 366         newtag->ref_count = 1; /* Count ourself */
 367         newtag->map_count = 0;
 368         newtag->ranges = bus_dma_get_range();
 369         newtag->_nranges = bus_dma_get_range_nb();
 370         if (lockfunc != NULL) {
 371                 newtag->lockfunc = lockfunc;
 372                 newtag->lockfuncarg = lockfuncarg;
 373         } else {
 374                 newtag->lockfunc = dflt_lock;
 375                 newtag->lockfuncarg = NULL;
 376         }
 377         /*
 378          * Take into account any restrictions imposed by our parent tag
 379          */
 380         if (parent != NULL) {
 381                 newtag->lowaddr = min(parent->lowaddr, newtag->lowaddr);
 382                 newtag->highaddr = max(parent->highaddr, newtag->highaddr);
 383                 if (newtag->boundary == 0)
 384                         newtag->boundary = parent->boundary;
 385                 else if (parent->boundary != 0)
 386                         newtag->boundary = min(parent->boundary,
 387                                                newtag->boundary);
 388                 if ((newtag->filter != NULL) ||
 389                     ((parent->flags & BUS_DMA_COULD_BOUNCE) != 0))
 390                         newtag->flags |= BUS_DMA_COULD_BOUNCE;
 391                 if (newtag->filter == NULL) {
 392                         /*
 393                          * Short circuit looking at our parent directly
 394                          * since we have encapsulated all of its information
 395                          */
 396                         newtag->filter = parent->filter;
 397                         newtag->filterarg = parent->filterarg;
 398                         newtag->parent = parent->parent;
 399                 }
 400                 if (newtag->parent != NULL)
 401                         atomic_add_int(&parent->ref_count, 1);
 402         }
 403         if (_bus_dma_can_bounce(newtag->lowaddr, newtag->highaddr)
 404          || newtag->alignment > 1)
 405                 newtag->flags |= BUS_DMA_COULD_BOUNCE;
 406
 407         if (((newtag->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
 408             (flags & BUS_DMA_ALLOCNOW) != 0) {
 409                 struct bounce_zone *bz;
 410
 411                 /* Must bounce */
 412
 413                 if ((error = alloc_bounce_zone(newtag)) != 0) {
 414                         free(newtag, M_DEVBUF);
 415                         return (error);
 416                 }
 417                 bz = newtag->bounce_zone;
 418
 419                 if (ptoa(bz->total_bpages) < maxsize) {
 420                         int pages;
 421
 422                         pages = atop(maxsize) - bz->total_bpages;
 423
 424                         /* Add pages to our bounce pool */
 425                         if (alloc_bounce_pages(newtag, pages) < pages)
 426                                 error = ENOMEM;
 427                 }
 428                 /* Performed initial allocation */
 429                 newtag->flags |= BUS_DMA_MIN_ALLOC_COMP;
 430         } else
 431                 newtag->bounce_zone = NULL;
 432         if (error != 0)
 433                 free(newtag, M_DEVBUF);
 434         else
 435                 *dmat = newtag;
 436         CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d",
 437             __func__, newtag, (newtag != NULL ? newtag->flags : 0), error);
 438
 439         return (error);
 440 }
 441
 442 int
 443 bus_dma_tag_destroy(bus_dma_tag_t dmat)
 444 {
 445 #ifdef KTR
 446         bus_dma_tag_t dmat_copy = dmat;
 447 #endif
 448
 449         if (dmat != NULL) {
 450
 451                 if (dmat->map_count != 0)
 452                         return (EBUSY);
 453
 454                 while (dmat != NULL) {
 455                         bus_dma_tag_t parent;
 456
 457                         parent = dmat->parent;
 458                         atomic_subtract_int(&dmat->ref_count, 1);
 459                         if (dmat->ref_count == 0) {
 460                                 free(dmat, M_DEVBUF);
 461                                 /*
 462                                  * Last reference count, so
 463                                  * release our reference
 464                                  * count on our parent.
 465                                  */
 466                                 dmat = parent;
 467                         } else
 468                                 dmat = NULL;
 469                 }
 470         }
 471         CTR2(KTR_BUSDMA, "%s tag %p", __func__, dmat_copy);
 472
 473         return (0);
 474 }
 475
 476 #include <sys/kdb.h>
 477 /*
 478  * Allocate a handle for mapping from kva/uva/physical
 479  * address space into bus device space.
 480  */
 481 int
 482 bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp)
 483 {
 484         bus_dmamap_t newmap;
 485         int error = 0;
 486
 487         newmap = _busdma_alloc_dmamap();
 488         if (newmap == NULL) {
 489                 CTR3(KTR_BUSDMA, "%s: tag %p error %d", __func__, dmat, ENOMEM);
 490                 return (ENOMEM);
 491         }
 492         *mapp = newmap;
 493         newmap->dmat = dmat;
 494         newmap->allocbuffer = NULL;
 495         dmat->map_count++;
 496
 497         /*
 498          * Bouncing might be required if the driver asks for an active
 499          * exclusion region, a data alignment that is stricter than 1, and/or
 500          * an active address boundary.
 501          */
 502         if (dmat->flags & BUS_DMA_COULD_BOUNCE) {
 503
 504                 /* Must bounce */
 505                 struct bounce_zone *bz;
 506                 int maxpages;
 507
 508                 if (dmat->bounce_zone == NULL) {
 509                         if ((error = alloc_bounce_zone(dmat)) != 0) {
 510                                 _busdma_free_dmamap(newmap);
 511                                 *mapp = NULL;
 512                                 return (error);
 513                         }
 514                 }
 515                 bz = dmat->bounce_zone;
 516
 517                 /* Initialize the new map */
 518                 STAILQ_INIT(&((*mapp)->bpages));
 519
 520                 /*
 521                  * Attempt to add pages to our pool on a per-instance
 522                  * basis up to a sane limit.
 523                  */
 524                 maxpages = MAX_BPAGES;
 525                 if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0
 526                  || (dmat->map_count > 0 && bz->total_bpages < maxpages)) {
 527                         int pages;
 528
 529                         pages = MAX(atop(dmat->maxsize), 1);
 530                         pages = MIN(maxpages - bz->total_bpages, pages);
 531                         pages = MAX(pages, 1);
 532                         if (alloc_bounce_pages(dmat, pages) < pages)
 533                                 error = ENOMEM;
 534
 535                         if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0) {
 536                                 if (error == 0)
 537                                         dmat->flags |= BUS_DMA_MIN_ALLOC_COMP;
 538                         } else {
 539                                 error = 0;
 540                         }
 541                 }
 542         }
 543         CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
 544             __func__, dmat, dmat->flags, error);
 545
 546         return (0);
 547 }
 548
 549 /*
 550  * Destroy a handle for mapping from kva/uva/physical
 551  * address space into bus device space.
 552  */
 553 int
 554 bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map)
 555 {
 556
 557         _busdma_free_dmamap(map);
 558         if (STAILQ_FIRST(&map->bpages) != NULL) {
 559                 CTR3(KTR_BUSDMA, "%s: tag %p error %d",
 560                     __func__, dmat, EBUSY);
 561                 return (EBUSY);
 562         }
 563         dmat->map_count--;
 564         CTR2(KTR_BUSDMA, "%s: tag %p error 0", __func__, dmat);
 565         return (0);
 566 }
 567
 568 /*
 569  * Allocate a piece of memory that can be efficiently mapped into
 570  * bus device space based on the constraints lited in the dma tag.
 571  * A dmamap to for use with dmamap_load is also allocated.
 572  */
 573 int
 574 bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags,
 575                  bus_dmamap_t *mapp)
 576 {
 577         bus_dmamap_t newmap = NULL;
 578
 579         int mflags;
 580
 581         if (flags & BUS_DMA_NOWAIT)
 582                 mflags = M_NOWAIT;
 583         else
 584                 mflags = M_WAITOK;
 585         if (flags & BUS_DMA_ZERO)
 586                 mflags |= M_ZERO;
 587
 588         newmap = _busdma_alloc_dmamap();
 589         if (newmap == NULL) {
 590                 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
 591                     __func__, dmat, dmat->flags, ENOMEM);
 592                 return (ENOMEM);
 593         }
 594         dmat->map_count++;
 595         *mapp = newmap;
 596         newmap->dmat = dmat;
 597
 598         if (dmat->maxsize <= PAGE_SIZE &&
 599            (dmat->alignment < dmat->maxsize) &&
 600            !_bus_dma_can_bounce(dmat->lowaddr, dmat->highaddr)) {
 601                 *vaddr = malloc(dmat->maxsize, M_DEVBUF, mflags);
 602         } else {
 603                 /*
 604                  * XXX Use Contigmalloc until it is merged into this facility
 605                  *     and handles multi-seg allocations.  Nobody is doing
 606                  *     multi-seg allocations yet though.
 607                  */
 608                 *vaddr = contigmalloc(dmat->maxsize, M_DEVBUF, mflags,
 609                     0ul, dmat->lowaddr, dmat->alignment? dmat->alignment : 1ul,
 610                     dmat->boundary);
 611         }
 612         if (*vaddr == NULL) {
 613                 if (newmap != NULL) {
 614                         _busdma_free_dmamap(newmap);
 615                         dmat->map_count--;
 616                 }
 617                 *mapp = NULL;
 618                 return (ENOMEM);
 619         }
 620         if (flags & BUS_DMA_COHERENT) {
 621                 void *tmpaddr = arm_remap_nocache(
 622                     (void *)((vm_offset_t)*vaddr &~ PAGE_MASK),
 623                     dmat->maxsize + ((vm_offset_t)*vaddr & PAGE_MASK));
 624
 625                 if (tmpaddr) {
 626                         tmpaddr = (void *)((vm_offset_t)(tmpaddr) +
 627                             ((vm_offset_t)*vaddr & PAGE_MASK));
 628                         newmap->origbuffer = *vaddr;
 629                         newmap->allocbuffer = tmpaddr;
 630                         cpu_idcache_wbinv_range((vm_offset_t)*vaddr,
 631                             dmat->maxsize);
 632                         cpu_l2cache_wbinv_range((vm_offset_t)*vaddr,
 633                             dmat->maxsize);
 634                         *vaddr = tmpaddr;
 635                 } else
 636                         newmap->origbuffer = newmap->allocbuffer = NULL;
 637         } else
 638                 newmap->origbuffer = newmap->allocbuffer = NULL;
 639         return (0);
 640 }
 641
 642 /*
 643  * Free a piece of memory and it's allocated dmamap, that was allocated
 644  * via bus_dmamem_alloc.  Make the same choice for free/contigfree.
 645  */
 646 void
 647 bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map)
 648 {
 649         if (map->allocbuffer) {
 650                 KASSERT(map->allocbuffer == vaddr,
 651                     ("Trying to freeing the wrong DMA buffer"));
 652                 vaddr = map->origbuffer;
 653                 arm_unmap_nocache(map->allocbuffer, dmat->maxsize);
 654         }
 655         if (dmat->maxsize <= PAGE_SIZE &&
 656            dmat->alignment < dmat->maxsize &&
 657             !_bus_dma_can_bounce(dmat->lowaddr, dmat->highaddr))
 658                 free(vaddr, M_DEVBUF);
 659         else {
 660                 contigfree(vaddr, dmat->maxsize, M_DEVBUF);
 661         }
 662         dmat->map_count--;
 663         _busdma_free_dmamap(map);
 664         CTR3(KTR_BUSDMA, "%s: tag %p flags 0x%x", __func__, dmat, dmat->flags);
 665 }
 666
 667 static int
 668 _bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf,
 669                         bus_size_t buflen, int flags)
 670 {
 671         vm_offset_t vaddr;
 672         vm_offset_t vendaddr;
 673         bus_addr_t paddr;
 674
 675         if ((map->pagesneeded == 0)) {
 676                 CTR4(KTR_BUSDMA, "lowaddr= %d Maxmem= %d, boundary= %d, "
 677                     "alignment= %d", dmat->lowaddr, ptoa((vm_paddr_t)Maxmem),
 678                     dmat->boundary, dmat->alignment);
 679                 CTR2(KTR_BUSDMA, "map= %p, pagesneeded= %d",
 680                     map, map->pagesneeded);
 681                 /*
 682                  * Count the number of bounce pages
 683                  * needed in order to complete this transfer
 684                  */
 685                 vaddr = trunc_page((vm_offset_t)buf);
 686                 vendaddr = (vm_offset_t)buf + buflen;
 687
 688                 while (vaddr < vendaddr) {
 689                         paddr = pmap_kextract(vaddr);
 690                         if (((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
 691                             run_filter(dmat, paddr) != 0)
 692                                 map->pagesneeded++;
 693                         vaddr += PAGE_SIZE;
 694                 }
 695                 CTR1(KTR_BUSDMA, "pagesneeded= %d\n", map->pagesneeded);
 696         }
 697
 698         /* Reserve Necessary Bounce Pages */
 699         if (map->pagesneeded != 0) {
 700                 mtx_lock(&bounce_lock);
 701                 if (flags & BUS_DMA_NOWAIT) {
 702                         if (reserve_bounce_pages(dmat, map, 0) != 0) {
 703                                 mtx_unlock(&bounce_lock);
 704                                 return (ENOMEM);
 705                         }
 706                 } else {
 707                         if (reserve_bounce_pages(dmat, map, 1) != 0) {
 708                                 /* Queue us for resources */
 709                                 STAILQ_INSERT_TAIL(&bounce_map_waitinglist,
 710                                     map, links);
 711                                 mtx_unlock(&bounce_lock);
 712                                 return (EINPROGRESS);
 713                         }
 714                 }
 715                 mtx_unlock(&bounce_lock);
 716         }
 717
 718         return (0);
 719 }
 720
 721 /*
 722  * Utility function to load a linear buffer.  lastaddrp holds state
 723  * between invocations (for multiple-buffer loads).  segp contains
 724  * the starting segment on entrance, and the ending segment on exit.
 725  * first indicates if this is the first invocation of this function.
 726  */
 727 static __inline int
 728 bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dma_segment_t *segs,
 729     bus_dmamap_t map, void *buf, bus_size_t buflen, struct pmap *pmap,
 730     int flags, vm_offset_t *lastaddrp, int *segp)
 731 {
 732         bus_size_t sgsize;
 733         bus_addr_t curaddr, lastaddr, baddr, bmask;
 734         vm_offset_t vaddr = (vm_offset_t)buf;
 735         int seg;
 736         int error = 0;
 737         pd_entry_t *pde;
 738         pt_entry_t pte;
 739         pt_entry_t *ptep;
 740
 741         lastaddr = *lastaddrp;
 742         bmask = ~(dmat->boundary - 1);
 743
 744         if ((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) {
 745                 error = _bus_dmamap_count_pages(dmat, map, buf, buflen, flags);
 746                 if (error)
 747                         return (error);
 748         }
 749         CTR3(KTR_BUSDMA, "lowaddr= %d boundary= %d, "
 750             "alignment= %d", dmat->lowaddr, dmat->boundary, dmat->alignment);
 751
 752         for (seg = *segp; buflen > 0 ; ) {
 753                 /*
 754                  * Get the physical address for this segment.
 755                  *
 756                  * XXX Don't support checking for coherent mappings
 757                  * XXX in user address space.
 758                  */
 759                 if (__predict_true(pmap == pmap_kernel())) {
 760                         if (pmap_get_pde_pte(pmap, vaddr, &pde, &ptep) == FALSE)
 761                                 return (EFAULT);
 762
 763                         if (__predict_false(pmap_pde_section(pde))) {
 764                                 if (*pde & L1_S_SUPERSEC)
 765                                         curaddr = (*pde & L1_SUP_FRAME) |
 766                                             (vaddr & L1_SUP_OFFSET);
 767                                 else
 768                                         curaddr = (*pde & L1_S_FRAME) |
 769                                             (vaddr & L1_S_OFFSET);
 770                                 if (*pde & L1_S_CACHE_MASK) {
 771                                         map->flags &=
 772                                             ~DMAMAP_COHERENT;
 773                                 }
 774                         } else {
 775                                 pte = *ptep;
 776                                 KASSERT((pte & L2_TYPE_MASK) != L2_TYPE_INV,
 777                                     ("INV type"));
 778                                 if (__predict_false((pte & L2_TYPE_MASK)
 779                                                     == L2_TYPE_L)) {
 780                                         curaddr = (pte & L2_L_FRAME) |
 781                                             (vaddr & L2_L_OFFSET);
 782                                         if (pte & L2_L_CACHE_MASK) {
 783                                                 map->flags &=
 784                                                     ~DMAMAP_COHERENT;
 785
 786                                         }
 787                                 } else {
 788                                         curaddr = (pte & L2_S_FRAME) |
 789                                             (vaddr & L2_S_OFFSET);
 790                                         if (pte & L2_S_CACHE_MASK) {
 791                                                 map->flags &=
 792                                                     ~DMAMAP_COHERENT;
 793                                         }
 794                                 }
 795                         }
 796                 } else {
 797                         curaddr = pmap_extract(pmap, vaddr);
 798                         map->flags &= ~DMAMAP_COHERENT;
 799                 }
 800
 801                 /*
 802                  * Compute the segment size, and adjust counts.
 803                  */
 804                 sgsize = PAGE_SIZE - ((u_long)curaddr & PAGE_MASK);
 805                 if (sgsize > dmat->maxsegsz)
 806                         sgsize = dmat->maxsegsz;
 807                 if (buflen < sgsize)
 808                         sgsize = buflen;
 809
 810                 /*
 811                  * Make sure we don't cross any boundaries.
 812                  */
 813                 if (dmat->boundary > 0) {
 814                         baddr = (curaddr + dmat->boundary) & bmask;
 815                         if (sgsize > (baddr - curaddr))
 816                                 sgsize = (baddr - curaddr);
 817                 }
 818                 if (((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
 819                     map->pagesneeded != 0 && run_filter(dmat, curaddr))
 820                         curaddr = add_bounce_page(dmat, map, vaddr, sgsize);
 821
 822                 if (dmat->ranges) {
 823                         struct arm32_dma_range *dr;
 824
 825                         dr = _bus_dma_inrange(dmat->ranges, dmat->_nranges,
 826                             curaddr);
 827                         if (dr == NULL)
 828                                 return (EINVAL);
 829                         /*
 830                          * In a valid DMA range.  Translate the physical
 831                          * memory address to an address in the DMA window.
 832                          */
 833                         curaddr = (curaddr - dr->dr_sysbase) + dr->dr_busbase;
 834
 835                 }
 836
 837                 /*
 838                  * Insert chunk into a segment, coalescing with
 839                  * the previous segment if possible.
 840                  */
 841                 if (seg >= 0 && curaddr == lastaddr &&
 842                     (segs[seg].ds_len + sgsize) <= dmat->maxsegsz &&
 843                     (dmat->boundary == 0 ||
 844                      (segs[seg].ds_addr & bmask) ==
 845                      (curaddr & bmask))) {
 846                         segs[seg].ds_len += sgsize;
 847                         goto segdone;
 848                 } else {
 849                         if (++seg >= dmat->nsegments)
 850                                 break;
 851                         segs[seg].ds_addr = curaddr;
 852                         segs[seg].ds_len = sgsize;
 853                 }
 854                 if (error)
 855                         break;
 856 segdone:
 857                 lastaddr = curaddr + sgsize;
 858                 vaddr += sgsize;
 859                 buflen -= sgsize;
 860         }
 861
 862         *segp = seg;
 863         *lastaddrp = lastaddr;
 864
 865         /*
 866          * Did we fit?
 867          */
 868         if (buflen != 0)
 869                 error = EFBIG; /* XXX better return value here? */
 870         return (error);
 871 }
 872
 873 /*
 874  * Map the buffer buf into bus space using the dmamap map.
 875  */
 876 int
 877 bus_dmamap_load(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf,
 878                 bus_size_t buflen, bus_dmamap_callback_t *callback,
 879                 void *callback_arg, int flags)
 880 {
 881         vm_offset_t     lastaddr = 0;
 882         int             error, nsegs = -1;
 883 #ifdef __CC_SUPPORTS_DYNAMIC_ARRAY_INIT
 884         bus_dma_segment_t dm_segments[dmat->nsegments];
 885 #else
 886         bus_dma_segment_t dm_segments[BUS_DMAMAP_NSEGS];
 887 #endif
 888
 889         KASSERT(dmat != NULL, ("dmatag is NULL"));
 890         KASSERT(map != NULL, ("dmamap is NULL"));
 891         map->callback = callback;
 892         map->callback_arg = callback_arg;
 893         map->flags &= ~DMAMAP_TYPE_MASK;
 894         map->flags |= DMAMAP_LINEAR|DMAMAP_COHERENT;
 895         map->buffer = buf;
 896         map->len = buflen;
 897         error = bus_dmamap_load_buffer(dmat,
 898             dm_segments, map, buf, buflen, kernel_pmap,
 899             flags, &lastaddr, &nsegs);
 900         if (error == EINPROGRESS)
 901                 return (error);
 902         if (error)
 903                 (*callback)(callback_arg, NULL, 0, error);
 904         else
 905                 (*callback)(callback_arg, dm_segments, nsegs + 1, error);
 906
 907         CTR5(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d nsegs %d",
 908             __func__, dmat, dmat->flags, nsegs + 1, error);
 909
 910         return (error);
 911 }
 912
 913 /*
 914  * Like bus_dmamap_load(), but for mbufs.
 915  */
 916 int
 917 bus_dmamap_load_mbuf(bus_dma_tag_t dmat, bus_dmamap_t map, struct mbuf *m0,
 918                      bus_dmamap_callback2_t *callback, void *callback_arg,
 919                      int flags)
 920 {
 921 #ifdef __CC_SUPPORTS_DYNAMIC_ARRAY_INIT
 922         bus_dma_segment_t dm_segments[dmat->nsegments];
 923 #else
 924         bus_dma_segment_t dm_segments[BUS_DMAMAP_NSEGS];
 925 #endif
 926         int nsegs = -1, error = 0;
 927
 928         M_ASSERTPKTHDR(m0);
 929
 930         map->flags &= ~DMAMAP_TYPE_MASK;
 931         map->flags |= DMAMAP_MBUF | DMAMAP_COHERENT;
 932         map->buffer = m0;
 933         map->len = 0;
 934         if (m0->m_pkthdr.len <= dmat->maxsize) {
 935                 vm_offset_t lastaddr = 0;
 936                 struct mbuf *m;
 937
 938                 for (m = m0; m != NULL && error == 0; m = m->m_next) {
 939                         if (m->m_len > 0) {
 940                                 error = bus_dmamap_load_buffer(dmat,
 941                                     dm_segments, map, m->m_data, m->m_len,
 942                                     pmap_kernel(), flags, &lastaddr, &nsegs);
 943                                 map->len += m->m_len;
 944                         }
 945                 }
 946         } else {
 947                 error = EINVAL;
 948         }
 949
 950         if (error) {
 951                 /*
 952                  * force "no valid mappings" on error in callback.
 953                  */
 954                 (*callback)(callback_arg, dm_segments, 0, 0, error);
 955         } else {
 956                 (*callback)(callback_arg, dm_segments, nsegs + 1,
 957                     m0->m_pkthdr.len, error);
 958         }
 959         CTR5(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d nsegs %d",
 960             __func__, dmat, dmat->flags, error, nsegs + 1);
 961
 962         return (error);
 963 }
 964
 965 int
 966 bus_dmamap_load_mbuf_sg(bus_dma_tag_t dmat, bus_dmamap_t map,
 967                         struct mbuf *m0, bus_dma_segment_t *segs, int *nsegs,
 968                         int flags)
 969 {
 970         int error = 0;
 971         M_ASSERTPKTHDR(m0);
 972
 973         flags |= BUS_DMA_NOWAIT;
 974         *nsegs = -1;
 975         map->flags &= ~DMAMAP_TYPE_MASK;
 976         map->flags |= DMAMAP_MBUF | DMAMAP_COHERENT;
 977         map->buffer = m0;
 978         map->len = 0;
 979         if (m0->m_pkthdr.len <= dmat->maxsize) {
 980                 vm_offset_t lastaddr = 0;
 981                 struct mbuf *m;
 982
 983                 for (m = m0; m != NULL && error == 0; m = m->m_next) {
 984                         if (m->m_len > 0) {
 985                                 error = bus_dmamap_load_buffer(dmat, segs, map,
 986                                                 m->m_data, m->m_len,
 987                                                 pmap_kernel(), flags, &lastaddr,
 988                                                 nsegs);
 989                                 map->len += m->m_len;
 990                         }
 991                 }
 992         } else {
 993                 error = EINVAL;
 994         }
 995
 996         /* XXX FIXME: Having to increment nsegs is really annoying */
 997         ++*nsegs;
 998         CTR5(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d nsegs %d",
 999             __func__, dmat, dmat->flags, error, *nsegs);
1000         return (error);
1001 }
1002
1003 /*
1004  * Like bus_dmamap_load(), but for uios.
1005  */
1006 int
1007 bus_dmamap_load_uio(bus_dma_tag_t dmat, bus_dmamap_t map, struct uio *uio,
1008     bus_dmamap_callback2_t *callback, void *callback_arg,
1009     int flags)
1010 {
1011         vm_offset_t lastaddr = 0;
1012 #ifdef __CC_SUPPORTS_DYNAMIC_ARRAY_INIT
1013         bus_dma_segment_t dm_segments[dmat->nsegments];
1014 #else
1015         bus_dma_segment_t dm_segments[BUS_DMAMAP_NSEGS];
1016 #endif
1017         int nsegs, i, error;
1018         bus_size_t resid;
1019         struct iovec *iov;
1020         struct pmap *pmap;
1021
1022         resid = uio->uio_resid;
1023         iov = uio->uio_iov;
1024         map->flags &= ~DMAMAP_TYPE_MASK;
1025         map->flags |= DMAMAP_UIO|DMAMAP_COHERENT;
1026         map->buffer = uio;
1027         map->len = 0;
1028
1029         if (uio->uio_segflg == UIO_USERSPACE) {
1030                 KASSERT(uio->uio_td != NULL,
1031                     ("bus_dmamap_load_uio: USERSPACE but no proc"));
1032                 pmap = vmspace_pmap(uio->uio_td->td_proc->p_vmspace);
1033         } else
1034                 pmap = kernel_pmap;
1035
1036         error = 0;
1037         nsegs = -1;
1038         for (i = 0; i < uio->uio_iovcnt && resid != 0 && !error; i++) {
1039                 /*
1040                  * Now at the first iovec to load.  Load each iovec
1041                  * until we have exhausted the residual count.
1042                  */
1043                 bus_size_t minlen =
1044                     resid < iov[i].iov_len ? resid : iov[i].iov_len;
1045                 caddr_t addr = (caddr_t) iov[i].iov_base;
1046
1047                 if (minlen > 0) {
1048                         error = bus_dmamap_load_buffer(dmat, dm_segments, map,
1049                             addr, minlen, pmap, flags, &lastaddr, &nsegs);
1050
1051                         map->len += minlen;
1052                         resid -= minlen;
1053                 }
1054         }
1055
1056         if (error) {
1057                 /*
1058                  * force "no valid mappings" on error in callback.
1059                  */
1060                 (*callback)(callback_arg, dm_segments, 0, 0, error);
1061         } else {
1062                 (*callback)(callback_arg, dm_segments, nsegs+1,
1063                     uio->uio_resid, error);
1064         }
1065
1066         CTR5(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d nsegs %d",
1067             __func__, dmat, dmat->flags, error, nsegs + 1);
1068         return (error);
1069 }
1070
1071 /*
1072  * Release the mapping held by map.
1073  */
1074 void
1075 _bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map)
1076 {
1077         struct bounce_page *bpage;
1078
1079         map->flags &= ~DMAMAP_TYPE_MASK;
1080         while ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) {
1081                 STAILQ_REMOVE_HEAD(&map->bpages, links);
1082                 free_bounce_page(dmat, bpage);
1083         }
1084         return;
1085 }
1086
1087 static void
1088 bus_dmamap_sync_buf(void *buf, int len, bus_dmasync_op_t op)
1089 {
1090         char _tmp_cl[arm_dcache_align], _tmp_clend[arm_dcache_align];
1091
1092         if ((op & BUS_DMASYNC_PREWRITE) && !(op & BUS_DMASYNC_PREREAD)) {
1093                 cpu_dcache_wb_range((vm_offset_t)buf, len);
1094                 cpu_l2cache_wb_range((vm_offset_t)buf, len);
1095         }
1096         if (op & BUS_DMASYNC_PREREAD) {
1097                 if (!(op & BUS_DMASYNC_PREWRITE) &&
1098                     ((((vm_offset_t)(buf) | len) & arm_dcache_align_mask) == 0)) {
1099                         cpu_dcache_inv_range((vm_offset_t)buf, len);
1100                         cpu_l2cache_inv_range((vm_offset_t)buf, len);
1101                 } else {
1102                         cpu_dcache_wbinv_range((vm_offset_t)buf, len);
1103                         cpu_l2cache_wbinv_range((vm_offset_t)buf, len);
1104                 }
1105         }
1106         if (op & BUS_DMASYNC_POSTREAD) {
1107                 if ((vm_offset_t)buf & arm_dcache_align_mask) {
1108                         memcpy(_tmp_cl, (void *)((vm_offset_t)buf & ~
1109                             arm_dcache_align_mask),
1110                             (vm_offset_t)buf & arm_dcache_align_mask);
1111                 }
1112                 if (((vm_offset_t)buf + len) & arm_dcache_align_mask) {
1113                         memcpy(_tmp_clend, (void *)((vm_offset_t)buf + len),
1114                             arm_dcache_align - (((vm_offset_t)(buf) + len) &
1115                            arm_dcache_align_mask));
1116                 }
1117                 cpu_dcache_inv_range((vm_offset_t)buf, len);
1118                 cpu_l2cache_inv_range((vm_offset_t)buf, len);
1119
1120                 if ((vm_offset_t)buf & arm_dcache_align_mask)
1121                         memcpy((void *)((vm_offset_t)buf &
1122                             ~arm_dcache_align_mask), _tmp_cl,
1123                             (vm_offset_t)buf & arm_dcache_align_mask);
1124                 if (((vm_offset_t)buf + len) & arm_dcache_align_mask)
1125                         memcpy((void *)((vm_offset_t)buf + len), _tmp_clend,
1126                             arm_dcache_align - (((vm_offset_t)(buf) + len) &
1127                            arm_dcache_align_mask));
1128         }
1129 }
1130
1131 static void
1132 _bus_dmamap_sync_bp(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op)
1133 {
1134         struct bounce_page *bpage;
1135
1136         STAILQ_FOREACH(bpage, &map->bpages, links) {
1137                 if (op & BUS_DMASYNC_PREWRITE) {
1138                         bcopy((void *)bpage->datavaddr,
1139                             (void *)(bpage->vaddr_nocache != 0 ?
1140                                      bpage->vaddr_nocache : bpage->vaddr),
1141                             bpage->datacount);
1142                         if (bpage->vaddr_nocache == 0) {
1143                                 cpu_dcache_wb_range(bpage->vaddr,
1144                                     bpage->datacount);
1145                                 cpu_l2cache_wb_range(bpage->vaddr,
1146                                     bpage->datacount);
1147                         }
1148                 }
1149                 if (op & BUS_DMASYNC_POSTREAD) {
1150                         if (bpage->vaddr_nocache == 0) {
1151                                 cpu_dcache_inv_range(bpage->vaddr,
1152                                     bpage->datacount);
1153                                 cpu_l2cache_inv_range(bpage->vaddr,
1154                                     bpage->datacount);
1155                         }
1156                         bcopy((void *)(bpage->vaddr_nocache != 0 ?
1157                             bpage->vaddr_nocache : bpage->vaddr),
1158                             (void *)bpage->datavaddr, bpage->datacount);
1159                 }
1160         }
1161 }
1162
1163 static __inline int
1164 _bus_dma_buf_is_in_bp(bus_dmamap_t map, void *buf, int len)
1165 {
1166         struct bounce_page *bpage;
1167
1168         STAILQ_FOREACH(bpage, &map->bpages, links) {
1169                 if ((vm_offset_t)buf >= bpage->datavaddr &&
1170                     (vm_offset_t)buf + len < bpage->datavaddr +
1171                     bpage->datacount)
1172                         return (1);
1173         }
1174         return (0);
1175
1176 }
1177
1178 void
1179 _bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op)
1180 {
1181         struct mbuf *m;
1182         struct uio *uio;
1183         int resid;
1184         struct iovec *iov;
1185
1186         if (op == BUS_DMASYNC_POSTWRITE)
1187                 return;
1188         if (STAILQ_FIRST(&map->bpages))
1189                 _bus_dmamap_sync_bp(dmat, map, op);
1190         if (map->flags & DMAMAP_COHERENT)
1191                 return;
1192         CTR3(KTR_BUSDMA, "%s: op %x flags %x", __func__, op, map->flags);
1193         switch(map->flags & DMAMAP_TYPE_MASK) {
1194         case DMAMAP_LINEAR:
1195                 if (!(_bus_dma_buf_is_in_bp(map, map->buffer, map->len)))
1196                         bus_dmamap_sync_buf(map->buffer, map->len, op);
1197                 break;
1198         case DMAMAP_MBUF:
1199                 m = map->buffer;
1200                 while (m) {
1201                         if (m->m_len > 0 &&
1202                             !(_bus_dma_buf_is_in_bp(map, m->m_data, m->m_len)))
1203                                 bus_dmamap_sync_buf(m->m_data, m->m_len, op);
1204                         m = m->m_next;
1205                 }
1206                 break;
1207         case DMAMAP_UIO:
1208                 uio = map->buffer;
1209                 iov = uio->uio_iov;
1210                 resid = uio->uio_resid;
1211                 for (int i = 0; i < uio->uio_iovcnt && resid != 0; i++) {
1212                         bus_size_t minlen = resid < iov[i].iov_len ? resid :
1213                             iov[i].iov_len;
1214                         if (minlen > 0) {
1215                                 if (!_bus_dma_buf_is_in_bp(map, iov[i].iov_base,
1216                                     minlen))
1217                                         bus_dmamap_sync_buf(iov[i].iov_base,
1218                                             minlen, op);
1219                                 resid -= minlen;
1220                         }
1221                 }
1222                 break;
1223         default:
1224                 break;
1225         }
1226         cpu_drain_writebuf();
1227 }
1228
1229 static void
1230 init_bounce_pages(void *dummy __unused)
1231 {
1232
1233         total_bpages = 0;
1234         STAILQ_INIT(&bounce_zone_list);
1235         STAILQ_INIT(&bounce_map_waitinglist);
1236         STAILQ_INIT(&bounce_map_callbacklist);
1237         mtx_init(&bounce_lock, "bounce pages lock", NULL, MTX_DEF);
1238 }
1239 SYSINIT(bpages, SI_SUB_LOCK, SI_ORDER_ANY, init_bounce_pages, NULL);
1240
1241 static struct sysctl_ctx_list *
1242 busdma_sysctl_tree(struct bounce_zone *bz)
1243 {
1244         return (&bz->sysctl_tree);
1245 }
1246
1247 static struct sysctl_oid *
1248 busdma_sysctl_tree_top(struct bounce_zone *bz)
1249 {
1250         return (bz->sysctl_tree_top);
1251 }
1252
1253 static int
1254 alloc_bounce_zone(bus_dma_tag_t dmat)
1255 {
1256         struct bounce_zone *bz;
1257
1258         /* Check to see if we already have a suitable zone */
1259         STAILQ_FOREACH(bz, &bounce_zone_list, links) {
1260                 if ((dmat->alignment <= bz->alignment)
1261                  && (dmat->boundary <= bz->boundary)
1262                  && (dmat->lowaddr >= bz->lowaddr)) {
1263                         dmat->bounce_zone = bz;
1264                         return (0);
1265                 }
1266         }
1267
1268         if ((bz = (struct bounce_zone *)malloc(sizeof(*bz), M_DEVBUF,
1269             M_NOWAIT | M_ZERO)) == NULL)
1270                 return (ENOMEM);
1271
1272         STAILQ_INIT(&bz->bounce_page_list);
1273         bz->free_bpages = 0;
1274         bz->reserved_bpages = 0;
1275         bz->active_bpages = 0;
1276         bz->lowaddr = dmat->lowaddr;
1277         bz->alignment = dmat->alignment;
1278         bz->boundary = dmat->boundary;
1279         snprintf(bz->zoneid, 8, "zone%d", busdma_zonecount);
1280         busdma_zonecount++;
1281         snprintf(bz->lowaddrid, 18, "%#jx", (uintmax_t)bz->lowaddr);
1282         STAILQ_INSERT_TAIL(&bounce_zone_list, bz, links);
1283         dmat->bounce_zone = bz;
1284
1285         sysctl_ctx_init(&bz->sysctl_tree);
1286         bz->sysctl_tree_top = SYSCTL_ADD_NODE(&bz->sysctl_tree,
1287             SYSCTL_STATIC_CHILDREN(_hw_busdma), OID_AUTO, bz->zoneid,
1288             CTLFLAG_RD, 0, "");
1289         if (bz->sysctl_tree_top == NULL) {
1290                 sysctl_ctx_free(&bz->sysctl_tree);
1291                 return (0);     /* XXX error code? */
1292         }
1293
1294         SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1295             SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1296             "total_bpages", CTLFLAG_RD, &bz->total_bpages, 0,
1297             "Total bounce pages");
1298         SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1299             SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1300             "free_bpages", CTLFLAG_RD, &bz->free_bpages, 0,
1301             "Free bounce pages");
1302         SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1303             SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1304             "reserved_bpages", CTLFLAG_RD, &bz->reserved_bpages, 0,
1305             "Reserved bounce pages");
1306         SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1307             SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1308             "active_bpages", CTLFLAG_RD, &bz->active_bpages, 0,
1309             "Active bounce pages");
1310         SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1311             SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1312             "total_bounced", CTLFLAG_RD, &bz->total_bounced, 0,
1313             "Total bounce requests");
1314         SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1315             SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1316             "total_deferred", CTLFLAG_RD, &bz->total_deferred, 0,
1317             "Total bounce requests that were deferred");
1318         SYSCTL_ADD_STRING(busdma_sysctl_tree(bz),
1319             SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1320             "lowaddr", CTLFLAG_RD, bz->lowaddrid, 0, "");
1321         SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1322             SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1323             "alignment", CTLFLAG_RD, &bz->alignment, 0, "");
1324         SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1325             SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1326             "boundary", CTLFLAG_RD, &bz->boundary, 0, "");
1327
1328         return (0);
1329 }
1330
1331 static int
1332 alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages)
1333 {
1334         struct bounce_zone *bz;
1335         int count;
1336
1337         bz = dmat->bounce_zone;
1338         count = 0;
1339         while (numpages > 0) {
1340                 struct bounce_page *bpage;
1341
1342                 bpage = (struct bounce_page *)malloc(sizeof(*bpage), M_DEVBUF,
1343                                                      M_NOWAIT | M_ZERO);
1344
1345                 if (bpage == NULL)
1346                         break;
1347                 bpage->vaddr = (vm_offset_t)contigmalloc(PAGE_SIZE, M_DEVBUF,
1348                                                          M_NOWAIT, 0ul,
1349                                                          bz->lowaddr,
1350                                                          PAGE_SIZE,
1351                                                          bz->boundary);
1352                 if (bpage->vaddr == 0) {
1353                         free(bpage, M_DEVBUF);
1354                         break;
1355                 }
1356                 bpage->busaddr = pmap_kextract(bpage->vaddr);
1357                 bpage->vaddr_nocache = (vm_offset_t)arm_remap_nocache(
1358                     (void *)bpage->vaddr, PAGE_SIZE);
1359                 mtx_lock(&bounce_lock);
1360                 STAILQ_INSERT_TAIL(&bz->bounce_page_list, bpage, links);
1361                 total_bpages++;
1362                 bz->total_bpages++;
1363                 bz->free_bpages++;
1364                 mtx_unlock(&bounce_lock);
1365                 count++;
1366                 numpages--;
1367         }
1368         return (count);
1369 }
1370
1371 static int
1372 reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int commit)
1373 {
1374         struct bounce_zone *bz;
1375         int pages;
1376
1377         mtx_assert(&bounce_lock, MA_OWNED);
1378         bz = dmat->bounce_zone;
1379         pages = MIN(bz->free_bpages, map->pagesneeded - map->pagesreserved);
1380         if (commit == 0 && map->pagesneeded > (map->pagesreserved + pages))
1381                 return (map->pagesneeded - (map->pagesreserved + pages));
1382         bz->free_bpages -= pages;
1383         bz->reserved_bpages += pages;
1384         map->pagesreserved += pages;
1385         pages = map->pagesneeded - map->pagesreserved;
1386
1387         return (pages);
1388 }
1389
1390 static bus_addr_t
1391 add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map, vm_offset_t vaddr,
1392                 bus_size_t size)
1393 {
1394         struct bounce_zone *bz;
1395         struct bounce_page *bpage;
1396
1397         KASSERT(dmat->bounce_zone != NULL, ("no bounce zone in dma tag"));
1398         KASSERT(map != NULL, ("add_bounce_page: bad map %p", map));
1399
1400         bz = dmat->bounce_zone;
1401         if (map->pagesneeded == 0)
1402                 panic("add_bounce_page: map doesn't need any pages");
1403         map->pagesneeded--;
1404
1405         if (map->pagesreserved == 0)
1406                 panic("add_bounce_page: map doesn't need any pages");
1407         map->pagesreserved--;
1408
1409         mtx_lock(&bounce_lock);
1410         bpage = STAILQ_FIRST(&bz->bounce_page_list);
1411         if (bpage == NULL)
1412                 panic("add_bounce_page: free page list is empty");
1413
1414         STAILQ_REMOVE_HEAD(&bz->bounce_page_list, links);
1415         bz->reserved_bpages--;
1416         bz->active_bpages++;
1417         mtx_unlock(&bounce_lock);
1418
1419         bpage->datavaddr = vaddr;
1420         bpage->datacount = size;
1421         STAILQ_INSERT_TAIL(&(map->bpages), bpage, links);
1422         return (bpage->busaddr);
1423 }
1424
1425 static void
1426 free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage)
1427 {
1428         struct bus_dmamap *map;
1429         struct bounce_zone *bz;
1430
1431         bz = dmat->bounce_zone;
1432         bpage->datavaddr = 0;
1433         bpage->datacount = 0;
1434
1435         mtx_lock(&bounce_lock);
1436         STAILQ_INSERT_HEAD(&bz->bounce_page_list, bpage, links);
1437         bz->free_bpages++;
1438         bz->active_bpages--;
1439         if ((map = STAILQ_FIRST(&bounce_map_waitinglist)) != NULL) {
1440                 if (reserve_bounce_pages(map->dmat, map, 1) == 0) {
1441                         STAILQ_REMOVE_HEAD(&bounce_map_waitinglist, links);
1442                         STAILQ_INSERT_TAIL(&bounce_map_callbacklist,
1443                                            map, links);
1444                         busdma_swi_pending = 1;
1445                         bz->total_deferred++;
1446                         swi_sched(vm_ih, 0);
1447                 }
1448         }
1449         mtx_unlock(&bounce_lock);
1450 }
1451
1452 void
1453 busdma_swi(void)
1454 {
1455         bus_dma_tag_t dmat;
1456         struct bus_dmamap *map;
1457
1458         mtx_lock(&bounce_lock);
1459         while ((map = STAILQ_FIRST(&bounce_map_callbacklist)) != NULL) {
1460                 STAILQ_REMOVE_HEAD(&bounce_map_callbacklist, links);
1461                 mtx_unlock(&bounce_lock);
1462                 dmat = map->dmat;
1463                 (dmat->lockfunc)(dmat->lockfuncarg, BUS_DMA_LOCK);
1464                 bus_dmamap_load(map->dmat, map, map->buffer, map->len,
1465                     map->callback, map->callback_arg, /*flags*/0);
1466                 (dmat->lockfunc)(dmat->lockfuncarg, BUS_DMA_UNLOCK);
1467                 mtx_lock(&bounce_lock);
1468         }
1469         mtx_unlock(&bounce_lock);
1470 }