1 /* $NetBSD: db_interface.c,v 1.33 2003/08/25 04:51:10 mrg Exp $ */
4 * Copyright (c) 1996 Scott K. Stevens
6 * Mach Operating System
7 * Copyright (c) 1991,1990 Carnegie Mellon University
10 * Permission to use, copy, modify and distribute this software and its
11 * documentation is hereby granted, provided that both the copyright
12 * notice and this permission notice appear in all copies of the
13 * software, derivative works or modified versions, and any portions
14 * thereof, and that both notices appear in supporting documentation.
16 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
17 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
18 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
20 * Carnegie Mellon requests users of this software to return to
22 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
23 * School of Computer Science
24 * Carnegie Mellon University
25 * Pittsburgh PA 15213-3890
27 * any improvements or extensions that they make and grant Carnegie the
28 * rights to redistribute these changes.
30 * From: db_interface.c,v 2.4 1991/02/05 17:11:13 mrt (CMU)
34 * Interface to new debugger.
37 #include <sys/cdefs.h>
38 __FBSDID("$FreeBSD$");
41 #include <sys/param.h>
43 #include <sys/reboot.h>
44 #include <sys/systm.h> /* just for boothowto */
52 #include <vm/vm_map.h>
53 #include <vm/vm_extern.h>
55 #include <machine/db_machdep.h>
56 #include <machine/katelib.h>
57 #include <machine/vmparam.h>
58 #include <machine/cpu.h>
61 #include <ddb/db_access.h>
62 #include <ddb/db_command.h>
63 #include <ddb/db_output.h>
64 #include <ddb/db_variables.h>
65 #include <ddb/db_sym.h>
70 int db_access_und_sp (struct db_variable *, db_expr_t *, int);
71 int db_access_abt_sp (struct db_variable *, db_expr_t *, int);
72 int db_access_irq_sp (struct db_variable *, db_expr_t *, int);
74 static db_varfcn_t db_frame;
76 #define DB_OFFSET(x) (db_expr_t *)offsetof(struct trapframe, x)
77 struct db_variable db_regs[] = {
78 { "spsr", DB_OFFSET(tf_spsr), db_frame },
79 { "r0", DB_OFFSET(tf_r0), db_frame },
80 { "r1", DB_OFFSET(tf_r1), db_frame },
81 { "r2", DB_OFFSET(tf_r2), db_frame },
82 { "r3", DB_OFFSET(tf_r3), db_frame },
83 { "r4", DB_OFFSET(tf_r4), db_frame },
84 { "r5", DB_OFFSET(tf_r5), db_frame },
85 { "r6", DB_OFFSET(tf_r6), db_frame },
86 { "r7", DB_OFFSET(tf_r7), db_frame },
87 { "r8", DB_OFFSET(tf_r8), db_frame },
88 { "r9", DB_OFFSET(tf_r9), db_frame },
89 { "r10", DB_OFFSET(tf_r10), db_frame },
90 { "r11", DB_OFFSET(tf_r11), db_frame },
91 { "r12", DB_OFFSET(tf_r12), db_frame },
92 { "usr_sp", DB_OFFSET(tf_usr_sp), db_frame },
93 { "usr_lr", DB_OFFSET(tf_usr_lr), db_frame },
94 { "svc_sp", DB_OFFSET(tf_svc_sp), db_frame },
95 { "svc_lr", DB_OFFSET(tf_svc_lr), db_frame },
96 { "pc", DB_OFFSET(tf_pc), db_frame },
97 { "und_sp", &nil, db_access_und_sp, },
98 { "abt_sp", &nil, db_access_abt_sp, },
99 { "irq_sp", &nil, db_access_irq_sp, },
102 struct db_variable *db_eregs = db_regs + sizeof(db_regs)/sizeof(db_regs[0]);
105 db_access_und_sp(struct db_variable *vp, db_expr_t *valp, int rw)
108 if (rw == DB_VAR_GET) {
109 *valp = get_stackptr(PSR_UND32_MODE);
116 db_access_abt_sp(struct db_variable *vp, db_expr_t *valp, int rw)
119 if (rw == DB_VAR_GET) {
120 *valp = get_stackptr(PSR_ABT32_MODE);
127 db_access_irq_sp(struct db_variable *vp, db_expr_t *valp, int rw)
130 if (rw == DB_VAR_GET) {
131 *valp = get_stackptr(PSR_IRQ32_MODE);
137 int db_frame(struct db_variable *vp, db_expr_t *valp, int rw)
141 if (kdb_frame == NULL)
144 reg = (int *)((uintptr_t)kdb_frame + (db_expr_t)vp->valuep);
145 if (rw == DB_VAR_GET)
153 db_show_mdpcpu(struct pcpu *pc)
157 db_validate_address(vm_offset_t addr)
159 struct proc *p = curproc;
162 if (!p || !p->p_vmspace || !p->p_vmspace->vm_map.pmap ||
163 #ifndef ARM32_NEW_VM_LAYOUT
164 addr >= VM_MAXUSER_ADDRESS
166 addr >= VM_MIN_KERNEL_ADDRESS
169 pmap = pmap_kernel();
171 pmap = p->p_vmspace->vm_map.pmap;
173 return (pmap_extract(pmap, addr) == FALSE);
177 * Read bytes from kernel address space for debugger.
180 db_read_bytes(addr, size, data)
185 char *src = (char *)addr;
187 if (db_validate_address((u_int)src)) {
188 db_printf("address %p is invalid\n", src);
192 if (size == 4 && (addr & 3) == 0 && ((uintptr_t)data & 3) == 0) {
193 *((int*)data) = *((int*)src);
197 if (size == 2 && (addr & 1) == 0 && ((uintptr_t)data & 1) == 0) {
198 *((short*)data) = *((short*)src);
203 if (db_validate_address((u_int)src)) {
204 db_printf("address %p is invalid\n", src);
213 * Write bytes to kernel address space for debugger.
216 db_write_bytes(vm_offset_t addr, size_t size, char *data)
222 if (db_validate_address((u_int)dst)) {
223 db_printf("address %p is invalid\n", dst);
227 if (size == 4 && (addr & 3) == 0 && ((uintptr_t)data & 3) == 0)
228 *((int*)dst) = *((int*)data);
230 if (size == 2 && (addr & 1) == 0 && ((uintptr_t)data & 1) == 0)
231 *((short*)dst) = *((short*)data);
235 if (db_validate_address((u_int)dst)) {
236 db_printf("address %p is invalid\n", dst);
243 /* make sure the caches and memory are in sync */
244 cpu_icache_sync_range(addr, size);
246 /* In case the current page tables have been modified ... */
254 db_fetch_reg(int reg)
259 return (kdb_frame->tf_r0);
261 return (kdb_frame->tf_r1);
263 return (kdb_frame->tf_r2);
265 return (kdb_frame->tf_r3);
267 return (kdb_frame->tf_r4);
269 return (kdb_frame->tf_r5);
271 return (kdb_frame->tf_r6);
273 return (kdb_frame->tf_r7);
275 return (kdb_frame->tf_r8);
277 return (kdb_frame->tf_r9);
279 return (kdb_frame->tf_r10);
281 return (kdb_frame->tf_r11);
283 return (kdb_frame->tf_r12);
285 return (kdb_frame->tf_svc_sp);
287 return (kdb_frame->tf_svc_lr);
289 return (kdb_frame->tf_pc);
291 panic("db_fetch_reg: botch");
296 branch_taken(u_int insn, db_addr_t pc)
300 switch ((insn >> 24) & 0xf) {
301 case 0xa: /* b ... */
302 case 0xb: /* bl ... */
303 addr = ((insn << 2) & 0x03ffffff);
304 if (addr & 0x02000000)
306 return (pc + 8 + addr);
307 case 0x7: /* ldr pc, [pc, reg, lsl #2] */
308 addr = db_fetch_reg(insn & 0xf);
309 addr = pc + 8 + (addr << 2);
310 db_read_bytes(addr, 4, (char *)&addr);
312 case 0x1: /* mov pc, reg */
313 addr = db_fetch_reg(insn & 0xf);
315 case 0x8: /* ldmxx reg, {..., pc} */
317 addr = db_fetch_reg((insn >> 16) & 0xf);
318 nregs = (insn & 0x5555) + ((insn >> 1) & 0x5555);
319 nregs = (nregs & 0x3333) + ((nregs >> 2) & 0x3333);
320 nregs = (nregs + (nregs >> 4)) & 0x0f0f;
321 nregs = (nregs + (nregs >> 8)) & 0x001f;
322 switch ((insn >> 23) & 0x3) {
323 case 0x0: /* ldmda */
326 case 0x1: /* ldmia */
327 addr = addr + 0 + ((nregs - 1) << 2);
329 case 0x2: /* ldmdb */
332 case 0x3: /* ldmib */
333 addr = addr + 4 + ((nregs - 1) << 2);
336 db_read_bytes(addr, 4, (char *)&addr);
339 panic("branch_taken: botch");