2 * Copyright (c) 2011,2016 The FreeBSD Foundation
5 * This software was developed by Andrew Turner under
6 * sponsorship from the FreeBSD Foundation.
8 * Developed by Damjan Marion <damjan.marion@gmail.com>
10 * Based on OMAP4 GIC code by Ben Gray
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. The name of the company nor the name of the author may be used to
21 * endorse or promote products derived from this software without specific
22 * prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 #include "opt_platform.h"
39 #include <sys/cdefs.h>
40 __FBSDID("$FreeBSD$");
42 #include <sys/param.h>
43 #include <sys/systm.h>
45 #include <sys/kernel.h>
46 #include <sys/module.h>
48 #include <machine/intr.h>
50 #include <dev/ofw/openfirm.h>
51 #include <dev/ofw/ofw_bus.h>
52 #include <dev/ofw/ofw_bus_subr.h>
54 #include <arm/arm/gic.h>
55 #include <arm/arm/gic_common.h>
58 struct arm_gic_devinfo {
59 struct ofw_bus_devinfo obdinfo;
60 struct resource_list rl;
64 struct arm_gic_fdt_softc {
65 struct arm_gic_softc base;
70 static device_probe_t gic_fdt_probe;
71 static device_attach_t gic_fdt_attach;
72 static ofw_bus_get_devinfo_t gic_ofw_get_devinfo;
74 static bus_get_resource_list_t gic_fdt_get_resource_list;
75 static bool arm_gic_add_children(device_t);
78 static struct ofw_compat_data compat_data[] = {
79 {"arm,gic", true}, /* Non-standard, used in FreeBSD dts. */
80 {"arm,gic-400", true},
81 {"arm,cortex-a15-gic", true},
82 {"arm,cortex-a9-gic", true},
83 {"arm,cortex-a7-gic", true},
84 {"arm,arm11mp-gic", true},
85 {"brcm,brahma-b15-gic", true},
86 {"qcom,msm-qgic2", true},
90 static device_method_t gic_fdt_methods[] = {
91 /* Device interface */
92 DEVMETHOD(device_probe, gic_fdt_probe),
93 DEVMETHOD(device_attach, gic_fdt_attach),
97 DEVMETHOD(bus_get_resource_list,gic_fdt_get_resource_list),
99 /* ofw_bus interface */
100 DEVMETHOD(ofw_bus_get_devinfo, gic_ofw_get_devinfo),
101 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
102 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
103 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
104 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
105 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
111 DEFINE_CLASS_1(gic, gic_fdt_driver, gic_fdt_methods,
112 sizeof(struct arm_gic_fdt_softc), arm_gic_driver);
114 static devclass_t gic_fdt_devclass;
116 EARLY_DRIVER_MODULE(gic, simplebus, gic_fdt_driver, gic_fdt_devclass, 0, 0,
117 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
118 EARLY_DRIVER_MODULE(gic, ofwbus, gic_fdt_driver, gic_fdt_devclass, 0, 0,
119 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
122 gic_fdt_probe(device_t dev)
125 if (!ofw_bus_status_okay(dev))
128 if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data)
130 device_set_desc(dev, "ARM Generic Interrupt Controller");
131 return (BUS_PROBE_DEFAULT);
135 gic_fdt_attach(device_t dev)
138 struct arm_gic_fdt_softc *sc = device_get_softc(dev);
145 sc->base.gic_bus = GIC_BUS_FDT;
148 err = arm_gic_attach(dev);
153 xref = OF_xref_from_node(ofw_bus_get_node(dev));
156 * Now, when everything is initialized, it's right time to
157 * register interrupt controller to interrupt framefork.
159 if (intr_pic_register(dev, xref) == NULL) {
160 device_printf(dev, "could not register PIC\n");
165 * Controller is root if:
166 * - doesn't have interrupt parent
167 * - his interrupt parent is this controller
169 pxref = ofw_bus_find_iparent(ofw_bus_get_node(dev));
170 if (pxref == 0 || xref == pxref) {
171 if (intr_pic_claim_root(dev, xref, arm_gic_intr, sc,
172 GIC_LAST_SGI - GIC_FIRST_SGI + 1) != 0) {
173 device_printf(dev, "could not set PIC as a root\n");
174 intr_pic_deregister(dev, xref);
178 if (sc->base.gic_res[2] == NULL) {
180 "not root PIC must have defined interrupt\n");
181 intr_pic_deregister(dev, xref);
184 if (bus_setup_intr(dev, sc->base.gic_res[2], INTR_TYPE_CLK,
185 arm_gic_intr, NULL, sc, &sc->base.gic_intrhand)) {
186 device_printf(dev, "could not setup irq handler\n");
187 intr_pic_deregister(dev, xref);
192 OF_device_register_xref(xref, dev);
194 /* If we have children probe and attach them */
195 if (arm_gic_add_children(dev)) {
196 bus_generic_probe(dev);
197 return (bus_generic_attach(dev));
211 static struct resource_list *
212 gic_fdt_get_resource_list(device_t bus, device_t child)
214 struct arm_gic_devinfo *di;
216 di = device_get_ivars(child);
217 KASSERT(di != NULL, ("gic_fdt_get_resource_list: No devinfo"));
223 arm_gic_fill_ranges(phandle_t node, struct arm_gic_fdt_softc *sc)
227 ssize_t nbase_ranges;
231 OF_getencprop(OF_parent(node), "#address-cells", &host_cells,
234 OF_getencprop(node, "#address-cells", &sc->addr_cells,
235 sizeof(sc->addr_cells));
237 OF_getencprop(node, "#size-cells", &sc->size_cells,
238 sizeof(sc->size_cells));
240 nbase_ranges = OF_getproplen(node, "ranges");
241 if (nbase_ranges < 0)
243 sc->base.nranges = nbase_ranges / sizeof(cell_t) /
244 (sc->addr_cells + host_cells + sc->size_cells);
245 if (sc->base.nranges == 0)
248 sc->base.ranges = malloc(sc->base.nranges * sizeof(sc->base.ranges[0]),
250 base_ranges = malloc(nbase_ranges, M_DEVBUF, M_WAITOK);
251 OF_getencprop(node, "ranges", base_ranges, nbase_ranges);
253 for (i = 0, j = 0; i < sc->base.nranges; i++) {
254 sc->base.ranges[i].bus = 0;
255 for (k = 0; k < sc->addr_cells; k++) {
256 sc->base.ranges[i].bus <<= 32;
257 sc->base.ranges[i].bus |= base_ranges[j++];
259 sc->base.ranges[i].host = 0;
260 for (k = 0; k < host_cells; k++) {
261 sc->base.ranges[i].host <<= 32;
262 sc->base.ranges[i].host |= base_ranges[j++];
264 sc->base.ranges[i].size = 0;
265 for (k = 0; k < sc->size_cells; k++) {
266 sc->base.ranges[i].size <<= 32;
267 sc->base.ranges[i].size |= base_ranges[j++];
271 free(base_ranges, M_DEVBUF);
272 return (sc->base.nranges);
276 arm_gic_add_children(device_t dev)
278 struct arm_gic_fdt_softc *sc;
279 struct arm_gic_devinfo *dinfo;
280 phandle_t child, node;
283 sc = device_get_softc(dev);
284 node = ofw_bus_get_node(dev);
286 /* If we have no children don't probe for them */
287 child = OF_child(node);
291 if (arm_gic_fill_ranges(node, sc) < 0) {
292 device_printf(dev, "Have a child, but no ranges\n");
296 for (; child != 0; child = OF_peer(child)) {
297 dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_WAITOK | M_ZERO);
299 if (ofw_bus_gen_setup_devinfo(&dinfo->obdinfo, child) != 0) {
300 free(dinfo, M_DEVBUF);
304 resource_list_init(&dinfo->rl);
305 ofw_bus_reg_to_rl(dev, child, sc->addr_cells,
306 sc->size_cells, &dinfo->rl);
308 cdev = device_add_child(dev, NULL, -1);
310 device_printf(dev, "<%s>: device_add_child failed\n",
311 dinfo->obdinfo.obd_name);
312 resource_list_free(&dinfo->rl);
313 ofw_bus_gen_destroy_devinfo(&dinfo->obdinfo);
314 free(dinfo, M_DEVBUF);
317 device_set_ivars(cdev, dinfo);
323 static const struct ofw_bus_devinfo *
324 gic_ofw_get_devinfo(device_t bus __unused, device_t child)
326 struct arm_gic_devinfo *di;
328 di = device_get_ivars(child);
330 return (&di->obdinfo);
333 static struct ofw_compat_data gicv2m_compat_data[] = {
334 {"arm,gic-v2m-frame", true},
339 arm_gicv2m_fdt_probe(device_t dev)
342 if (!ofw_bus_status_okay(dev))
345 if (!ofw_bus_search_compatible(dev, gicv2m_compat_data)->ocd_data)
348 device_set_desc(dev, "ARM Generic Interrupt Controller MSI/MSIX");
349 return (BUS_PROBE_DEFAULT);
353 arm_gicv2m_fdt_attach(device_t dev)
355 struct arm_gicv2m_softc *sc;
357 sc = device_get_softc(dev);
358 sc->sc_xref = OF_xref_from_node(ofw_bus_get_node(dev));
360 return (arm_gicv2m_attach(dev));
363 static device_method_t arm_gicv2m_fdt_methods[] = {
364 /* Device interface */
365 DEVMETHOD(device_probe, arm_gicv2m_fdt_probe),
366 DEVMETHOD(device_attach, arm_gicv2m_fdt_attach),
372 DEFINE_CLASS_1(gicv2m, arm_gicv2m_fdt_driver, arm_gicv2m_fdt_methods,
373 sizeof(struct arm_gicv2m_softc), arm_gicv2m_driver);
375 static devclass_t arm_gicv2m_fdt_devclass;
377 EARLY_DRIVER_MODULE(gicv2m, gic, arm_gicv2m_fdt_driver,
378 arm_gicv2m_fdt_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);