2 * Copyright (c) 2011,2016 The FreeBSD Foundation
5 * This software was developed by Andrew Turner under
6 * sponsorship from the FreeBSD Foundation.
8 * Developed by Damjan Marion <damjan.marion@gmail.com>
10 * Based on OMAP4 GIC code by Ben Gray
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. The name of the company nor the name of the author may be used to
21 * endorse or promote products derived from this software without specific
22 * prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 #include "opt_platform.h"
39 #include <sys/cdefs.h>
40 #include <sys/param.h>
41 #include <sys/systm.h>
43 #include <sys/kernel.h>
44 #include <sys/module.h>
46 #include <machine/intr.h>
48 #include <dev/ofw/openfirm.h>
49 #include <dev/ofw/ofw_bus.h>
50 #include <dev/ofw/ofw_bus_subr.h>
52 #include <arm/arm/gic.h>
53 #include <arm/arm/gic_common.h>
55 struct arm_gic_devinfo {
56 struct ofw_bus_devinfo obdinfo;
57 struct resource_list rl;
60 struct arm_gic_fdt_softc {
61 struct arm_gic_softc base;
66 static device_probe_t gic_fdt_probe;
67 static device_attach_t gic_fdt_attach;
68 static ofw_bus_get_devinfo_t gic_ofw_get_devinfo;
69 static bus_get_resource_list_t gic_fdt_get_resource_list;
70 static bool arm_gic_add_children(device_t);
72 static struct ofw_compat_data compat_data[] = {
73 {"arm,gic", true}, /* Non-standard, used in FreeBSD dts. */
74 {"arm,gic-400", true},
75 {"arm,cortex-a15-gic", true},
76 {"arm,cortex-a9-gic", true},
77 {"arm,cortex-a7-gic", true},
78 {"arm,arm11mp-gic", true},
79 {"brcm,brahma-b15-gic", true},
80 {"qcom,msm-qgic2", true},
84 static device_method_t gic_fdt_methods[] = {
85 /* Device interface */
86 DEVMETHOD(device_probe, gic_fdt_probe),
87 DEVMETHOD(device_attach, gic_fdt_attach),
90 DEVMETHOD(bus_get_resource_list,gic_fdt_get_resource_list),
91 DEVMETHOD(bus_get_device_path, ofw_bus_gen_get_device_path),
93 /* ofw_bus interface */
94 DEVMETHOD(ofw_bus_get_devinfo, gic_ofw_get_devinfo),
95 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
96 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
97 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
98 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
99 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
104 DEFINE_CLASS_1(gic, gic_fdt_driver, gic_fdt_methods,
105 sizeof(struct arm_gic_fdt_softc), arm_gic_driver);
107 EARLY_DRIVER_MODULE(gic, simplebus, gic_fdt_driver, 0, 0,
108 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
109 EARLY_DRIVER_MODULE(gic, ofwbus, gic_fdt_driver, 0, 0,
110 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
113 gic_fdt_probe(device_t dev)
116 if (!ofw_bus_status_okay(dev))
119 if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data)
121 device_set_desc(dev, "ARM Generic Interrupt Controller");
122 return (BUS_PROBE_DEFAULT);
126 gic_fdt_attach(device_t dev)
128 struct arm_gic_fdt_softc *sc = device_get_softc(dev);
133 sc->base.gic_bus = GIC_BUS_FDT;
135 err = arm_gic_attach(dev);
139 xref = OF_xref_from_node(ofw_bus_get_node(dev));
142 * Now, when everything is initialized, it's right time to
143 * register interrupt controller to interrupt framefork.
145 if (intr_pic_register(dev, xref) == NULL) {
146 device_printf(dev, "could not register PIC\n");
151 * Controller is root if:
152 * - doesn't have interrupt parent
153 * - his interrupt parent is this controller
155 pxref = ofw_bus_find_iparent(ofw_bus_get_node(dev));
156 if (pxref == 0 || xref == pxref) {
157 if (intr_pic_claim_root(dev, xref, arm_gic_intr, sc,
158 GIC_LAST_SGI - GIC_FIRST_SGI + 1) != 0) {
159 device_printf(dev, "could not set PIC as a root\n");
160 intr_pic_deregister(dev, xref);
164 if (sc->base.gic_res[2] == NULL) {
166 "not root PIC must have defined interrupt\n");
167 intr_pic_deregister(dev, xref);
170 if (bus_setup_intr(dev, sc->base.gic_res[2], INTR_TYPE_CLK,
171 arm_gic_intr, NULL, sc, &sc->base.gic_intrhand)) {
172 device_printf(dev, "could not setup irq handler\n");
173 intr_pic_deregister(dev, xref);
178 OF_device_register_xref(xref, dev);
180 /* If we have children probe and attach them */
181 if (arm_gic_add_children(dev)) {
182 bus_generic_probe(dev);
183 return (bus_generic_attach(dev));
193 static struct resource_list *
194 gic_fdt_get_resource_list(device_t bus, device_t child)
196 struct arm_gic_devinfo *di;
198 di = device_get_ivars(child);
199 KASSERT(di != NULL, ("gic_fdt_get_resource_list: No devinfo"));
205 arm_gic_fill_ranges(phandle_t node, struct arm_gic_fdt_softc *sc)
209 ssize_t nbase_ranges;
213 OF_getencprop(OF_parent(node), "#address-cells", &host_cells,
216 OF_getencprop(node, "#address-cells", &sc->addr_cells,
217 sizeof(sc->addr_cells));
219 OF_getencprop(node, "#size-cells", &sc->size_cells,
220 sizeof(sc->size_cells));
222 nbase_ranges = OF_getproplen(node, "ranges");
223 if (nbase_ranges < 0)
225 sc->base.nranges = nbase_ranges / sizeof(cell_t) /
226 (sc->addr_cells + host_cells + sc->size_cells);
227 if (sc->base.nranges == 0)
230 sc->base.ranges = malloc(sc->base.nranges * sizeof(sc->base.ranges[0]),
232 base_ranges = malloc(nbase_ranges, M_DEVBUF, M_WAITOK);
233 OF_getencprop(node, "ranges", base_ranges, nbase_ranges);
235 for (i = 0, j = 0; i < sc->base.nranges; i++) {
236 sc->base.ranges[i].bus = 0;
237 for (k = 0; k < sc->addr_cells; k++) {
238 sc->base.ranges[i].bus <<= 32;
239 sc->base.ranges[i].bus |= base_ranges[j++];
241 sc->base.ranges[i].host = 0;
242 for (k = 0; k < host_cells; k++) {
243 sc->base.ranges[i].host <<= 32;
244 sc->base.ranges[i].host |= base_ranges[j++];
246 sc->base.ranges[i].size = 0;
247 for (k = 0; k < sc->size_cells; k++) {
248 sc->base.ranges[i].size <<= 32;
249 sc->base.ranges[i].size |= base_ranges[j++];
253 free(base_ranges, M_DEVBUF);
254 return (sc->base.nranges);
258 arm_gic_add_children(device_t dev)
260 struct arm_gic_fdt_softc *sc;
261 struct arm_gic_devinfo *dinfo;
262 phandle_t child, node;
265 sc = device_get_softc(dev);
266 node = ofw_bus_get_node(dev);
268 /* If we have no children don't probe for them */
269 child = OF_child(node);
273 if (arm_gic_fill_ranges(node, sc) < 0) {
274 device_printf(dev, "Have a child, but no ranges\n");
278 for (; child != 0; child = OF_peer(child)) {
279 dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_WAITOK | M_ZERO);
281 if (ofw_bus_gen_setup_devinfo(&dinfo->obdinfo, child) != 0) {
282 free(dinfo, M_DEVBUF);
286 resource_list_init(&dinfo->rl);
287 ofw_bus_reg_to_rl(dev, child, sc->addr_cells,
288 sc->size_cells, &dinfo->rl);
290 cdev = device_add_child(dev, NULL, -1);
292 device_printf(dev, "<%s>: device_add_child failed\n",
293 dinfo->obdinfo.obd_name);
294 resource_list_free(&dinfo->rl);
295 ofw_bus_gen_destroy_devinfo(&dinfo->obdinfo);
296 free(dinfo, M_DEVBUF);
299 device_set_ivars(cdev, dinfo);
305 static const struct ofw_bus_devinfo *
306 gic_ofw_get_devinfo(device_t bus __unused, device_t child)
308 struct arm_gic_devinfo *di;
310 di = device_get_ivars(child);
312 return (&di->obdinfo);
315 static struct ofw_compat_data gicv2m_compat_data[] = {
316 {"arm,gic-v2m-frame", true},
321 arm_gicv2m_fdt_probe(device_t dev)
324 if (!ofw_bus_status_okay(dev))
327 if (!ofw_bus_search_compatible(dev, gicv2m_compat_data)->ocd_data)
330 device_set_desc(dev, "ARM Generic Interrupt Controller MSI/MSIX");
331 return (BUS_PROBE_DEFAULT);
335 arm_gicv2m_fdt_attach(device_t dev)
337 struct arm_gicv2m_softc *sc;
339 sc = device_get_softc(dev);
340 sc->sc_xref = OF_xref_from_node(ofw_bus_get_node(dev));
342 return (arm_gicv2m_attach(dev));
345 static device_method_t arm_gicv2m_fdt_methods[] = {
346 /* Device interface */
347 DEVMETHOD(device_probe, arm_gicv2m_fdt_probe),
348 DEVMETHOD(device_attach, arm_gicv2m_fdt_attach),
354 DEFINE_CLASS_1(gicv2m, arm_gicv2m_fdt_driver, arm_gicv2m_fdt_methods,
355 sizeof(struct arm_gicv2m_softc), arm_gicv2m_driver);
357 EARLY_DRIVER_MODULE(gicv2m, gic, arm_gicv2m_fdt_driver, 0, 0,
358 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);