1 /* $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $ */
4 * Copyright (c) 2004 Olivier Houchard
5 * Copyright (c) 1994-1998 Mark Brinicombe.
6 * Copyright (c) 1994 Brini.
9 * This code is derived from software written for Brini by Mark Brinicombe
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by Mark Brinicombe
22 * for the NetBSD Project.
23 * 4. The name of the company nor the name of the author may be used to
24 * endorse or promote products derived from this software without specific
25 * prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
28 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
29 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
30 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
31 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
32 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
33 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * Machine dependent functions for kernel setup
42 * Updated : 18/04/01 updated for new wscons
45 #include "opt_compat.h"
47 #include "opt_kstack_pages.h"
48 #include "opt_platform.h"
49 #include "opt_sched.h"
50 #include "opt_timer.h"
52 #include <sys/cdefs.h>
53 __FBSDID("$FreeBSD$");
55 #include <sys/param.h>
57 #include <sys/systm.h>
63 #include <sys/ctype.h>
64 #include <sys/devmap.h>
67 #include <sys/imgact.h>
69 #include <sys/kernel.h>
71 #include <sys/linker.h>
73 #include <sys/malloc.h>
74 #include <sys/msgbuf.h>
75 #include <sys/mutex.h>
77 #include <sys/ptrace.h>
78 #include <sys/reboot.h>
80 #include <sys/rwlock.h>
81 #include <sys/sched.h>
82 #include <sys/signalvar.h>
83 #include <sys/syscallsubr.h>
84 #include <sys/sysctl.h>
85 #include <sys/sysent.h>
86 #include <sys/sysproto.h>
92 #include <vm/vm_map.h>
93 #include <vm/vm_object.h>
94 #include <vm/vm_page.h>
95 #include <vm/vm_pager.h>
97 #include <machine/armreg.h>
98 #include <machine/atags.h>
99 #include <machine/cpu.h>
100 #include <machine/cpuinfo.h>
101 #include <machine/debug_monitor.h>
102 #include <machine/db_machdep.h>
103 #include <machine/frame.h>
104 #include <machine/intr.h>
105 #include <machine/machdep.h>
106 #include <machine/md_var.h>
107 #include <machine/metadata.h>
108 #include <machine/pcb.h>
109 #include <machine/physmem.h>
110 #include <machine/platform.h>
111 #include <machine/reg.h>
112 #include <machine/trap.h>
113 #include <machine/undefined.h>
114 #include <machine/vfp.h>
115 #include <machine/vmparam.h>
116 #include <machine/sysarch.h>
119 #include <contrib/libfdt/libfdt.h>
120 #include <dev/fdt/fdt_common.h>
121 #include <dev/ofw/openfirm.h>
129 DB_SHOW_COMMAND(cp15, db_show_cp15)
133 reg = cp15_midr_get();
134 db_printf("Cpu ID: 0x%08x\n", reg);
135 reg = cp15_ctr_get();
136 db_printf("Current Cache Lvl ID: 0x%08x\n",reg);
138 reg = cp15_sctlr_get();
139 db_printf("Ctrl: 0x%08x\n",reg);
140 reg = cp15_actlr_get();
141 db_printf("Aux Ctrl: 0x%08x\n",reg);
143 reg = cp15_id_pfr0_get();
144 db_printf("Processor Feat 0: 0x%08x\n", reg);
145 reg = cp15_id_pfr1_get();
146 db_printf("Processor Feat 1: 0x%08x\n", reg);
147 reg = cp15_id_dfr0_get();
148 db_printf("Debug Feat 0: 0x%08x\n", reg);
149 reg = cp15_id_afr0_get();
150 db_printf("Auxiliary Feat 0: 0x%08x\n", reg);
151 reg = cp15_id_mmfr0_get();
152 db_printf("Memory Model Feat 0: 0x%08x\n", reg);
153 reg = cp15_id_mmfr1_get();
154 db_printf("Memory Model Feat 1: 0x%08x\n", reg);
155 reg = cp15_id_mmfr2_get();
156 db_printf("Memory Model Feat 2: 0x%08x\n", reg);
157 reg = cp15_id_mmfr3_get();
158 db_printf("Memory Model Feat 3: 0x%08x\n", reg);
159 reg = cp15_ttbr_get();
160 db_printf("TTB0: 0x%08x\n", reg);
163 DB_SHOW_COMMAND(vtop, db_show_vtop)
168 cp15_ats1cpr_set(addr);
169 reg = cp15_par_get();
170 db_printf("Physical address reg: 0x%08x\n",reg);
172 db_printf("show vtop <virt_addr>\n");
174 #endif /* __ARM_ARCH >= 6 */
178 #define debugf(fmt, args...) printf(fmt, ##args)
180 #define debugf(fmt, args...)
183 #if defined(COMPAT_FREEBSD4) || defined(COMPAT_FREEBSD5) || \
184 defined(COMPAT_FREEBSD6) || defined(COMPAT_FREEBSD7) || \
185 defined(COMPAT_FREEBSD9)
186 #error FreeBSD/arm doesn't provide compatibility with releases prior to 10
189 struct pcpu __pcpu[MAXCPU];
190 struct pcpu *pcpup = &__pcpu[0];
192 static struct trapframe proc0_tf;
193 uint32_t cpu_reset_address = 0;
195 vm_offset_t vector_page;
197 int (*_arm_memcpy)(void *, void *, int, int) = NULL;
198 int (*_arm_bzero)(void *, int, int) = NULL;
199 int _min_memcpy_size = 0;
200 int _min_bzero_size = 0;
205 static char *loader_envp;
210 vm_offset_t systempage;
211 vm_offset_t irqstack;
212 vm_offset_t undstack;
213 vm_offset_t abtstack;
216 * This is the number of L2 page tables required for covering max
217 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf,
218 * stacks etc.), uprounded to be divisible by 4.
220 #define KERNEL_PT_MAX 78
222 static struct pv_addr kernel_pt_table[KERNEL_PT_MAX];
224 struct pv_addr systempage;
225 static struct pv_addr msgbufpv;
226 struct pv_addr irqstack;
227 struct pv_addr undstack;
228 struct pv_addr abtstack;
229 static struct pv_addr kernelstack;
233 #if defined(LINUX_BOOT_ABI)
234 #define LBABI_MAX_BANKS 10
236 #define CMDLINE_GUARD "FreeBSD:"
238 struct arm_lbabi_tag *atag_list;
239 char linux_command_line[LBABI_MAX_COMMAND_LINE + 1];
240 char atags[LBABI_MAX_COMMAND_LINE * 2];
241 uint32_t memstart[LBABI_MAX_BANKS];
242 uint32_t memsize[LBABI_MAX_BANKS];
246 static delay_func *delay_impl;
247 static void *delay_arg;
250 static uint32_t board_revision;
251 /* hex representation of uint64_t */
252 static char board_serial[32];
254 SYSCTL_NODE(_hw, OID_AUTO, board, CTLFLAG_RD, 0, "Board attributes");
255 SYSCTL_UINT(_hw_board, OID_AUTO, revision, CTLFLAG_RD,
256 &board_revision, 0, "Board revision");
257 SYSCTL_STRING(_hw_board, OID_AUTO, serial, CTLFLAG_RD,
258 board_serial, 0, "Board serial");
261 SYSCTL_INT(_hw, HW_FLOATINGPT, floatingpoint, CTLFLAG_RD,
262 &vfp_exists, 0, "Floating point support enabled");
265 board_set_serial(uint64_t serial)
268 snprintf(board_serial, sizeof(board_serial)-1,
273 board_set_revision(uint32_t revision)
276 board_revision = revision;
280 sendsig(catcher, ksi, mask)
287 struct trapframe *tf;
288 struct sigframe *fp, frame;
290 struct sysentvec *sysent;
297 PROC_LOCK_ASSERT(p, MA_OWNED);
298 sig = ksi->ksi_signo;
299 code = ksi->ksi_code;
301 mtx_assert(&psp->ps_mtx, MA_OWNED);
303 onstack = sigonstack(tf->tf_usr_sp);
305 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm,
308 /* Allocate and validate space for the signal handler context. */
309 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !(onstack) &&
310 SIGISMEMBER(psp->ps_sigonstack, sig)) {
311 fp = (struct sigframe *)((uintptr_t)td->td_sigstk.ss_sp +
312 td->td_sigstk.ss_size);
313 #if defined(COMPAT_43)
314 td->td_sigstk.ss_flags |= SS_ONSTACK;
317 fp = (struct sigframe *)td->td_frame->tf_usr_sp;
319 /* make room on the stack */
322 /* make the stack aligned */
323 fp = (struct sigframe *)STACKALIGN(fp);
324 /* Populate the siginfo frame. */
325 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0);
326 frame.sf_si = ksi->ksi_info;
327 frame.sf_uc.uc_sigmask = *mask;
328 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK )
329 ? ((onstack) ? SS_ONSTACK : 0) : SS_DISABLE;
330 frame.sf_uc.uc_stack = td->td_sigstk;
331 mtx_unlock(&psp->ps_mtx);
332 PROC_UNLOCK(td->td_proc);
334 /* Copy the sigframe out to the user's stack. */
335 if (copyout(&frame, fp, sizeof(*fp)) != 0) {
336 /* Process has trashed its stack. Kill it. */
337 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp);
343 * Build context to run handler in. We invoke the handler
344 * directly, only returning via the trampoline. Note the
345 * trampoline version numbers are coordinated with machine-
346 * dependent code in libc.
350 tf->tf_r1 = (register_t)&fp->sf_si;
351 tf->tf_r2 = (register_t)&fp->sf_uc;
353 /* the trampoline uses r5 as the uc address */
354 tf->tf_r5 = (register_t)&fp->sf_uc;
355 tf->tf_pc = (register_t)catcher;
356 tf->tf_usr_sp = (register_t)fp;
357 sysent = p->p_sysent;
358 if (sysent->sv_sigcode_base != 0)
359 tf->tf_usr_lr = (register_t)sysent->sv_sigcode_base;
361 tf->tf_usr_lr = (register_t)(sysent->sv_psstrings -
362 *(sysent->sv_szsigcode));
363 /* Set the mode to enter in the signal handler */
365 if ((register_t)catcher & 1)
366 tf->tf_spsr |= PSR_T;
368 tf->tf_spsr &= ~PSR_T;
371 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr,
375 mtx_lock(&psp->ps_mtx);
378 struct kva_md_info kmi;
383 * Initialize the vector page, and select whether or not to
384 * relocate the vectors.
386 * NOTE: We expect the vector page to be mapped at its expected
390 extern unsigned int page0[], page0_data[];
392 arm_vector_init(vm_offset_t va, int which)
394 unsigned int *vectors = (int *) va;
395 unsigned int *vectors_data = vectors + (page0_data - page0);
399 * Loop through the vectors we're taking over, and copy the
400 * vector's insn and data word.
402 for (vec = 0; vec < ARM_NVEC; vec++) {
403 if ((which & (1 << vec)) == 0) {
404 /* Don't want to take over this vector. */
407 vectors[vec] = page0[vec];
408 vectors_data[vec] = page0_data[vec];
411 /* Now sync the vectors. */
412 icache_sync(va, (ARM_NVEC * 2) * sizeof(u_int));
416 if (va == ARM_VECTORS_HIGH) {
418 * Enable high vectors in the system control reg (SCTLR).
420 * Assume the MD caller knows what it's doing here, and really
421 * does want the vector page relocated.
423 * Note: This has to be done here (and not just in
424 * cpu_setup()) because the vector page needs to be
425 * accessible *before* cpu_startup() is called.
428 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC);
433 cpu_startup(void *dummy)
435 struct pcb *pcb = thread0.td_pcb;
436 const unsigned int mbyte = 1024 * 1024;
437 #if __ARM_ARCH < 6 && !defined(ARM_CACHE_LOCK_ENABLE)
443 vm_ksubmap_init(&kmi);
446 * Display the RAM layout.
448 printf("real memory = %ju (%ju MB)\n",
449 (uintmax_t)arm32_ptob(realmem),
450 (uintmax_t)arm32_ptob(realmem) / mbyte);
451 printf("avail memory = %ju (%ju MB)\n",
452 (uintmax_t)arm32_ptob(vm_cnt.v_free_count),
453 (uintmax_t)arm32_ptob(vm_cnt.v_free_count) / mbyte);
455 arm_physmem_print_tables();
456 devmap_print_table();
460 vm_pager_bufferinit();
461 pcb->pcb_regs.sf_sp = (u_int)thread0.td_kstack +
462 USPACE_SVC_STACK_TOP;
463 pmap_set_pcb_pagedir(kernel_pmap, pcb);
465 vector_page_setprot(VM_PROT_READ);
467 #ifdef ARM_CACHE_LOCK_ENABLE
468 pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS);
469 arm_lock_cache_line(ARM_TP_ADDRESS);
471 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO);
472 pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m));
474 *(uint32_t *)ARM_RAS_START = 0;
475 *(uint32_t *)ARM_RAS_END = 0xffffffff;
479 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
482 * Flush the D-cache for non-DMA I/O so that the I-cache can
483 * be made coherent later.
486 cpu_flush_dcache(void *ptr, size_t len)
489 dcache_wb_poc((vm_offset_t)ptr, (vm_paddr_t)vtophys(ptr), len);
492 /* Get current clock frequency for the given cpu id. */
494 cpu_est_clockrate(int cpu_id, uint64_t *rate)
504 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", busy, curcpu);
506 #ifndef NO_EVENTTIMERS
510 if (!sched_runnable())
512 #ifndef NO_EVENTTIMERS
517 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", busy, curcpu);
521 cpu_idle_wakeup(int cpu)
528 * Most ARM platforms don't need to do anything special to init their clocks
529 * (they get intialized during normal device attachment), and by not defining a
530 * cpu_initclocks() function they get this generic one. Any platform that needs
531 * to do something special can just provide their own implementation, which will
532 * override this one due to the weak linkage.
535 arm_generic_initclocks(void)
538 #ifndef NO_EVENTTIMERS
540 if (PCPU_GET(cpuid) == 0)
541 cpu_initclocks_bsp();
545 cpu_initclocks_bsp();
549 __weak_reference(arm_generic_initclocks, cpu_initclocks);
553 arm_set_delay(delay_func *impl, void *arg)
556 KASSERT(impl != NULL, ("No DELAY implementation"));
565 delay_impl(usec, delay_arg);
570 fill_regs(struct thread *td, struct reg *regs)
572 struct trapframe *tf = td->td_frame;
573 bcopy(&tf->tf_r0, regs->r, sizeof(regs->r));
574 regs->r_sp = tf->tf_usr_sp;
575 regs->r_lr = tf->tf_usr_lr;
576 regs->r_pc = tf->tf_pc;
577 regs->r_cpsr = tf->tf_spsr;
581 fill_fpregs(struct thread *td, struct fpreg *regs)
583 bzero(regs, sizeof(*regs));
588 set_regs(struct thread *td, struct reg *regs)
590 struct trapframe *tf = td->td_frame;
592 bcopy(regs->r, &tf->tf_r0, sizeof(regs->r));
593 tf->tf_usr_sp = regs->r_sp;
594 tf->tf_usr_lr = regs->r_lr;
595 tf->tf_pc = regs->r_pc;
596 tf->tf_spsr &= ~PSR_FLAGS;
597 tf->tf_spsr |= regs->r_cpsr & PSR_FLAGS;
602 set_fpregs(struct thread *td, struct fpreg *regs)
608 fill_dbregs(struct thread *td, struct dbreg *regs)
613 set_dbregs(struct thread *td, struct dbreg *regs)
620 ptrace_read_int(struct thread *td, vm_offset_t addr, uint32_t *v)
623 if (proc_readmem(td, td->td_proc, addr, v, sizeof(*v)) != sizeof(*v))
629 ptrace_write_int(struct thread *td, vm_offset_t addr, uint32_t v)
632 if (proc_writemem(td, td->td_proc, addr, &v, sizeof(v)) != sizeof(v))
638 ptrace_get_usr_reg(void *cookie, int reg)
641 struct thread *td = cookie;
643 KASSERT(((reg >= 0) && (reg <= ARM_REG_NUM_PC)),
644 ("reg is outside range"));
648 ret = td->td_frame->tf_pc;
651 ret = td->td_frame->tf_usr_lr;
654 ret = td->td_frame->tf_usr_sp;
657 ret = *((register_t*)&td->td_frame->tf_r0 + reg);
665 ptrace_get_usr_int(void* cookie, vm_offset_t offset, u_int* val)
667 struct thread *td = cookie;
670 error = ptrace_read_int(td, offset, val);
676 * This function parses current instruction opcode and decodes
677 * any possible jump (change in PC) which might occur after
678 * the instruction is executed.
680 * @param td Thread structure of analysed task
681 * @param cur_instr Currently executed instruction
682 * @param alt_next_address Pointer to the variable where
683 * the destination address of the
684 * jump instruction shall be stored.
686 * @return <0> when jump is possible
690 ptrace_get_alternative_next(struct thread *td, uint32_t cur_instr,
691 uint32_t *alt_next_address)
695 if (inst_branch(cur_instr) || inst_call(cur_instr) ||
696 inst_return(cur_instr)) {
697 error = arm_predict_branch(td, cur_instr, td->td_frame->tf_pc,
698 alt_next_address, ptrace_get_usr_reg, ptrace_get_usr_int);
707 ptrace_single_step(struct thread *td)
710 int error, error_alt;
711 uint32_t cur_instr, alt_next = 0;
713 /* TODO: This needs to be updated for Thumb-2 */
714 if ((td->td_frame->tf_spsr & PSR_T) != 0)
717 KASSERT(td->td_md.md_ptrace_instr == 0,
718 ("Didn't clear single step"));
719 KASSERT(td->td_md.md_ptrace_instr_alt == 0,
720 ("Didn't clear alternative single step"));
724 error = ptrace_read_int(td, td->td_frame->tf_pc,
729 error = ptrace_read_int(td, td->td_frame->tf_pc + INSN_SIZE,
730 &td->td_md.md_ptrace_instr);
732 error = ptrace_write_int(td, td->td_frame->tf_pc + INSN_SIZE,
735 td->td_md.md_ptrace_instr = 0;
737 td->td_md.md_ptrace_addr = td->td_frame->tf_pc +
742 error_alt = ptrace_get_alternative_next(td, cur_instr, &alt_next);
743 if (error_alt == 0) {
744 error_alt = ptrace_read_int(td, alt_next,
745 &td->td_md.md_ptrace_instr_alt);
747 td->td_md.md_ptrace_instr_alt = 0;
749 error_alt = ptrace_write_int(td, alt_next,
752 td->td_md.md_ptrace_instr_alt = 0;
754 td->td_md.md_ptrace_addr_alt = alt_next;
760 return ((error != 0) && (error_alt != 0));
764 ptrace_clear_single_step(struct thread *td)
768 /* TODO: This needs to be updated for Thumb-2 */
769 if ((td->td_frame->tf_spsr & PSR_T) != 0)
772 if (td->td_md.md_ptrace_instr != 0) {
775 ptrace_write_int(td, td->td_md.md_ptrace_addr,
776 td->td_md.md_ptrace_instr);
778 td->td_md.md_ptrace_instr = 0;
781 if (td->td_md.md_ptrace_instr_alt != 0) {
784 ptrace_write_int(td, td->td_md.md_ptrace_addr_alt,
785 td->td_md.md_ptrace_instr_alt);
787 td->td_md.md_ptrace_instr_alt = 0;
794 ptrace_set_pc(struct thread *td, unsigned long addr)
796 td->td_frame->tf_pc = addr;
801 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
812 if (td->td_md.md_spinlock_count == 0) {
813 cspr = disable_interrupts(PSR_I | PSR_F);
814 td->td_md.md_spinlock_count = 1;
815 td->td_md.md_saved_cspr = cspr;
817 td->td_md.md_spinlock_count++;
829 cspr = td->td_md.md_saved_cspr;
830 td->td_md.md_spinlock_count--;
831 if (td->td_md.md_spinlock_count == 0)
832 restore_interrupts(cspr);
836 * Clear registers on exec
839 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
841 struct trapframe *tf = td->td_frame;
843 memset(tf, 0, sizeof(*tf));
844 tf->tf_usr_sp = stack;
845 tf->tf_usr_lr = imgp->entry_addr;
846 tf->tf_svc_lr = 0x77777777;
847 tf->tf_pc = imgp->entry_addr;
848 tf->tf_spsr = PSR_USR32_MODE;
852 * Get machine context.
855 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret)
857 struct trapframe *tf = td->td_frame;
858 __greg_t *gr = mcp->__gregs;
860 if (clear_ret & GET_MC_CLEAR_RET) {
862 gr[_REG_CPSR] = tf->tf_spsr & ~PSR_C;
864 gr[_REG_R0] = tf->tf_r0;
865 gr[_REG_CPSR] = tf->tf_spsr;
867 gr[_REG_R1] = tf->tf_r1;
868 gr[_REG_R2] = tf->tf_r2;
869 gr[_REG_R3] = tf->tf_r3;
870 gr[_REG_R4] = tf->tf_r4;
871 gr[_REG_R5] = tf->tf_r5;
872 gr[_REG_R6] = tf->tf_r6;
873 gr[_REG_R7] = tf->tf_r7;
874 gr[_REG_R8] = tf->tf_r8;
875 gr[_REG_R9] = tf->tf_r9;
876 gr[_REG_R10] = tf->tf_r10;
877 gr[_REG_R11] = tf->tf_r11;
878 gr[_REG_R12] = tf->tf_r12;
879 gr[_REG_SP] = tf->tf_usr_sp;
880 gr[_REG_LR] = tf->tf_usr_lr;
881 gr[_REG_PC] = tf->tf_pc;
887 * Set machine context.
889 * However, we don't set any but the user modifiable flags, and we won't
890 * touch the cs selector.
893 set_mcontext(struct thread *td, mcontext_t *mcp)
895 struct trapframe *tf = td->td_frame;
896 const __greg_t *gr = mcp->__gregs;
898 tf->tf_r0 = gr[_REG_R0];
899 tf->tf_r1 = gr[_REG_R1];
900 tf->tf_r2 = gr[_REG_R2];
901 tf->tf_r3 = gr[_REG_R3];
902 tf->tf_r4 = gr[_REG_R4];
903 tf->tf_r5 = gr[_REG_R5];
904 tf->tf_r6 = gr[_REG_R6];
905 tf->tf_r7 = gr[_REG_R7];
906 tf->tf_r8 = gr[_REG_R8];
907 tf->tf_r9 = gr[_REG_R9];
908 tf->tf_r10 = gr[_REG_R10];
909 tf->tf_r11 = gr[_REG_R11];
910 tf->tf_r12 = gr[_REG_R12];
911 tf->tf_usr_sp = gr[_REG_SP];
912 tf->tf_usr_lr = gr[_REG_LR];
913 tf->tf_pc = gr[_REG_PC];
914 tf->tf_spsr = gr[_REG_CPSR];
923 sys_sigreturn(td, uap)
925 struct sigreturn_args /* {
926 const struct __ucontext *sigcntxp;
934 if (copyin(uap->sigcntxp, &uc, sizeof(uc)))
937 * Make sure the processor mode has not been tampered with and
938 * interrupts have not been disabled.
940 spsr = uc.uc_mcontext.__gregs[_REG_CPSR];
941 if ((spsr & PSR_MODE) != PSR_USR32_MODE ||
942 (spsr & (PSR_I | PSR_F)) != 0)
944 /* Restore register context. */
945 set_mcontext(td, &uc.uc_mcontext);
947 /* Restore signal mask. */
948 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
950 return (EJUSTRETURN);
955 * Construct a PCB from a trapframe. This is called from kdb_trap() where
956 * we want to start a backtrace from the function that caused us to enter
957 * the debugger. We have the context in the trapframe, but base the trace
958 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
959 * enough for a backtrace.
962 makectx(struct trapframe *tf, struct pcb *pcb)
964 pcb->pcb_regs.sf_r4 = tf->tf_r4;
965 pcb->pcb_regs.sf_r5 = tf->tf_r5;
966 pcb->pcb_regs.sf_r6 = tf->tf_r6;
967 pcb->pcb_regs.sf_r7 = tf->tf_r7;
968 pcb->pcb_regs.sf_r8 = tf->tf_r8;
969 pcb->pcb_regs.sf_r9 = tf->tf_r9;
970 pcb->pcb_regs.sf_r10 = tf->tf_r10;
971 pcb->pcb_regs.sf_r11 = tf->tf_r11;
972 pcb->pcb_regs.sf_r12 = tf->tf_r12;
973 pcb->pcb_regs.sf_pc = tf->tf_pc;
974 pcb->pcb_regs.sf_lr = tf->tf_usr_lr;
975 pcb->pcb_regs.sf_sp = tf->tf_usr_sp;
979 * Fake up a boot descriptor table
982 fake_preload_metadata(struct arm_boot_params *abp __unused, void *dtb_ptr,
986 vm_offset_t zstart = 0, zend = 0;
988 vm_offset_t lastaddr;
990 static uint32_t fake_preload[35];
992 fake_preload[i++] = MODINFO_NAME;
993 fake_preload[i++] = strlen("kernel") + 1;
994 strcpy((char*)&fake_preload[i++], "kernel");
996 fake_preload[i++] = MODINFO_TYPE;
997 fake_preload[i++] = strlen("elf kernel") + 1;
998 strcpy((char*)&fake_preload[i++], "elf kernel");
1000 fake_preload[i++] = MODINFO_ADDR;
1001 fake_preload[i++] = sizeof(vm_offset_t);
1002 fake_preload[i++] = KERNVIRTADDR;
1003 fake_preload[i++] = MODINFO_SIZE;
1004 fake_preload[i++] = sizeof(uint32_t);
1005 fake_preload[i++] = (uint32_t)&end - KERNVIRTADDR;
1007 if (*(uint32_t *)KERNVIRTADDR == MAGIC_TRAMP_NUMBER) {
1008 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_SSYM;
1009 fake_preload[i++] = sizeof(vm_offset_t);
1010 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 4);
1011 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_ESYM;
1012 fake_preload[i++] = sizeof(vm_offset_t);
1013 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 8);
1014 lastaddr = *(uint32_t *)(KERNVIRTADDR + 8);
1016 zstart = *(uint32_t *)(KERNVIRTADDR + 4);
1017 db_fetch_ksymtab(zstart, zend);
1020 lastaddr = (vm_offset_t)&end;
1021 if (dtb_ptr != NULL) {
1022 /* Copy DTB to KVA space and insert it into module chain. */
1023 lastaddr = roundup(lastaddr, sizeof(int));
1024 fake_preload[i++] = MODINFO_METADATA | MODINFOMD_DTBP;
1025 fake_preload[i++] = sizeof(uint32_t);
1026 fake_preload[i++] = (uint32_t)lastaddr;
1027 memmove((void *)lastaddr, dtb_ptr, dtb_size);
1028 lastaddr += dtb_size;
1029 lastaddr = roundup(lastaddr, sizeof(int));
1031 fake_preload[i++] = 0;
1032 fake_preload[i] = 0;
1033 preload_metadata = (void *)fake_preload;
1035 init_static_kenv(NULL, 0);
1044 set_curthread(&thread0);
1046 pcpu_init(pcpup, 0, sizeof(struct pcpu));
1047 PCPU_SET(curthread, &thread0);
1050 #if defined(LINUX_BOOT_ABI)
1052 /* Convert the U-Boot command line into FreeBSD kenv and boot options. */
1054 cmdline_set_env(char *cmdline, const char *guard)
1056 char *cmdline_next, *env;
1057 size_t size, guard_len;
1060 size = strlen(cmdline);
1061 /* Skip leading spaces. */
1062 for (; isspace(*cmdline) && (size > 0); cmdline++)
1065 /* Test and remove guard. */
1066 if (guard != NULL && guard[0] != '\0') {
1067 guard_len = strlen(guard);
1068 if (strncasecmp(cmdline, guard, guard_len) != 0)
1070 cmdline += guard_len;
1074 /* Skip leading spaces. */
1075 for (; isspace(*cmdline) && (size > 0); cmdline++)
1078 /* Replace ',' with '\0'. */
1079 /* TODO: implement escaping for ',' character. */
1080 cmdline_next = cmdline;
1081 while(strsep(&cmdline_next, ",") != NULL)
1083 init_static_kenv(cmdline, 0);
1084 /* Parse boothowto. */
1085 for (i = 0; howto_names[i].ev != NULL; i++) {
1086 env = kern_getenv(howto_names[i].ev);
1088 if (strtoul(env, NULL, 10) != 0)
1089 boothowto |= howto_names[i].mask;
1096 linux_parse_boot_param(struct arm_boot_params *abp)
1098 struct arm_lbabi_tag *walker;
1102 vm_offset_t lastaddr;
1104 struct fdt_header *dtb_ptr;
1109 * Linux boot ABI: r0 = 0, r1 is the board type (!= 0) and r2
1110 * is atags or dtb pointer. If all of these aren't satisfied,
1111 * then punt. Unfortunately, it looks like DT enabled kernels
1112 * doesn't uses board type and U-Boot delivers 0 in r1 for them.
1114 if (abp->abp_r0 != 0 || abp->abp_r2 == 0)
1117 /* Test if r2 point to valid DTB. */
1118 dtb_ptr = (struct fdt_header *)abp->abp_r2;
1119 if (fdt_check_header(dtb_ptr) == 0) {
1120 dtb_size = fdt_totalsize(dtb_ptr);
1121 return (fake_preload_metadata(abp, dtb_ptr, dtb_size));
1125 board_id = abp->abp_r1;
1126 walker = (struct arm_lbabi_tag *)abp->abp_r2;
1128 if (ATAG_TAG(walker) != ATAG_CORE)
1132 while (ATAG_TAG(walker) != ATAG_NONE) {
1133 switch (ATAG_TAG(walker)) {
1137 arm_physmem_hardware_region(walker->u.tag_mem.start,
1138 walker->u.tag_mem.size);
1143 serial = walker->u.tag_sn.high;
1145 serial |= walker->u.tag_sn.low;
1146 board_set_serial(serial);
1149 revision = walker->u.tag_rev.rev;
1150 board_set_revision(revision);
1153 size = ATAG_SIZE(walker) -
1154 sizeof(struct arm_lbabi_header);
1155 size = min(size, LBABI_MAX_COMMAND_LINE);
1156 strncpy(linux_command_line, walker->u.tag_cmd.command,
1158 linux_command_line[size] = '\0';
1163 walker = ATAG_NEXT(walker);
1166 /* Save a copy for later */
1167 bcopy(atag_list, atags,
1168 (char *)walker - (char *)atag_list + ATAG_SIZE(walker));
1170 lastaddr = fake_preload_metadata(abp, NULL, 0);
1171 cmdline_set_env(linux_command_line, CMDLINE_GUARD);
1176 #if defined(FREEBSD_BOOT_LOADER)
1178 freebsd_parse_boot_param(struct arm_boot_params *abp)
1180 vm_offset_t lastaddr = 0;
1184 vm_offset_t ksym_start;
1185 vm_offset_t ksym_end;
1189 * Mask metadata pointer: it is supposed to be on page boundary. If
1190 * the first argument (mdp) doesn't point to a valid address the
1191 * bootloader must have passed us something else than the metadata
1192 * ptr, so we give up. Also give up if we cannot find metadta section
1193 * the loader creates that we get all this data out of.
1196 if ((mdp = (void *)(abp->abp_r0 & ~PAGE_MASK)) == NULL)
1198 preload_metadata = mdp;
1199 kmdp = preload_search_by_type("elf kernel");
1203 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1204 loader_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *);
1205 init_static_kenv(loader_envp, 0);
1206 lastaddr = MD_FETCH(kmdp, MODINFOMD_KERNEND, vm_offset_t);
1208 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1209 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1210 db_fetch_ksymtab(ksym_start, ksym_end);
1217 default_parse_boot_param(struct arm_boot_params *abp)
1219 vm_offset_t lastaddr;
1221 #if defined(LINUX_BOOT_ABI)
1222 if ((lastaddr = linux_parse_boot_param(abp)) != 0)
1225 #if defined(FREEBSD_BOOT_LOADER)
1226 if ((lastaddr = freebsd_parse_boot_param(abp)) != 0)
1229 /* Fall back to hardcoded metadata. */
1230 lastaddr = fake_preload_metadata(abp, NULL, 0);
1236 * Stub version of the boot parameter parsing routine. We are
1237 * called early in initarm, before even VM has been initialized.
1238 * This routine needs to preserve any data that the boot loader
1239 * has passed in before the kernel starts to grow past the end
1240 * of the BSS, traditionally the place boot-loaders put this data.
1242 * Since this is called so early, things that depend on the vm system
1243 * being setup (including access to some SoC's serial ports), about
1244 * all that can be done in this routine is to copy the arguments.
1246 * This is the default boot parameter parsing routine. Individual
1247 * kernels/boards can override this weak function with one of their
1248 * own. We just fake metadata...
1250 __weak_reference(default_parse_boot_param, parse_boot_param);
1256 init_proc0(vm_offset_t kstack)
1258 proc_linkup0(&proc0, &thread0);
1259 thread0.td_kstack = kstack;
1260 thread0.td_pcb = (struct pcb *)
1261 (thread0.td_kstack + kstack_pages * PAGE_SIZE) - 1;
1262 thread0.td_pcb->pcb_flags = 0;
1263 thread0.td_pcb->pcb_vfpcpu = -1;
1264 thread0.td_pcb->pcb_vfpstate.fpscr = VFPSCR_DN;
1265 thread0.td_frame = &proc0_tf;
1266 pcpup->pc_curpcb = thread0.td_pcb;
1270 arm_predict_branch(void *cookie, u_int insn, register_t pc, register_t *new_pc,
1271 u_int (*fetch_reg)(void*, int), u_int (*read_int)(void*, vm_offset_t, u_int*))
1273 u_int addr, nregs, offset = 0;
1276 switch ((insn >> 24) & 0xf) {
1277 case 0x2: /* add pc, reg1, #value */
1278 case 0x0: /* add pc, reg1, reg2, lsl #offset */
1279 addr = fetch_reg(cookie, (insn >> 16) & 0xf);
1280 if (((insn >> 16) & 0xf) == 15)
1282 if (insn & 0x0200000) {
1283 offset = (insn >> 7) & 0x1e;
1284 offset = (insn & 0xff) << (32 - offset) |
1285 (insn & 0xff) >> offset;
1288 offset = fetch_reg(cookie, insn & 0x0f);
1289 if ((insn & 0x0000ff0) != 0x00000000) {
1291 nregs = fetch_reg(cookie,
1294 nregs = (insn >> 7) & 0x1f;
1295 switch ((insn >> 5) & 3) {
1298 offset = offset << nregs;
1302 offset = offset >> nregs;
1309 *new_pc = addr + offset;
1314 case 0xa: /* b ... */
1315 case 0xb: /* bl ... */
1316 addr = ((insn << 2) & 0x03ffffff);
1317 if (addr & 0x02000000)
1319 *new_pc = (pc + 8 + addr);
1321 case 0x7: /* ldr pc, [pc, reg, lsl #2] */
1322 addr = fetch_reg(cookie, insn & 0xf);
1323 addr = pc + 8 + (addr << 2);
1324 error = read_int(cookie, addr, &addr);
1327 case 0x1: /* mov pc, reg */
1328 *new_pc = fetch_reg(cookie, insn & 0xf);
1331 case 0x5: /* ldr pc, [reg] */
1332 addr = fetch_reg(cookie, (insn >> 16) & 0xf);
1333 /* ldr pc, [reg, #offset] */
1334 if (insn & (1 << 24))
1335 offset = insn & 0xfff;
1336 if (insn & 0x00800000)
1340 error = read_int(cookie, addr, &addr);
1344 case 0x8: /* ldmxx reg, {..., pc} */
1346 addr = fetch_reg(cookie, (insn >> 16) & 0xf);
1347 nregs = (insn & 0x5555) + ((insn >> 1) & 0x5555);
1348 nregs = (nregs & 0x3333) + ((nregs >> 2) & 0x3333);
1349 nregs = (nregs + (nregs >> 4)) & 0x0f0f;
1350 nregs = (nregs + (nregs >> 8)) & 0x001f;
1351 switch ((insn >> 23) & 0x3) {
1352 case 0x0: /* ldmda */
1355 case 0x1: /* ldmia */
1356 addr = addr + 0 + ((nregs - 1) << 2);
1358 case 0x2: /* ldmdb */
1361 case 0x3: /* ldmib */
1362 addr = addr + 4 + ((nregs - 1) << 2);
1365 error = read_int(cookie, addr, &addr);
1376 set_stackptrs(int cpu)
1379 set_stackptr(PSR_IRQ32_MODE,
1380 irqstack + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1381 set_stackptr(PSR_ABT32_MODE,
1382 abtstack + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1383 set_stackptr(PSR_UND32_MODE,
1384 undstack + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1388 set_stackptrs(int cpu)
1391 set_stackptr(PSR_IRQ32_MODE,
1392 irqstack.pv_va + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1393 set_stackptr(PSR_ABT32_MODE,
1394 abtstack.pv_va + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1395 set_stackptr(PSR_UND32_MODE,
1396 undstack.pv_va + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1401 #define efi_next_descriptor(ptr, size) \
1402 ((struct efi_md *)(((uint8_t *) ptr) + size))
1405 add_efi_map_entries(struct efi_map_header *efihdr, struct mem_region *mr,
1408 struct efi_md *map, *p;
1410 size_t efisz, memory_size;
1413 static const char *types[] = {
1419 "RuntimeServicesCode",
1420 "RuntimeServicesData",
1421 "ConventionalMemory",
1423 "ACPIReclaimMemory",
1426 "MemoryMappedIOPortSpace",
1434 * Memory map data provided by UEFI via the GetMemoryMap
1435 * Boot Services API.
1437 efisz = roundup2(sizeof(struct efi_map_header), 0x10);
1438 map = (struct efi_md *)((uint8_t *)efihdr + efisz);
1440 if (efihdr->descriptor_size == 0)
1442 ndesc = efihdr->memory_size / efihdr->descriptor_size;
1444 if (boothowto & RB_VERBOSE)
1445 printf("%23s %12s %12s %8s %4s\n",
1446 "Type", "Physical", "Virtual", "#Pages", "Attr");
1449 for (i = 0, j = 0, p = map; i < ndesc; i++,
1450 p = efi_next_descriptor(p, efihdr->descriptor_size)) {
1451 if (boothowto & RB_VERBOSE) {
1452 if (p->md_type < nitems(types))
1453 type = types[p->md_type];
1456 printf("%23s %012llx %12p %08llx ", type, p->md_phys,
1457 p->md_virt, p->md_pages);
1458 if (p->md_attr & EFI_MD_ATTR_UC)
1460 if (p->md_attr & EFI_MD_ATTR_WC)
1462 if (p->md_attr & EFI_MD_ATTR_WT)
1464 if (p->md_attr & EFI_MD_ATTR_WB)
1466 if (p->md_attr & EFI_MD_ATTR_UCE)
1468 if (p->md_attr & EFI_MD_ATTR_WP)
1470 if (p->md_attr & EFI_MD_ATTR_RP)
1472 if (p->md_attr & EFI_MD_ATTR_XP)
1474 if (p->md_attr & EFI_MD_ATTR_NV)
1476 if (p->md_attr & EFI_MD_ATTR_MORE_RELIABLE)
1477 printf("MORE_RELIABLE ");
1478 if (p->md_attr & EFI_MD_ATTR_RO)
1480 if (p->md_attr & EFI_MD_ATTR_RT)
1485 switch (p->md_type) {
1486 case EFI_MD_TYPE_CODE:
1487 case EFI_MD_TYPE_DATA:
1488 case EFI_MD_TYPE_BS_CODE:
1489 case EFI_MD_TYPE_BS_DATA:
1490 case EFI_MD_TYPE_FREE:
1492 * We're allowed to use any entry with these types.
1500 if (j >= FDT_MEM_REGIONS)
1503 mr[j].mr_start = p->md_phys;
1504 mr[j].mr_size = p->md_pages * PAGE_SIZE;
1505 memory_size += mr[j].mr_size;
1532 debugf("loader passed (static) kenv:\n");
1533 if (loader_envp == NULL) {
1534 debugf(" no env, null ptr\n");
1537 debugf(" loader_envp = 0x%08x\n", (uint32_t)loader_envp);
1539 for (cp = loader_envp; cp != NULL; cp = kenv_next(cp))
1540 debugf(" %x %s\n", (uint32_t)cp, cp);
1545 initarm(struct arm_boot_params *abp)
1547 struct mem_region mem_regions[FDT_MEM_REGIONS];
1548 struct pv_addr kernel_l1pt;
1549 struct pv_addr dpcpu;
1550 vm_offset_t dtbp, freemempos, l2_start, lastaddr;
1556 int i, j, err_devmap, mem_regions_sz;
1558 lastaddr = parse_boot_param(abp);
1559 arm_physmem_kernaddr = abp->abp_physaddr;
1567 * Find the dtb passed in by the boot loader.
1569 kmdp = preload_search_by_type("elf kernel");
1571 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
1573 dtbp = (vm_offset_t)NULL;
1575 #if defined(FDT_DTB_STATIC)
1577 * In case the device tree blob was not retrieved (from metadata) try
1578 * to use the statically embedded one.
1580 if (dtbp == (vm_offset_t)NULL)
1581 dtbp = (vm_offset_t)&fdt_static_dtb;
1584 if (OF_install(OFW_FDT, 0) == FALSE)
1585 panic("Cannot install FDT");
1587 if (OF_init((void *)dtbp) != 0)
1588 panic("OF_init failed with the found device tree");
1590 /* Grab physical memory regions information from device tree. */
1591 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz, &memsize) != 0)
1592 panic("Cannot get physical memory regions");
1593 arm_physmem_hardware_regions(mem_regions, mem_regions_sz);
1595 /* Grab reserved memory regions information from device tree. */
1596 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0)
1597 arm_physmem_exclude_regions(mem_regions, mem_regions_sz,
1598 EXFLAG_NODUMP | EXFLAG_NOALLOC);
1600 /* Platform-specific initialisation */
1601 platform_probe_and_attach();
1605 /* Do basic tuning, hz etc */
1608 /* Calculate number of L2 tables needed for mapping vm_page_array */
1609 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page);
1610 l2size = (l2size >> L1_S_SHIFT) + 1;
1613 * Add one table for end of kernel map, one for stacks, msgbuf and
1614 * L1 and L2 tables map and one for vectors map.
1618 /* Make it divisible by 4 */
1619 l2size = (l2size + 3) & ~3;
1621 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK;
1623 /* Define a macro to simplify memory allocation */
1624 #define valloc_pages(var, np) \
1625 alloc_pages((var).pv_va, (np)); \
1626 (var).pv_pa = (var).pv_va + (abp->abp_physaddr - KERNVIRTADDR);
1628 #define alloc_pages(var, np) \
1629 (var) = freemempos; \
1630 freemempos += (np * PAGE_SIZE); \
1631 memset((char *)(var), 0, ((np) * PAGE_SIZE));
1633 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
1634 freemempos += PAGE_SIZE;
1635 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
1637 for (i = 0, j = 0; i < l2size; ++i) {
1638 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
1639 valloc_pages(kernel_pt_table[i],
1640 L2_TABLE_SIZE / PAGE_SIZE);
1643 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va +
1644 L2_TABLE_SIZE_REAL * (i - j);
1645 kernel_pt_table[i].pv_pa =
1646 kernel_pt_table[i].pv_va - KERNVIRTADDR +
1652 * Allocate a page for the system page mapped to 0x00000000
1653 * or 0xffff0000. This page will just contain the system vectors
1654 * and can be shared by all processes.
1656 valloc_pages(systempage, 1);
1658 /* Allocate dynamic per-cpu area. */
1659 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
1660 dpcpu_init((void *)dpcpu.pv_va, 0);
1662 /* Allocate stacks for all modes */
1663 valloc_pages(irqstack, IRQ_STACK_SIZE * MAXCPU);
1664 valloc_pages(abtstack, ABT_STACK_SIZE * MAXCPU);
1665 valloc_pages(undstack, UND_STACK_SIZE * MAXCPU);
1666 valloc_pages(kernelstack, kstack_pages * MAXCPU);
1667 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
1670 * Now we start construction of the L1 page table
1671 * We start by mapping the L2 page tables into the L1.
1672 * This means that we can replace L1 mappings later on if necessary
1674 l1pagetable = kernel_l1pt.pv_va;
1677 * Try to map as much as possible of kernel text and data using
1678 * 1MB section mapping and for the rest of initial kernel address
1679 * space use L2 coarse tables.
1681 * Link L2 tables for mapping remainder of kernel (modulo 1MB)
1682 * and kernel structures
1684 l2_start = lastaddr & ~(L1_S_OFFSET);
1685 for (i = 0 ; i < l2size - 1; i++)
1686 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE,
1687 &kernel_pt_table[i]);
1689 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE;
1691 /* Map kernel code and data */
1692 pmap_map_chunk(l1pagetable, KERNVIRTADDR, abp->abp_physaddr,
1693 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK,
1694 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
1696 /* Map L1 directory and allocated L2 page tables */
1697 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
1698 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
1700 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va,
1701 kernel_pt_table[0].pv_pa,
1702 L2_TABLE_SIZE_REAL * l2size,
1703 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
1705 /* Map allocated DPCPU, stacks and msgbuf */
1706 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa,
1707 freemempos - dpcpu.pv_va,
1708 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
1710 /* Link and map the vector page */
1711 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH,
1712 &kernel_pt_table[l2size - 1]);
1713 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
1714 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE);
1716 /* Establish static device mappings. */
1717 err_devmap = platform_devmap_init();
1718 devmap_bootstrap(l1pagetable, NULL);
1719 vm_max_kernel_address = platform_lastaddr();
1721 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT);
1722 pmap_pa = kernel_l1pt.pv_pa;
1723 cpu_setttb(kernel_l1pt.pv_pa);
1725 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2));
1728 * Now that proper page tables are installed, call cpu_setup() to enable
1729 * instruction and data caches and other chip-specific features.
1734 * Only after the SOC registers block is mapped we can perform device
1735 * tree fixups, as they may attempt to read parameters from hardware.
1737 OF_interpret("perform-fixup", 0);
1739 platform_gpio_init();
1743 debugf("initarm: console initialized\n");
1744 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp);
1745 debugf(" boothowto = 0x%08x\n", boothowto);
1746 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
1749 env = kern_getenv("kernelname");
1751 strlcpy(kernelname, env, sizeof(kernelname));
1755 if (err_devmap != 0)
1756 printf("WARNING: could not fully configure devmap, error=%d\n",
1759 platform_late_init();
1762 * Pages were allocated during the secondary bootstrap for the
1763 * stacks for different CPU modes.
1764 * We must now set the r13 registers in the different CPU modes to
1765 * point to these stacks.
1766 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
1767 * of the stack memory.
1769 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE);
1774 * We must now clean the cache again....
1775 * Cleaning may be done by reading new data to displace any
1776 * dirty data in the cache. This will have happened in cpu_setttb()
1777 * but since we are boot strapping the addresses used for the read
1778 * may have just been remapped and thus the cache could be out
1779 * of sync. A re-clean after the switch will cure this.
1780 * After booting there are no gross relocations of the kernel thus
1781 * this problem will not occur after initarm().
1783 cpu_idcache_wbinv_all();
1787 init_proc0(kernelstack.pv_va);
1789 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
1790 pmap_bootstrap(freemempos, &kernel_l1pt);
1791 msgbufp = (void *)msgbufpv.pv_va;
1792 msgbufinit(msgbufp, msgbufsize);
1796 * Exclude the kernel (and all the things we allocated which immediately
1797 * follow the kernel) from the VM allocation pool but not from crash
1798 * dumps. virtual_avail is a global variable which tracks the kva we've
1799 * "allocated" while setting up pmaps.
1801 * Prepare the list of physical memory available to the vm subsystem.
1803 arm_physmem_exclude_region(abp->abp_physaddr,
1804 (virtual_avail - KERNVIRTADDR), EXFLAG_NOALLOC);
1805 arm_physmem_init_kernel_globals();
1807 init_param2(physmem);
1811 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
1812 sizeof(struct pcb)));
1814 #else /* __ARM_ARCH < 6 */
1816 initarm(struct arm_boot_params *abp)
1818 struct mem_region mem_regions[FDT_MEM_REGIONS];
1819 vm_paddr_t lastaddr;
1820 vm_offset_t dtbp, kernelstack, dpcpu;
1823 int err_devmap, mem_regions_sz;
1825 struct efi_map_header *efihdr;
1828 /* get last allocated physical address */
1829 arm_physmem_kernaddr = abp->abp_physaddr;
1830 lastaddr = parse_boot_param(abp) - KERNVIRTADDR + arm_physmem_kernaddr;
1836 * Find the dtb passed in by the boot loader.
1838 kmdp = preload_search_by_type("elf kernel");
1839 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
1840 #if defined(FDT_DTB_STATIC)
1842 * In case the device tree blob was not retrieved (from metadata) try
1843 * to use the statically embedded one.
1845 if (dtbp == (vm_offset_t)NULL)
1846 dtbp = (vm_offset_t)&fdt_static_dtb;
1849 if (OF_install(OFW_FDT, 0) == FALSE)
1850 panic("Cannot install FDT");
1852 if (OF_init((void *)dtbp) != 0)
1853 panic("OF_init failed with the found device tree");
1855 #if defined(LINUX_BOOT_ABI)
1856 if (loader_envp == NULL && fdt_get_chosen_bootargs(linux_command_line,
1857 LBABI_MAX_COMMAND_LINE) == 0)
1858 cmdline_set_env(linux_command_line, CMDLINE_GUARD);
1862 efihdr = (struct efi_map_header *)preload_search_info(kmdp,
1863 MODINFO_METADATA | MODINFOMD_EFI_MAP);
1864 if (efihdr != NULL) {
1865 add_efi_map_entries(efihdr, mem_regions, &mem_regions_sz);
1869 /* Grab physical memory regions information from device tree. */
1870 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz,NULL) != 0)
1871 panic("Cannot get physical memory regions");
1873 arm_physmem_hardware_regions(mem_regions, mem_regions_sz);
1875 /* Grab reserved memory regions information from device tree. */
1876 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0)
1877 arm_physmem_exclude_regions(mem_regions, mem_regions_sz,
1878 EXFLAG_NODUMP | EXFLAG_NOALLOC);
1881 * Set TEX remapping registers.
1882 * Setup kernel page tables and switch to kernel L1 page table.
1885 pmap_bootstrap_prepare(lastaddr);
1888 * Now that proper page tables are installed, call cpu_setup() to enable
1889 * instruction and data caches and other chip-specific features.
1893 /* Platform-specific initialisation */
1894 platform_probe_and_attach();
1897 /* Do basic tuning, hz etc */
1901 * Allocate a page for the system page mapped to 0xffff0000
1902 * This page will just contain the system vectors and can be
1903 * shared by all processes.
1905 systempage = pmap_preboot_get_pages(1);
1907 /* Map the vector page. */
1908 pmap_preboot_map_pages(systempage, ARM_VECTORS_HIGH, 1);
1909 if (virtual_end >= ARM_VECTORS_HIGH)
1910 virtual_end = ARM_VECTORS_HIGH - 1;
1912 /* Allocate dynamic per-cpu area. */
1913 dpcpu = pmap_preboot_get_vpages(DPCPU_SIZE / PAGE_SIZE);
1914 dpcpu_init((void *)dpcpu, 0);
1916 /* Allocate stacks for all modes */
1917 irqstack = pmap_preboot_get_vpages(IRQ_STACK_SIZE * MAXCPU);
1918 abtstack = pmap_preboot_get_vpages(ABT_STACK_SIZE * MAXCPU);
1919 undstack = pmap_preboot_get_vpages(UND_STACK_SIZE * MAXCPU );
1920 kernelstack = pmap_preboot_get_vpages(kstack_pages * MAXCPU);
1922 /* Allocate message buffer. */
1923 msgbufp = (void *)pmap_preboot_get_vpages(
1924 round_page(msgbufsize) / PAGE_SIZE);
1927 * Pages were allocated during the secondary bootstrap for the
1928 * stacks for different CPU modes.
1929 * We must now set the r13 registers in the different CPU modes to
1930 * point to these stacks.
1931 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
1932 * of the stack memory.
1937 /* Establish static device mappings. */
1938 err_devmap = platform_devmap_init();
1939 devmap_bootstrap(0, NULL);
1940 vm_max_kernel_address = platform_lastaddr();
1943 * Only after the SOC registers block is mapped we can perform device
1944 * tree fixups, as they may attempt to read parameters from hardware.
1946 OF_interpret("perform-fixup", 0);
1947 platform_gpio_init();
1950 debugf("initarm: console initialized\n");
1951 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp);
1952 debugf(" boothowto = 0x%08x\n", boothowto);
1953 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
1954 debugf(" lastaddr1: 0x%08x\n", lastaddr);
1957 env = kern_getenv("kernelname");
1959 strlcpy(kernelname, env, sizeof(kernelname));
1961 if (err_devmap != 0)
1962 printf("WARNING: could not fully configure devmap, error=%d\n",
1965 platform_late_init();
1968 * We must now clean the cache again....
1969 * Cleaning may be done by reading new data to displace any
1970 * dirty data in the cache. This will have happened in cpu_setttb()
1971 * but since we are boot strapping the addresses used for the read
1972 * may have just been remapped and thus the cache could be out
1973 * of sync. A re-clean after the switch will cure this.
1974 * After booting there are no gross relocations of the kernel thus
1975 * this problem will not occur after initarm().
1977 /* Set stack for exception handlers */
1979 init_proc0(kernelstack);
1980 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
1981 enable_interrupts(PSR_A);
1984 /* Exclude the kernel (and all the things we allocated which immediately
1985 * follow the kernel) from the VM allocation pool but not from crash
1986 * dumps. virtual_avail is a global variable which tracks the kva we've
1987 * "allocated" while setting up pmaps.
1989 * Prepare the list of physical memory available to the vm subsystem.
1991 arm_physmem_exclude_region(abp->abp_physaddr,
1992 pmap_preboot_get_pages(0) - abp->abp_physaddr, EXFLAG_NOALLOC);
1993 arm_physmem_init_kernel_globals();
1995 init_param2(physmem);
1996 /* Init message buffer. */
1997 msgbufinit(msgbufp, msgbufsize);
2000 return ((void *)STACKALIGN(thread0.td_pcb));
2004 #endif /* __ARM_ARCH < 6 */