1 /* $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $ */
4 * Copyright (c) 2004 Olivier Houchard
5 * Copyright (c) 1994-1998 Mark Brinicombe.
6 * Copyright (c) 1994 Brini.
9 * This code is derived from software written for Brini by Mark Brinicombe
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by Mark Brinicombe
22 * for the NetBSD Project.
23 * 4. The name of the company nor the name of the author may be used to
24 * endorse or promote products derived from this software without specific
25 * prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
28 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
29 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
30 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
31 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
32 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
33 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * Machine dependant functions for kernel setup
42 * Updated : 18/04/01 updated for new wscons
45 #include "opt_compat.h"
47 #include "opt_platform.h"
48 #include "opt_sched.h"
49 #include "opt_timer.h"
51 #include <sys/cdefs.h>
52 __FBSDID("$FreeBSD$");
54 #include <sys/param.h>
56 #include <sys/systm.h>
63 #include <sys/imgact.h>
65 #include <sys/kernel.h>
67 #include <sys/linker.h>
69 #include <sys/malloc.h>
70 #include <sys/msgbuf.h>
71 #include <sys/mutex.h>
73 #include <sys/ptrace.h>
74 #include <sys/rwlock.h>
75 #include <sys/sched.h>
76 #include <sys/signalvar.h>
77 #include <sys/syscallsubr.h>
78 #include <sys/sysctl.h>
79 #include <sys/sysent.h>
80 #include <sys/sysproto.h>
85 #include <vm/vm_map.h>
86 #include <vm/vm_object.h>
87 #include <vm/vm_page.h>
88 #include <vm/vm_pager.h>
90 #include <machine/armreg.h>
91 #include <machine/atags.h>
92 #include <machine/cpu.h>
93 #include <machine/devmap.h>
94 #include <machine/frame.h>
95 #include <machine/intr.h>
96 #include <machine/machdep.h>
97 #include <machine/md_var.h>
98 #include <machine/metadata.h>
99 #include <machine/pcb.h>
100 #include <machine/physmem.h>
101 #include <machine/platform.h>
102 #include <machine/reg.h>
103 #include <machine/trap.h>
104 #include <machine/undefined.h>
105 #include <machine/vfp.h>
106 #include <machine/vmparam.h>
107 #include <machine/sysarch.h>
110 #include <dev/fdt/fdt_common.h>
111 #include <dev/ofw/openfirm.h>
119 #define debugf(fmt, args...) printf(fmt, ##args)
121 #define debugf(fmt, args...)
124 struct pcpu __pcpu[MAXCPU];
125 struct pcpu *pcpup = &__pcpu[0];
127 static struct trapframe proc0_tf;
128 uint32_t cpu_reset_address = 0;
130 vm_offset_t vector_page;
132 int (*_arm_memcpy)(void *, void *, int, int) = NULL;
133 int (*_arm_bzero)(void *, int, int) = NULL;
134 int _min_memcpy_size = 0;
135 int _min_bzero_size = 0;
141 * This is the number of L2 page tables required for covering max
142 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf,
143 * stacks etc.), uprounded to be divisible by 4.
145 #define KERNEL_PT_MAX 78
147 static struct pv_addr kernel_pt_table[KERNEL_PT_MAX];
151 struct pv_addr systempage;
152 static struct pv_addr msgbufpv;
153 struct pv_addr irqstack;
154 struct pv_addr undstack;
155 struct pv_addr abtstack;
156 static struct pv_addr kernelstack;
160 #if defined(LINUX_BOOT_ABI)
161 #define LBABI_MAX_BANKS 10
164 struct arm_lbabi_tag *atag_list;
165 char linux_command_line[LBABI_MAX_COMMAND_LINE + 1];
166 char atags[LBABI_MAX_COMMAND_LINE * 2];
167 uint32_t memstart[LBABI_MAX_BANKS];
168 uint32_t memsize[LBABI_MAX_BANKS];
172 static uint32_t board_revision;
173 /* hex representation of uint64_t */
174 static char board_serial[32];
176 SYSCTL_NODE(_hw, OID_AUTO, board, CTLFLAG_RD, 0, "Board attributes");
177 SYSCTL_UINT(_hw_board, OID_AUTO, revision, CTLFLAG_RD,
178 &board_revision, 0, "Board revision");
179 SYSCTL_STRING(_hw_board, OID_AUTO, serial, CTLFLAG_RD,
180 board_serial, 0, "Board serial");
183 SYSCTL_INT(_hw, HW_FLOATINGPT, floatingpoint, CTLFLAG_RD,
184 &vfp_exists, 0, "Floating point support enabled");
187 board_set_serial(uint64_t serial)
190 snprintf(board_serial, sizeof(board_serial)-1,
195 board_set_revision(uint32_t revision)
198 board_revision = revision;
202 sendsig(catcher, ksi, mask)
209 struct trapframe *tf;
210 struct sigframe *fp, frame;
218 PROC_LOCK_ASSERT(p, MA_OWNED);
219 sig = ksi->ksi_signo;
220 code = ksi->ksi_code;
222 mtx_assert(&psp->ps_mtx, MA_OWNED);
224 onstack = sigonstack(tf->tf_usr_sp);
226 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm,
229 /* Allocate and validate space for the signal handler context. */
230 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !(onstack) &&
231 SIGISMEMBER(psp->ps_sigonstack, sig)) {
232 fp = (struct sigframe *)(td->td_sigstk.ss_sp +
233 td->td_sigstk.ss_size);
234 #if defined(COMPAT_43)
235 td->td_sigstk.ss_flags |= SS_ONSTACK;
238 fp = (struct sigframe *)td->td_frame->tf_usr_sp;
240 /* make room on the stack */
243 /* make the stack aligned */
244 fp = (struct sigframe *)STACKALIGN(fp);
245 /* Populate the siginfo frame. */
246 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0);
247 frame.sf_si = ksi->ksi_info;
248 frame.sf_uc.uc_sigmask = *mask;
249 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK )
250 ? ((onstack) ? SS_ONSTACK : 0) : SS_DISABLE;
251 frame.sf_uc.uc_stack = td->td_sigstk;
252 mtx_unlock(&psp->ps_mtx);
253 PROC_UNLOCK(td->td_proc);
255 /* Copy the sigframe out to the user's stack. */
256 if (copyout(&frame, fp, sizeof(*fp)) != 0) {
257 /* Process has trashed its stack. Kill it. */
258 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp);
263 /* Translate the signal if appropriate. */
264 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
265 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
268 * Build context to run handler in. We invoke the handler
269 * directly, only returning via the trampoline. Note the
270 * trampoline version numbers are coordinated with machine-
271 * dependent code in libc.
275 tf->tf_r1 = (register_t)&fp->sf_si;
276 tf->tf_r2 = (register_t)&fp->sf_uc;
278 /* the trampoline uses r5 as the uc address */
279 tf->tf_r5 = (register_t)&fp->sf_uc;
280 tf->tf_pc = (register_t)catcher;
281 tf->tf_usr_sp = (register_t)fp;
282 tf->tf_usr_lr = (register_t)(PS_STRINGS - *(p->p_sysent->sv_szsigcode));
284 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr,
288 mtx_lock(&psp->ps_mtx);
291 struct kva_md_info kmi;
296 * Initialize the vector page, and select whether or not to
297 * relocate the vectors.
299 * NOTE: We expect the vector page to be mapped at its expected
303 extern unsigned int page0[], page0_data[];
305 arm_vector_init(vm_offset_t va, int which)
307 unsigned int *vectors = (int *) va;
308 unsigned int *vectors_data = vectors + (page0_data - page0);
312 * Loop through the vectors we're taking over, and copy the
313 * vector's insn and data word.
315 for (vec = 0; vec < ARM_NVEC; vec++) {
316 if ((which & (1 << vec)) == 0) {
317 /* Don't want to take over this vector. */
320 vectors[vec] = page0[vec];
321 vectors_data[vec] = page0_data[vec];
324 /* Now sync the vectors. */
325 cpu_icache_sync_range(va, (ARM_NVEC * 2) * sizeof(u_int));
329 if (va == ARM_VECTORS_HIGH) {
331 * Assume the MD caller knows what it's doing here, and
332 * really does want the vector page relocated.
334 * Note: This has to be done here (and not just in
335 * cpu_setup()) because the vector page needs to be
336 * accessible *before* cpu_startup() is called.
339 * NOTE: If the CPU control register is not readable,
340 * this will totally fail! We'll just assume that
341 * any system that has high vector support has a
342 * readable CPU control register, for now. If we
343 * ever encounter one that does not, we'll have to
346 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC);
351 cpu_startup(void *dummy)
353 struct pcb *pcb = thread0.td_pcb;
354 const unsigned int mbyte = 1024 * 1024;
355 #ifdef ARM_TP_ADDRESS
356 #ifndef ARM_CACHE_LOCK_ENABLE
363 vm_ksubmap_init(&kmi);
366 * Display the RAM layout.
368 printf("real memory = %ju (%ju MB)\n",
369 (uintmax_t)arm32_ptob(realmem),
370 (uintmax_t)arm32_ptob(realmem) / mbyte);
371 printf("avail memory = %ju (%ju MB)\n",
372 (uintmax_t)arm32_ptob(vm_cnt.v_free_count),
373 (uintmax_t)arm32_ptob(vm_cnt.v_free_count) / mbyte);
375 arm_physmem_print_tables();
376 arm_devmap_print_table();
380 vm_pager_bufferinit();
381 pcb->un_32.pcb32_sp = (u_int)thread0.td_kstack +
382 USPACE_SVC_STACK_TOP;
383 vector_page_setprot(VM_PROT_READ);
384 pmap_set_pcb_pagedir(pmap_kernel(), pcb);
386 #ifdef ARM_TP_ADDRESS
387 #ifdef ARM_CACHE_LOCK_ENABLE
388 pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS);
389 arm_lock_cache_line(ARM_TP_ADDRESS);
391 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO);
392 pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m));
394 *(uint32_t *)ARM_RAS_START = 0;
395 *(uint32_t *)ARM_RAS_END = 0xffffffff;
399 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
402 * Flush the D-cache for non-DMA I/O so that the I-cache can
403 * be made coherent later.
406 cpu_flush_dcache(void *ptr, size_t len)
409 cpu_dcache_wb_range((uintptr_t)ptr, len);
411 cpu_l2cache_wb_range((uintptr_t)vtophys(ptr), len);
413 cpu_l2cache_wb_range((uintptr_t)ptr, len);
417 /* Get current clock frequency for the given cpu id. */
419 cpu_est_clockrate(int cpu_id, uint64_t *rate)
429 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", busy, curcpu);
431 #ifndef NO_EVENTTIMERS
435 if (!sched_runnable())
437 #ifndef NO_EVENTTIMERS
442 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", busy, curcpu);
446 cpu_idle_wakeup(int cpu)
453 * Most ARM platforms don't need to do anything special to init their clocks
454 * (they get intialized during normal device attachment), and by not defining a
455 * cpu_initclocks() function they get this generic one. Any platform that needs
456 * to do something special can just provide their own implementation, which will
457 * override this one due to the weak linkage.
460 arm_generic_initclocks(void)
463 #ifndef NO_EVENTTIMERS
465 if (PCPU_GET(cpuid) == 0)
466 cpu_initclocks_bsp();
470 cpu_initclocks_bsp();
474 __weak_reference(arm_generic_initclocks, cpu_initclocks);
477 fill_regs(struct thread *td, struct reg *regs)
479 struct trapframe *tf = td->td_frame;
480 bcopy(&tf->tf_r0, regs->r, sizeof(regs->r));
481 regs->r_sp = tf->tf_usr_sp;
482 regs->r_lr = tf->tf_usr_lr;
483 regs->r_pc = tf->tf_pc;
484 regs->r_cpsr = tf->tf_spsr;
488 fill_fpregs(struct thread *td, struct fpreg *regs)
490 bzero(regs, sizeof(*regs));
495 set_regs(struct thread *td, struct reg *regs)
497 struct trapframe *tf = td->td_frame;
499 bcopy(regs->r, &tf->tf_r0, sizeof(regs->r));
500 tf->tf_usr_sp = regs->r_sp;
501 tf->tf_usr_lr = regs->r_lr;
502 tf->tf_pc = regs->r_pc;
503 tf->tf_spsr &= ~PSR_FLAGS;
504 tf->tf_spsr |= regs->r_cpsr & PSR_FLAGS;
509 set_fpregs(struct thread *td, struct fpreg *regs)
515 fill_dbregs(struct thread *td, struct dbreg *regs)
520 set_dbregs(struct thread *td, struct dbreg *regs)
527 ptrace_read_int(struct thread *td, vm_offset_t addr, u_int32_t *v)
532 PROC_LOCK_ASSERT(td->td_proc, MA_NOTOWNED);
533 iov.iov_base = (caddr_t) v;
534 iov.iov_len = sizeof(u_int32_t);
537 uio.uio_offset = (off_t)addr;
538 uio.uio_resid = sizeof(u_int32_t);
539 uio.uio_segflg = UIO_SYSSPACE;
540 uio.uio_rw = UIO_READ;
542 return proc_rwmem(td->td_proc, &uio);
546 ptrace_write_int(struct thread *td, vm_offset_t addr, u_int32_t v)
551 PROC_LOCK_ASSERT(td->td_proc, MA_NOTOWNED);
552 iov.iov_base = (caddr_t) &v;
553 iov.iov_len = sizeof(u_int32_t);
556 uio.uio_offset = (off_t)addr;
557 uio.uio_resid = sizeof(u_int32_t);
558 uio.uio_segflg = UIO_SYSSPACE;
559 uio.uio_rw = UIO_WRITE;
561 return proc_rwmem(td->td_proc, &uio);
565 ptrace_single_step(struct thread *td)
570 KASSERT(td->td_md.md_ptrace_instr == 0,
571 ("Didn't clear single step"));
574 error = ptrace_read_int(td, td->td_frame->tf_pc + 4,
575 &td->td_md.md_ptrace_instr);
578 error = ptrace_write_int(td, td->td_frame->tf_pc + 4,
581 td->td_md.md_ptrace_instr = 0;
582 td->td_md.md_ptrace_addr = td->td_frame->tf_pc + 4;
589 ptrace_clear_single_step(struct thread *td)
593 if (td->td_md.md_ptrace_instr) {
596 ptrace_write_int(td, td->td_md.md_ptrace_addr,
597 td->td_md.md_ptrace_instr);
599 td->td_md.md_ptrace_instr = 0;
605 ptrace_set_pc(struct thread *td, unsigned long addr)
607 td->td_frame->tf_pc = addr;
612 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
623 if (td->td_md.md_spinlock_count == 0) {
624 cspr = disable_interrupts(PSR_I | PSR_F);
625 td->td_md.md_spinlock_count = 1;
626 td->td_md.md_saved_cspr = cspr;
628 td->td_md.md_spinlock_count++;
640 cspr = td->td_md.md_saved_cspr;
641 td->td_md.md_spinlock_count--;
642 if (td->td_md.md_spinlock_count == 0)
643 restore_interrupts(cspr);
647 * Clear registers on exec
650 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
652 struct trapframe *tf = td->td_frame;
654 memset(tf, 0, sizeof(*tf));
655 tf->tf_usr_sp = stack;
656 tf->tf_usr_lr = imgp->entry_addr;
657 tf->tf_svc_lr = 0x77777777;
658 tf->tf_pc = imgp->entry_addr;
659 tf->tf_spsr = PSR_USR32_MODE;
663 * Get machine context.
666 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret)
668 struct trapframe *tf = td->td_frame;
669 __greg_t *gr = mcp->__gregs;
671 if (clear_ret & GET_MC_CLEAR_RET)
674 gr[_REG_R0] = tf->tf_r0;
675 gr[_REG_R1] = tf->tf_r1;
676 gr[_REG_R2] = tf->tf_r2;
677 gr[_REG_R3] = tf->tf_r3;
678 gr[_REG_R4] = tf->tf_r4;
679 gr[_REG_R5] = tf->tf_r5;
680 gr[_REG_R6] = tf->tf_r6;
681 gr[_REG_R7] = tf->tf_r7;
682 gr[_REG_R8] = tf->tf_r8;
683 gr[_REG_R9] = tf->tf_r9;
684 gr[_REG_R10] = tf->tf_r10;
685 gr[_REG_R11] = tf->tf_r11;
686 gr[_REG_R12] = tf->tf_r12;
687 gr[_REG_SP] = tf->tf_usr_sp;
688 gr[_REG_LR] = tf->tf_usr_lr;
689 gr[_REG_PC] = tf->tf_pc;
690 gr[_REG_CPSR] = tf->tf_spsr;
696 * Set machine context.
698 * However, we don't set any but the user modifiable flags, and we won't
699 * touch the cs selector.
702 set_mcontext(struct thread *td, const mcontext_t *mcp)
704 struct trapframe *tf = td->td_frame;
705 const __greg_t *gr = mcp->__gregs;
707 tf->tf_r0 = gr[_REG_R0];
708 tf->tf_r1 = gr[_REG_R1];
709 tf->tf_r2 = gr[_REG_R2];
710 tf->tf_r3 = gr[_REG_R3];
711 tf->tf_r4 = gr[_REG_R4];
712 tf->tf_r5 = gr[_REG_R5];
713 tf->tf_r6 = gr[_REG_R6];
714 tf->tf_r7 = gr[_REG_R7];
715 tf->tf_r8 = gr[_REG_R8];
716 tf->tf_r9 = gr[_REG_R9];
717 tf->tf_r10 = gr[_REG_R10];
718 tf->tf_r11 = gr[_REG_R11];
719 tf->tf_r12 = gr[_REG_R12];
720 tf->tf_usr_sp = gr[_REG_SP];
721 tf->tf_usr_lr = gr[_REG_LR];
722 tf->tf_pc = gr[_REG_PC];
723 tf->tf_spsr = gr[_REG_CPSR];
732 sys_sigreturn(td, uap)
734 struct sigreturn_args /* {
735 const struct __ucontext *sigcntxp;
743 if (copyin(uap->sigcntxp, &uc, sizeof(uc)))
746 * Make sure the processor mode has not been tampered with and
747 * interrupts have not been disabled.
749 spsr = uc.uc_mcontext.__gregs[_REG_CPSR];
750 if ((spsr & PSR_MODE) != PSR_USR32_MODE ||
751 (spsr & (PSR_I | PSR_F)) != 0)
753 /* Restore register context. */
754 set_mcontext(td, &uc.uc_mcontext);
756 /* Restore signal mask. */
757 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
759 return (EJUSTRETURN);
764 * Construct a PCB from a trapframe. This is called from kdb_trap() where
765 * we want to start a backtrace from the function that caused us to enter
766 * the debugger. We have the context in the trapframe, but base the trace
767 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
768 * enough for a backtrace.
771 makectx(struct trapframe *tf, struct pcb *pcb)
773 pcb->un_32.pcb32_r8 = tf->tf_r8;
774 pcb->un_32.pcb32_r9 = tf->tf_r9;
775 pcb->un_32.pcb32_r10 = tf->tf_r10;
776 pcb->un_32.pcb32_r11 = tf->tf_r11;
777 pcb->un_32.pcb32_r12 = tf->tf_r12;
778 pcb->un_32.pcb32_pc = tf->tf_pc;
779 pcb->un_32.pcb32_lr = tf->tf_usr_lr;
780 pcb->un_32.pcb32_sp = tf->tf_usr_sp;
784 * Fake up a boot descriptor table
787 fake_preload_metadata(struct arm_boot_params *abp __unused)
790 vm_offset_t zstart = 0, zend = 0;
792 vm_offset_t lastaddr;
794 static uint32_t fake_preload[35];
796 fake_preload[i++] = MODINFO_NAME;
797 fake_preload[i++] = strlen("kernel") + 1;
798 strcpy((char*)&fake_preload[i++], "kernel");
800 fake_preload[i++] = MODINFO_TYPE;
801 fake_preload[i++] = strlen("elf kernel") + 1;
802 strcpy((char*)&fake_preload[i++], "elf kernel");
804 fake_preload[i++] = MODINFO_ADDR;
805 fake_preload[i++] = sizeof(vm_offset_t);
806 fake_preload[i++] = KERNVIRTADDR;
807 fake_preload[i++] = MODINFO_SIZE;
808 fake_preload[i++] = sizeof(uint32_t);
809 fake_preload[i++] = (uint32_t)&end - KERNVIRTADDR;
811 if (*(uint32_t *)KERNVIRTADDR == MAGIC_TRAMP_NUMBER) {
812 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_SSYM;
813 fake_preload[i++] = sizeof(vm_offset_t);
814 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 4);
815 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_ESYM;
816 fake_preload[i++] = sizeof(vm_offset_t);
817 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 8);
818 lastaddr = *(uint32_t *)(KERNVIRTADDR + 8);
820 zstart = *(uint32_t *)(KERNVIRTADDR + 4);
821 db_fetch_ksymtab(zstart, zend);
824 lastaddr = (vm_offset_t)&end;
825 fake_preload[i++] = 0;
827 preload_metadata = (void *)fake_preload;
835 #if ARM_ARCH_6 || ARM_ARCH_7A || defined(CPU_MV_PJ4B)
836 set_curthread(&thread0);
838 pcpu_init(pcpup, 0, sizeof(struct pcpu));
839 PCPU_SET(curthread, &thread0);
845 #if defined(LINUX_BOOT_ABI)
847 linux_parse_boot_param(struct arm_boot_params *abp)
849 struct arm_lbabi_tag *walker;
854 * Linux boot ABI: r0 = 0, r1 is the board type (!= 0) and r2
855 * is atags or dtb pointer. If all of these aren't satisfied,
858 if (!(abp->abp_r0 == 0 && abp->abp_r1 != 0 && abp->abp_r2 != 0))
861 board_id = abp->abp_r1;
862 walker = (struct arm_lbabi_tag *)
863 (abp->abp_r2 + KERNVIRTADDR - abp->abp_physaddr);
865 /* xxx - Need to also look for binary device tree */
866 if (ATAG_TAG(walker) != ATAG_CORE)
870 while (ATAG_TAG(walker) != ATAG_NONE) {
871 switch (ATAG_TAG(walker)) {
875 arm_physmem_hardware_region(walker->u.tag_mem.start,
876 walker->u.tag_mem.size);
881 serial = walker->u.tag_sn.low |
882 ((uint64_t)walker->u.tag_sn.high << 32);
883 board_set_serial(serial);
886 revision = walker->u.tag_rev.rev;
887 board_set_revision(revision);
890 /* XXX open question: Parse this for boothowto? */
891 bcopy(walker->u.tag_cmd.command, linux_command_line,
897 walker = ATAG_NEXT(walker);
900 /* Save a copy for later */
901 bcopy(atag_list, atags,
902 (char *)walker - (char *)atag_list + ATAG_SIZE(walker));
904 return fake_preload_metadata(abp);
908 #if defined(FREEBSD_BOOT_LOADER)
910 freebsd_parse_boot_param(struct arm_boot_params *abp)
912 vm_offset_t lastaddr = 0;
916 vm_offset_t ksym_start;
917 vm_offset_t ksym_end;
921 * Mask metadata pointer: it is supposed to be on page boundary. If
922 * the first argument (mdp) doesn't point to a valid address the
923 * bootloader must have passed us something else than the metadata
924 * ptr, so we give up. Also give up if we cannot find metadta section
925 * the loader creates that we get all this data out of.
928 if ((mdp = (void *)(abp->abp_r0 & ~PAGE_MASK)) == NULL)
930 preload_metadata = mdp;
931 kmdp = preload_search_by_type("elf kernel");
935 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
936 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *);
937 lastaddr = MD_FETCH(kmdp, MODINFOMD_KERNEND, vm_offset_t);
939 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
940 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
941 db_fetch_ksymtab(ksym_start, ksym_end);
943 preload_addr_relocate = KERNVIRTADDR - abp->abp_physaddr;
949 default_parse_boot_param(struct arm_boot_params *abp)
951 vm_offset_t lastaddr;
953 #if defined(LINUX_BOOT_ABI)
954 if ((lastaddr = linux_parse_boot_param(abp)) != 0)
957 #if defined(FREEBSD_BOOT_LOADER)
958 if ((lastaddr = freebsd_parse_boot_param(abp)) != 0)
961 /* Fall back to hardcoded metadata. */
962 lastaddr = fake_preload_metadata(abp);
968 * Stub version of the boot parameter parsing routine. We are
969 * called early in initarm, before even VM has been initialized.
970 * This routine needs to preserve any data that the boot loader
971 * has passed in before the kernel starts to grow past the end
972 * of the BSS, traditionally the place boot-loaders put this data.
974 * Since this is called so early, things that depend on the vm system
975 * being setup (including access to some SoC's serial ports), about
976 * all that can be done in this routine is to copy the arguments.
978 * This is the default boot parameter parsing routine. Individual
979 * kernels/boards can override this weak function with one of their
980 * own. We just fake metadata...
982 __weak_reference(default_parse_boot_param, parse_boot_param);
988 init_proc0(vm_offset_t kstack)
990 proc_linkup0(&proc0, &thread0);
991 thread0.td_kstack = kstack;
992 thread0.td_pcb = (struct pcb *)
993 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
994 thread0.td_pcb->pcb_flags = 0;
995 thread0.td_pcb->pcb_vfpcpu = -1;
996 thread0.td_pcb->pcb_vfpstate.fpscr = VFPSCR_DN | VFPSCR_FZ;
997 thread0.td_frame = &proc0_tf;
998 pcpup->pc_curpcb = thread0.td_pcb;
1002 set_stackptrs(int cpu)
1005 set_stackptr(PSR_IRQ32_MODE,
1006 irqstack.pv_va + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1007 set_stackptr(PSR_ABT32_MODE,
1008 abtstack.pv_va + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1009 set_stackptr(PSR_UND32_MODE,
1010 undstack.pv_va + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1034 debugf("loader passed (static) kenv:\n");
1035 if (kern_envp == NULL) {
1036 debugf(" no env, null ptr\n");
1039 debugf(" kern_envp = 0x%08x\n", (uint32_t)kern_envp);
1042 for (cp = kern_envp; cp != NULL; cp = kenv_next(cp))
1043 debugf(" %x %s\n", (uint32_t)cp, cp);
1047 initarm(struct arm_boot_params *abp)
1049 struct mem_region mem_regions[FDT_MEM_REGIONS];
1050 struct pv_addr kernel_l1pt;
1051 struct pv_addr dpcpu;
1052 vm_offset_t dtbp, freemempos, l2_start, lastaddr;
1053 uint32_t memsize, l2size;
1057 int i, j, err_devmap, mem_regions_sz;
1059 lastaddr = parse_boot_param(abp);
1060 arm_physmem_kernaddr = abp->abp_physaddr;
1066 * Find the dtb passed in by the boot loader.
1068 kmdp = preload_search_by_type("elf kernel");
1070 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
1072 dtbp = (vm_offset_t)NULL;
1074 #if defined(FDT_DTB_STATIC)
1076 * In case the device tree blob was not retrieved (from metadata) try
1077 * to use the statically embedded one.
1079 if (dtbp == (vm_offset_t)NULL)
1080 dtbp = (vm_offset_t)&fdt_static_dtb;
1083 if (OF_install(OFW_FDT, 0) == FALSE)
1084 panic("Cannot install FDT");
1086 if (OF_init((void *)dtbp) != 0)
1087 panic("OF_init failed with the found device tree");
1089 /* Grab physical memory regions information from device tree. */
1090 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz, &memsize) != 0)
1091 panic("Cannot get physical memory regions");
1092 arm_physmem_hardware_regions(mem_regions, mem_regions_sz);
1094 /* Grab reserved memory regions information from device tree. */
1095 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0)
1096 arm_physmem_exclude_regions(mem_regions, mem_regions_sz,
1097 EXFLAG_NODUMP | EXFLAG_NOALLOC);
1099 /* Platform-specific initialisation */
1100 platform_probe_and_attach();
1104 /* Do basic tuning, hz etc */
1107 /* Calculate number of L2 tables needed for mapping vm_page_array */
1108 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page);
1109 l2size = (l2size >> L1_S_SHIFT) + 1;
1112 * Add one table for end of kernel map, one for stacks, msgbuf and
1113 * L1 and L2 tables map and one for vectors map.
1117 /* Make it divisible by 4 */
1118 l2size = (l2size + 3) & ~3;
1120 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK;
1122 /* Define a macro to simplify memory allocation */
1123 #define valloc_pages(var, np) \
1124 alloc_pages((var).pv_va, (np)); \
1125 (var).pv_pa = (var).pv_va + (abp->abp_physaddr - KERNVIRTADDR);
1127 #define alloc_pages(var, np) \
1128 (var) = freemempos; \
1129 freemempos += (np * PAGE_SIZE); \
1130 memset((char *)(var), 0, ((np) * PAGE_SIZE));
1132 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
1133 freemempos += PAGE_SIZE;
1134 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
1136 for (i = 0, j = 0; i < l2size; ++i) {
1137 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
1138 valloc_pages(kernel_pt_table[i],
1139 L2_TABLE_SIZE / PAGE_SIZE);
1142 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va +
1143 L2_TABLE_SIZE_REAL * (i - j);
1144 kernel_pt_table[i].pv_pa =
1145 kernel_pt_table[i].pv_va - KERNVIRTADDR +
1151 * Allocate a page for the system page mapped to 0x00000000
1152 * or 0xffff0000. This page will just contain the system vectors
1153 * and can be shared by all processes.
1155 valloc_pages(systempage, 1);
1157 /* Allocate dynamic per-cpu area. */
1158 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
1159 dpcpu_init((void *)dpcpu.pv_va, 0);
1161 /* Allocate stacks for all modes */
1162 valloc_pages(irqstack, IRQ_STACK_SIZE * MAXCPU);
1163 valloc_pages(abtstack, ABT_STACK_SIZE * MAXCPU);
1164 valloc_pages(undstack, UND_STACK_SIZE * MAXCPU);
1165 valloc_pages(kernelstack, KSTACK_PAGES * MAXCPU);
1166 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
1169 * Now we start construction of the L1 page table
1170 * We start by mapping the L2 page tables into the L1.
1171 * This means that we can replace L1 mappings later on if necessary
1173 l1pagetable = kernel_l1pt.pv_va;
1176 * Try to map as much as possible of kernel text and data using
1177 * 1MB section mapping and for the rest of initial kernel address
1178 * space use L2 coarse tables.
1180 * Link L2 tables for mapping remainder of kernel (modulo 1MB)
1181 * and kernel structures
1183 l2_start = lastaddr & ~(L1_S_OFFSET);
1184 for (i = 0 ; i < l2size - 1; i++)
1185 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE,
1186 &kernel_pt_table[i]);
1188 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE;
1190 /* Map kernel code and data */
1191 pmap_map_chunk(l1pagetable, KERNVIRTADDR, abp->abp_physaddr,
1192 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK,
1193 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
1195 /* Map L1 directory and allocated L2 page tables */
1196 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
1197 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
1199 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va,
1200 kernel_pt_table[0].pv_pa,
1201 L2_TABLE_SIZE_REAL * l2size,
1202 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
1204 /* Map allocated DPCPU, stacks and msgbuf */
1205 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa,
1206 freemempos - dpcpu.pv_va,
1207 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
1209 /* Link and map the vector page */
1210 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH,
1211 &kernel_pt_table[l2size - 1]);
1212 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
1213 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE);
1215 /* Establish static device mappings. */
1216 err_devmap = platform_devmap_init();
1217 arm_devmap_bootstrap(l1pagetable, NULL);
1218 vm_max_kernel_address = platform_lastaddr();
1220 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT);
1221 pmap_pa = kernel_l1pt.pv_pa;
1222 setttb(kernel_l1pt.pv_pa);
1224 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2));
1227 * Now that proper page tables are installed, call cpu_setup() to enable
1228 * instruction and data caches and other chip-specific features.
1233 * Only after the SOC registers block is mapped we can perform device
1234 * tree fixups, as they may attempt to read parameters from hardware.
1236 OF_interpret("perform-fixup", 0);
1238 platform_gpio_init();
1242 debugf("initarm: console initialized\n");
1243 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp);
1244 debugf(" boothowto = 0x%08x\n", boothowto);
1245 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
1248 env = kern_getenv("kernelname");
1250 strlcpy(kernelname, env, sizeof(kernelname));
1254 if (err_devmap != 0)
1255 printf("WARNING: could not fully configure devmap, error=%d\n",
1258 platform_late_init();
1261 * Pages were allocated during the secondary bootstrap for the
1262 * stacks for different CPU modes.
1263 * We must now set the r13 registers in the different CPU modes to
1264 * point to these stacks.
1265 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
1266 * of the stack memory.
1268 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE);
1273 * We must now clean the cache again....
1274 * Cleaning may be done by reading new data to displace any
1275 * dirty data in the cache. This will have happened in setttb()
1276 * but since we are boot strapping the addresses used for the read
1277 * may have just been remapped and thus the cache could be out
1278 * of sync. A re-clean after the switch will cure this.
1279 * After booting there are no gross relocations of the kernel thus
1280 * this problem will not occur after initarm().
1282 cpu_idcache_wbinv_all();
1286 init_proc0(kernelstack.pv_va);
1288 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
1289 pmap_bootstrap(freemempos, &kernel_l1pt);
1290 msgbufp = (void *)msgbufpv.pv_va;
1291 msgbufinit(msgbufp, msgbufsize);
1295 * Exclude the kernel (and all the things we allocated which immediately
1296 * follow the kernel) from the VM allocation pool but not from crash
1297 * dumps. virtual_avail is a global variable which tracks the kva we've
1298 * "allocated" while setting up pmaps.
1300 * Prepare the list of physical memory available to the vm subsystem.
1302 arm_physmem_exclude_region(abp->abp_physaddr,
1303 (virtual_avail - KERNVIRTADDR), EXFLAG_NOALLOC);
1304 arm_physmem_init_kernel_globals();
1306 init_param2(physmem);
1309 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
1310 sizeof(struct pcb)));