1 /* $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $ */
4 * Copyright (c) 2004 Olivier Houchard
5 * Copyright (c) 1994-1998 Mark Brinicombe.
6 * Copyright (c) 1994 Brini.
9 * This code is derived from software written for Brini by Mark Brinicombe
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by Mark Brinicombe
22 * for the NetBSD Project.
23 * 4. The name of the company nor the name of the author may be used to
24 * endorse or promote products derived from this software without specific
25 * prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
28 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
29 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
30 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
31 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
32 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
33 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * Machine dependent functions for kernel setup
42 * Updated : 18/04/01 updated for new wscons
45 #include "opt_compat.h"
47 #include "opt_kstack_pages.h"
48 #include "opt_platform.h"
49 #include "opt_sched.h"
50 #include "opt_timer.h"
52 #include <sys/cdefs.h>
53 __FBSDID("$FreeBSD$");
55 #include <sys/param.h>
60 #include <sys/devmap.h>
62 #include <sys/imgact.h>
64 #include <sys/kernel.h>
65 #include <sys/linker.h>
66 #include <sys/msgbuf.h>
67 #include <sys/rwlock.h>
68 #include <sys/sched.h>
69 #include <sys/syscallsubr.h>
70 #include <sys/sysent.h>
71 #include <sys/sysproto.h>
72 #include <sys/vmmeter.h>
74 #include <vm/vm_object.h>
75 #include <vm/vm_page.h>
76 #include <vm/vm_pager.h>
78 #include <machine/debug_monitor.h>
79 #include <machine/machdep.h>
80 #include <machine/metadata.h>
81 #include <machine/pcb.h>
82 #include <machine/physmem.h>
83 #include <machine/platform.h>
84 #include <machine/sysarch.h>
85 #include <machine/undefined.h>
86 #include <machine/vfp.h>
87 #include <machine/vmparam.h>
90 #include <dev/fdt/fdt_common.h>
91 #include <machine/ofw_machdep.h>
95 #define debugf(fmt, args...) printf(fmt, ##args)
97 #define debugf(fmt, args...)
100 #if defined(COMPAT_FREEBSD4) || defined(COMPAT_FREEBSD5) || \
101 defined(COMPAT_FREEBSD6) || defined(COMPAT_FREEBSD7) || \
102 defined(COMPAT_FREEBSD9)
103 #error FreeBSD/arm doesn't provide compatibility with releases prior to 10
106 #if __ARM_ARCH >= 6 && !defined(INTRNG)
107 #error armv6 requires INTRNG
110 struct pcpu __pcpu[MAXCPU];
111 struct pcpu *pcpup = &__pcpu[0];
113 static struct trapframe proc0_tf;
114 uint32_t cpu_reset_address = 0;
116 vm_offset_t vector_page;
118 int (*_arm_memcpy)(void *, void *, int, int) = NULL;
119 int (*_arm_bzero)(void *, int, int) = NULL;
120 int _min_memcpy_size = 0;
121 int _min_bzero_size = 0;
128 vm_offset_t systempage;
129 vm_offset_t irqstack;
130 vm_offset_t undstack;
131 vm_offset_t abtstack;
134 * This is the number of L2 page tables required for covering max
135 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf,
136 * stacks etc.), uprounded to be divisible by 4.
138 #define KERNEL_PT_MAX 78
139 static struct pv_addr kernel_pt_table[KERNEL_PT_MAX];
140 struct pv_addr systempage;
141 static struct pv_addr msgbufpv;
142 struct pv_addr irqstack;
143 struct pv_addr undstack;
144 struct pv_addr abtstack;
145 static struct pv_addr kernelstack;
146 #endif /* __ARM_ARCH >= 6 */
150 static delay_func *delay_impl;
151 static void *delay_arg;
154 struct kva_md_info kmi;
159 * Initialize the vector page, and select whether or not to
160 * relocate the vectors.
162 * NOTE: We expect the vector page to be mapped at its expected
166 extern unsigned int page0[], page0_data[];
168 arm_vector_init(vm_offset_t va, int which)
170 unsigned int *vectors = (int *) va;
171 unsigned int *vectors_data = vectors + (page0_data - page0);
175 * Loop through the vectors we're taking over, and copy the
176 * vector's insn and data word.
178 for (vec = 0; vec < ARM_NVEC; vec++) {
179 if ((which & (1 << vec)) == 0) {
180 /* Don't want to take over this vector. */
183 vectors[vec] = page0[vec];
184 vectors_data[vec] = page0_data[vec];
187 /* Now sync the vectors. */
188 icache_sync(va, (ARM_NVEC * 2) * sizeof(u_int));
192 if (va == ARM_VECTORS_HIGH) {
194 * Enable high vectors in the system control reg (SCTLR).
196 * Assume the MD caller knows what it's doing here, and really
197 * does want the vector page relocated.
199 * Note: This has to be done here (and not just in
200 * cpu_setup()) because the vector page needs to be
201 * accessible *before* cpu_startup() is called.
204 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC);
210 cpu_startup(void *dummy)
212 struct pcb *pcb = thread0.td_pcb;
213 const unsigned int mbyte = 1024 * 1024;
214 #if __ARM_ARCH < 6 && !defined(ARM_CACHE_LOCK_ENABLE)
220 vm_ksubmap_init(&kmi);
223 * Display the RAM layout.
225 printf("real memory = %ju (%ju MB)\n",
226 (uintmax_t)arm32_ptob(realmem),
227 (uintmax_t)arm32_ptob(realmem) / mbyte);
228 printf("avail memory = %ju (%ju MB)\n",
229 (uintmax_t)arm32_ptob(vm_cnt.v_free_count),
230 (uintmax_t)arm32_ptob(vm_cnt.v_free_count) / mbyte);
232 arm_physmem_print_tables();
233 devmap_print_table();
237 vm_pager_bufferinit();
238 pcb->pcb_regs.sf_sp = (u_int)thread0.td_kstack +
239 USPACE_SVC_STACK_TOP;
240 pmap_set_pcb_pagedir(kernel_pmap, pcb);
242 vector_page_setprot(VM_PROT_READ);
244 #ifdef ARM_CACHE_LOCK_ENABLE
245 pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS);
246 arm_lock_cache_line(ARM_TP_ADDRESS);
248 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO);
249 pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m));
251 *(uint32_t *)ARM_RAS_START = 0;
252 *(uint32_t *)ARM_RAS_END = 0xffffffff;
256 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
259 * Flush the D-cache for non-DMA I/O so that the I-cache can
260 * be made coherent later.
263 cpu_flush_dcache(void *ptr, size_t len)
266 dcache_wb_poc((vm_offset_t)ptr, (vm_paddr_t)vtophys(ptr), len);
269 /* Get current clock frequency for the given cpu id. */
271 cpu_est_clockrate(int cpu_id, uint64_t *rate)
281 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", busy, curcpu);
283 #ifndef NO_EVENTTIMERS
287 if (!sched_runnable())
289 #ifndef NO_EVENTTIMERS
294 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", busy, curcpu);
298 cpu_idle_wakeup(int cpu)
304 #ifdef NO_EVENTTIMERS
306 * Most ARM platforms don't need to do anything special to init their clocks
307 * (they get intialized during normal device attachment), and by not defining a
308 * cpu_initclocks() function they get this generic one. Any platform that needs
309 * to do something special can just provide their own implementation, which will
310 * override this one due to the weak linkage.
313 arm_generic_initclocks(void)
316 __weak_reference(arm_generic_initclocks, cpu_initclocks);
324 if (PCPU_GET(cpuid) == 0)
325 cpu_initclocks_bsp();
329 cpu_initclocks_bsp();
336 arm_set_delay(delay_func *impl, void *arg)
339 KASSERT(impl != NULL, ("No DELAY implementation"));
348 delay_impl(usec, delay_arg);
353 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
364 if (td->td_md.md_spinlock_count == 0) {
365 cspr = disable_interrupts(PSR_I | PSR_F);
366 td->td_md.md_spinlock_count = 1;
367 td->td_md.md_saved_cspr = cspr;
369 td->td_md.md_spinlock_count++;
381 cspr = td->td_md.md_saved_cspr;
382 td->td_md.md_spinlock_count--;
383 if (td->td_md.md_spinlock_count == 0)
384 restore_interrupts(cspr);
388 * Clear registers on exec
391 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
393 struct trapframe *tf = td->td_frame;
395 memset(tf, 0, sizeof(*tf));
396 tf->tf_usr_sp = stack;
397 tf->tf_usr_lr = imgp->entry_addr;
398 tf->tf_svc_lr = 0x77777777;
399 tf->tf_pc = imgp->entry_addr;
400 tf->tf_spsr = PSR_USR32_MODE;
406 * Get machine VFP context.
409 get_vfpcontext(struct thread *td, mcontext_vfp_t *vfp)
413 curpcb = curthread->td_pcb;
416 vfp_store(&curpcb->pcb_vfpstate, false);
417 memcpy(vfp->mcv_reg, curpcb->pcb_vfpstate.reg,
418 sizeof(vfp->mcv_reg));
419 vfp->mcv_fpscr = curpcb->pcb_vfpstate.fpscr;
425 * Set machine VFP context.
428 set_vfpcontext(struct thread *td, mcontext_vfp_t *vfp)
432 curpcb = curthread->td_pcb;
436 memcpy(curpcb->pcb_vfpstate.reg, vfp->mcv_reg,
437 sizeof(curpcb->pcb_vfpstate.reg));
438 curpcb->pcb_vfpstate.fpscr = vfp->mcv_fpscr;
445 * Get machine context.
448 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret)
450 struct trapframe *tf = td->td_frame;
451 __greg_t *gr = mcp->__gregs;
453 if (clear_ret & GET_MC_CLEAR_RET) {
455 gr[_REG_CPSR] = tf->tf_spsr & ~PSR_C;
457 gr[_REG_R0] = tf->tf_r0;
458 gr[_REG_CPSR] = tf->tf_spsr;
460 gr[_REG_R1] = tf->tf_r1;
461 gr[_REG_R2] = tf->tf_r2;
462 gr[_REG_R3] = tf->tf_r3;
463 gr[_REG_R4] = tf->tf_r4;
464 gr[_REG_R5] = tf->tf_r5;
465 gr[_REG_R6] = tf->tf_r6;
466 gr[_REG_R7] = tf->tf_r7;
467 gr[_REG_R8] = tf->tf_r8;
468 gr[_REG_R9] = tf->tf_r9;
469 gr[_REG_R10] = tf->tf_r10;
470 gr[_REG_R11] = tf->tf_r11;
471 gr[_REG_R12] = tf->tf_r12;
472 gr[_REG_SP] = tf->tf_usr_sp;
473 gr[_REG_LR] = tf->tf_usr_lr;
474 gr[_REG_PC] = tf->tf_pc;
476 mcp->mc_vfp_size = 0;
477 mcp->mc_vfp_ptr = NULL;
478 memset(&mcp->mc_spare, 0, sizeof(mcp->mc_spare));
484 * Set machine context.
486 * However, we don't set any but the user modifiable flags, and we won't
487 * touch the cs selector.
490 set_mcontext(struct thread *td, mcontext_t *mcp)
492 mcontext_vfp_t mc_vfp, *vfp;
493 struct trapframe *tf = td->td_frame;
494 const __greg_t *gr = mcp->__gregs;
497 if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_size != sizeof(mc_vfp)) {
498 printf("%s: %s: Malformed mc_vfp_size: %d (0x%08X)\n",
499 td->td_proc->p_comm, __func__,
500 mcp->mc_vfp_size, mcp->mc_vfp_size);
501 } else if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_ptr == NULL) {
502 printf("%s: %s: c_vfp_size != 0 but mc_vfp_ptr == NULL\n",
503 td->td_proc->p_comm, __func__);
507 if (mcp->mc_vfp_size == sizeof(mc_vfp) && mcp->mc_vfp_ptr != NULL) {
508 if (copyin(mcp->mc_vfp_ptr, &mc_vfp, sizeof(mc_vfp)) != 0)
515 tf->tf_r0 = gr[_REG_R0];
516 tf->tf_r1 = gr[_REG_R1];
517 tf->tf_r2 = gr[_REG_R2];
518 tf->tf_r3 = gr[_REG_R3];
519 tf->tf_r4 = gr[_REG_R4];
520 tf->tf_r5 = gr[_REG_R5];
521 tf->tf_r6 = gr[_REG_R6];
522 tf->tf_r7 = gr[_REG_R7];
523 tf->tf_r8 = gr[_REG_R8];
524 tf->tf_r9 = gr[_REG_R9];
525 tf->tf_r10 = gr[_REG_R10];
526 tf->tf_r11 = gr[_REG_R11];
527 tf->tf_r12 = gr[_REG_R12];
528 tf->tf_usr_sp = gr[_REG_SP];
529 tf->tf_usr_lr = gr[_REG_LR];
530 tf->tf_pc = gr[_REG_PC];
531 tf->tf_spsr = gr[_REG_CPSR];
534 set_vfpcontext(td, vfp);
540 sendsig(catcher, ksi, mask)
547 struct trapframe *tf;
548 struct sigframe *fp, frame;
550 struct sysentvec *sysent;
557 PROC_LOCK_ASSERT(p, MA_OWNED);
558 sig = ksi->ksi_signo;
559 code = ksi->ksi_code;
561 mtx_assert(&psp->ps_mtx, MA_OWNED);
563 onstack = sigonstack(tf->tf_usr_sp);
565 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm,
568 /* Allocate and validate space for the signal handler context. */
569 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !(onstack) &&
570 SIGISMEMBER(psp->ps_sigonstack, sig)) {
571 fp = (struct sigframe *)((uintptr_t)td->td_sigstk.ss_sp +
572 td->td_sigstk.ss_size);
573 #if defined(COMPAT_43)
574 td->td_sigstk.ss_flags |= SS_ONSTACK;
577 fp = (struct sigframe *)td->td_frame->tf_usr_sp;
579 /* make room on the stack */
582 /* make the stack aligned */
583 fp = (struct sigframe *)STACKALIGN(fp);
584 /* Populate the siginfo frame. */
585 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0);
587 get_vfpcontext(td, &frame.sf_vfp);
588 frame.sf_uc.uc_mcontext.mc_vfp_size = sizeof(fp->sf_vfp);
589 frame.sf_uc.uc_mcontext.mc_vfp_ptr = &fp->sf_vfp;
591 frame.sf_uc.uc_mcontext.mc_vfp_size = 0;
592 frame.sf_uc.uc_mcontext.mc_vfp_ptr = NULL;
594 frame.sf_si = ksi->ksi_info;
595 frame.sf_uc.uc_sigmask = *mask;
596 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK )
597 ? ((onstack) ? SS_ONSTACK : 0) : SS_DISABLE;
598 frame.sf_uc.uc_stack = td->td_sigstk;
599 mtx_unlock(&psp->ps_mtx);
600 PROC_UNLOCK(td->td_proc);
602 /* Copy the sigframe out to the user's stack. */
603 if (copyout(&frame, fp, sizeof(*fp)) != 0) {
604 /* Process has trashed its stack. Kill it. */
605 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp);
611 * Build context to run handler in. We invoke the handler
612 * directly, only returning via the trampoline. Note the
613 * trampoline version numbers are coordinated with machine-
614 * dependent code in libc.
618 tf->tf_r1 = (register_t)&fp->sf_si;
619 tf->tf_r2 = (register_t)&fp->sf_uc;
621 /* the trampoline uses r5 as the uc address */
622 tf->tf_r5 = (register_t)&fp->sf_uc;
623 tf->tf_pc = (register_t)catcher;
624 tf->tf_usr_sp = (register_t)fp;
625 sysent = p->p_sysent;
626 if (sysent->sv_sigcode_base != 0)
627 tf->tf_usr_lr = (register_t)sysent->sv_sigcode_base;
629 tf->tf_usr_lr = (register_t)(sysent->sv_psstrings -
630 *(sysent->sv_szsigcode));
631 /* Set the mode to enter in the signal handler */
633 if ((register_t)catcher & 1)
634 tf->tf_spsr |= PSR_T;
636 tf->tf_spsr &= ~PSR_T;
639 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr,
643 mtx_lock(&psp->ps_mtx);
647 sys_sigreturn(td, uap)
649 struct sigreturn_args /* {
650 const struct __ucontext *sigcntxp;
658 if (copyin(uap->sigcntxp, &uc, sizeof(uc)))
661 * Make sure the processor mode has not been tampered with and
662 * interrupts have not been disabled.
664 spsr = uc.uc_mcontext.__gregs[_REG_CPSR];
665 if ((spsr & PSR_MODE) != PSR_USR32_MODE ||
666 (spsr & (PSR_I | PSR_F)) != 0)
668 /* Restore register context. */
669 set_mcontext(td, &uc.uc_mcontext);
671 /* Restore signal mask. */
672 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
674 return (EJUSTRETURN);
678 * Construct a PCB from a trapframe. This is called from kdb_trap() where
679 * we want to start a backtrace from the function that caused us to enter
680 * the debugger. We have the context in the trapframe, but base the trace
681 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
682 * enough for a backtrace.
685 makectx(struct trapframe *tf, struct pcb *pcb)
687 pcb->pcb_regs.sf_r4 = tf->tf_r4;
688 pcb->pcb_regs.sf_r5 = tf->tf_r5;
689 pcb->pcb_regs.sf_r6 = tf->tf_r6;
690 pcb->pcb_regs.sf_r7 = tf->tf_r7;
691 pcb->pcb_regs.sf_r8 = tf->tf_r8;
692 pcb->pcb_regs.sf_r9 = tf->tf_r9;
693 pcb->pcb_regs.sf_r10 = tf->tf_r10;
694 pcb->pcb_regs.sf_r11 = tf->tf_r11;
695 pcb->pcb_regs.sf_r12 = tf->tf_r12;
696 pcb->pcb_regs.sf_pc = tf->tf_pc;
697 pcb->pcb_regs.sf_lr = tf->tf_usr_lr;
698 pcb->pcb_regs.sf_sp = tf->tf_usr_sp;
705 set_curthread(&thread0);
707 pcpu_init(pcpup, 0, sizeof(struct pcpu));
708 PCPU_SET(curthread, &thread0);
715 init_proc0(vm_offset_t kstack)
717 proc_linkup0(&proc0, &thread0);
718 thread0.td_kstack = kstack;
719 thread0.td_pcb = (struct pcb *)
720 (thread0.td_kstack + kstack_pages * PAGE_SIZE) - 1;
721 thread0.td_pcb->pcb_flags = 0;
722 thread0.td_pcb->pcb_vfpcpu = -1;
723 thread0.td_pcb->pcb_vfpstate.fpscr = VFPSCR_DN;
724 thread0.td_frame = &proc0_tf;
725 pcpup->pc_curpcb = thread0.td_pcb;
730 set_stackptrs(int cpu)
733 set_stackptr(PSR_IRQ32_MODE,
734 irqstack + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
735 set_stackptr(PSR_ABT32_MODE,
736 abtstack + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
737 set_stackptr(PSR_UND32_MODE,
738 undstack + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
742 set_stackptrs(int cpu)
745 set_stackptr(PSR_IRQ32_MODE,
746 irqstack.pv_va + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
747 set_stackptr(PSR_ABT32_MODE,
748 abtstack.pv_va + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
749 set_stackptr(PSR_UND32_MODE,
750 undstack.pv_va + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
758 initarm(struct arm_boot_params *abp)
760 struct mem_region mem_regions[FDT_MEM_REGIONS];
761 struct pv_addr kernel_l1pt;
762 struct pv_addr dpcpu;
763 vm_offset_t dtbp, freemempos, l2_start, lastaddr;
769 int i, j, err_devmap, mem_regions_sz;
771 lastaddr = parse_boot_param(abp);
772 arm_physmem_kernaddr = abp->abp_physaddr;
780 * Find the dtb passed in by the boot loader.
782 kmdp = preload_search_by_type("elf kernel");
784 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
786 dtbp = (vm_offset_t)NULL;
788 #if defined(FDT_DTB_STATIC)
790 * In case the device tree blob was not retrieved (from metadata) try
791 * to use the statically embedded one.
793 if (dtbp == (vm_offset_t)NULL)
794 dtbp = (vm_offset_t)&fdt_static_dtb;
797 if (OF_install(OFW_FDT, 0) == FALSE)
798 panic("Cannot install FDT");
800 if (OF_init((void *)dtbp) != 0)
801 panic("OF_init failed with the found device tree");
803 /* Grab physical memory regions information from device tree. */
804 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz, &memsize) != 0)
805 panic("Cannot get physical memory regions");
806 arm_physmem_hardware_regions(mem_regions, mem_regions_sz);
808 /* Grab reserved memory regions information from device tree. */
809 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0)
810 arm_physmem_exclude_regions(mem_regions, mem_regions_sz,
811 EXFLAG_NODUMP | EXFLAG_NOALLOC);
813 /* Platform-specific initialisation */
814 platform_probe_and_attach();
818 /* Do basic tuning, hz etc */
821 /* Calculate number of L2 tables needed for mapping vm_page_array */
822 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page);
823 l2size = (l2size >> L1_S_SHIFT) + 1;
826 * Add one table for end of kernel map, one for stacks, msgbuf and
827 * L1 and L2 tables map, one for vectors map and two for
828 * l2 structures from pmap_bootstrap.
832 /* Make it divisible by 4 */
833 l2size = (l2size + 3) & ~3;
835 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK;
837 /* Define a macro to simplify memory allocation */
838 #define valloc_pages(var, np) \
839 alloc_pages((var).pv_va, (np)); \
840 (var).pv_pa = (var).pv_va + (abp->abp_physaddr - KERNVIRTADDR);
842 #define alloc_pages(var, np) \
843 (var) = freemempos; \
844 freemempos += (np * PAGE_SIZE); \
845 memset((char *)(var), 0, ((np) * PAGE_SIZE));
847 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
848 freemempos += PAGE_SIZE;
849 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
851 for (i = 0, j = 0; i < l2size; ++i) {
852 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
853 valloc_pages(kernel_pt_table[i],
854 L2_TABLE_SIZE / PAGE_SIZE);
857 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va +
858 L2_TABLE_SIZE_REAL * (i - j);
859 kernel_pt_table[i].pv_pa =
860 kernel_pt_table[i].pv_va - KERNVIRTADDR +
866 * Allocate a page for the system page mapped to 0x00000000
867 * or 0xffff0000. This page will just contain the system vectors
868 * and can be shared by all processes.
870 valloc_pages(systempage, 1);
872 /* Allocate dynamic per-cpu area. */
873 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
874 dpcpu_init((void *)dpcpu.pv_va, 0);
876 /* Allocate stacks for all modes */
877 valloc_pages(irqstack, IRQ_STACK_SIZE * MAXCPU);
878 valloc_pages(abtstack, ABT_STACK_SIZE * MAXCPU);
879 valloc_pages(undstack, UND_STACK_SIZE * MAXCPU);
880 valloc_pages(kernelstack, kstack_pages * MAXCPU);
881 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
884 * Now we start construction of the L1 page table
885 * We start by mapping the L2 page tables into the L1.
886 * This means that we can replace L1 mappings later on if necessary
888 l1pagetable = kernel_l1pt.pv_va;
891 * Try to map as much as possible of kernel text and data using
892 * 1MB section mapping and for the rest of initial kernel address
893 * space use L2 coarse tables.
895 * Link L2 tables for mapping remainder of kernel (modulo 1MB)
896 * and kernel structures
898 l2_start = lastaddr & ~(L1_S_OFFSET);
899 for (i = 0 ; i < l2size - 1; i++)
900 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE,
901 &kernel_pt_table[i]);
903 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE;
905 /* Map kernel code and data */
906 pmap_map_chunk(l1pagetable, KERNVIRTADDR, abp->abp_physaddr,
907 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK,
908 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
910 /* Map L1 directory and allocated L2 page tables */
911 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
912 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
914 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va,
915 kernel_pt_table[0].pv_pa,
916 L2_TABLE_SIZE_REAL * l2size,
917 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
919 /* Map allocated DPCPU, stacks and msgbuf */
920 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa,
921 freemempos - dpcpu.pv_va,
922 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
924 /* Link and map the vector page */
925 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH,
926 &kernel_pt_table[l2size - 1]);
927 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
928 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE);
930 /* Establish static device mappings. */
931 err_devmap = platform_devmap_init();
932 devmap_bootstrap(l1pagetable, NULL);
933 vm_max_kernel_address = platform_lastaddr();
935 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT);
936 pmap_pa = kernel_l1pt.pv_pa;
937 cpu_setttb(kernel_l1pt.pv_pa);
939 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2));
942 * Now that proper page tables are installed, call cpu_setup() to enable
943 * instruction and data caches and other chip-specific features.
948 * Only after the SOC registers block is mapped we can perform device
949 * tree fixups, as they may attempt to read parameters from hardware.
951 OF_interpret("perform-fixup", 0);
953 platform_gpio_init();
957 debugf("initarm: console initialized\n");
958 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp);
959 debugf(" boothowto = 0x%08x\n", boothowto);
960 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
963 env = kern_getenv("kernelname");
965 strlcpy(kernelname, env, sizeof(kernelname));
970 printf("WARNING: could not fully configure devmap, error=%d\n",
973 platform_late_init();
976 * Pages were allocated during the secondary bootstrap for the
977 * stacks for different CPU modes.
978 * We must now set the r13 registers in the different CPU modes to
979 * point to these stacks.
980 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
981 * of the stack memory.
983 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE);
988 * We must now clean the cache again....
989 * Cleaning may be done by reading new data to displace any
990 * dirty data in the cache. This will have happened in cpu_setttb()
991 * but since we are boot strapping the addresses used for the read
992 * may have just been remapped and thus the cache could be out
993 * of sync. A re-clean after the switch will cure this.
994 * After booting there are no gross relocations of the kernel thus
995 * this problem will not occur after initarm().
997 cpu_idcache_wbinv_all();
1001 init_proc0(kernelstack.pv_va);
1003 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
1004 pmap_bootstrap(freemempos, &kernel_l1pt);
1005 msgbufp = (void *)msgbufpv.pv_va;
1006 msgbufinit(msgbufp, msgbufsize);
1010 * Exclude the kernel (and all the things we allocated which immediately
1011 * follow the kernel) from the VM allocation pool but not from crash
1012 * dumps. virtual_avail is a global variable which tracks the kva we've
1013 * "allocated" while setting up pmaps.
1015 * Prepare the list of physical memory available to the vm subsystem.
1017 arm_physmem_exclude_region(abp->abp_physaddr,
1018 (virtual_avail - KERNVIRTADDR), EXFLAG_NOALLOC);
1019 arm_physmem_init_kernel_globals();
1021 init_param2(physmem);
1025 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
1026 sizeof(struct pcb)));
1028 #else /* __ARM_ARCH < 6 */
1030 initarm(struct arm_boot_params *abp)
1032 struct mem_region mem_regions[FDT_MEM_REGIONS];
1033 vm_paddr_t lastaddr;
1034 vm_offset_t dtbp, kernelstack, dpcpu;
1037 int err_devmap, mem_regions_sz;
1039 struct efi_map_header *efihdr;
1042 /* get last allocated physical address */
1043 arm_physmem_kernaddr = abp->abp_physaddr;
1044 lastaddr = parse_boot_param(abp) - KERNVIRTADDR + arm_physmem_kernaddr;
1050 * Find the dtb passed in by the boot loader.
1052 kmdp = preload_search_by_type("elf kernel");
1053 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
1054 #if defined(FDT_DTB_STATIC)
1056 * In case the device tree blob was not retrieved (from metadata) try
1057 * to use the statically embedded one.
1059 if (dtbp == (vm_offset_t)NULL)
1060 dtbp = (vm_offset_t)&fdt_static_dtb;
1063 if (OF_install(OFW_FDT, 0) == FALSE)
1064 panic("Cannot install FDT");
1066 if (OF_init((void *)dtbp) != 0)
1067 panic("OF_init failed with the found device tree");
1069 #if defined(LINUX_BOOT_ABI)
1070 arm_parse_fdt_bootargs();
1074 efihdr = (struct efi_map_header *)preload_search_info(kmdp,
1075 MODINFO_METADATA | MODINFOMD_EFI_MAP);
1076 if (efihdr != NULL) {
1077 arm_add_efi_map_entries(efihdr, mem_regions, &mem_regions_sz);
1081 /* Grab physical memory regions information from device tree. */
1082 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz,NULL) != 0)
1083 panic("Cannot get physical memory regions");
1085 arm_physmem_hardware_regions(mem_regions, mem_regions_sz);
1087 /* Grab reserved memory regions information from device tree. */
1088 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0)
1089 arm_physmem_exclude_regions(mem_regions, mem_regions_sz,
1090 EXFLAG_NODUMP | EXFLAG_NOALLOC);
1093 * Set TEX remapping registers.
1094 * Setup kernel page tables and switch to kernel L1 page table.
1097 pmap_bootstrap_prepare(lastaddr);
1100 * Now that proper page tables are installed, call cpu_setup() to enable
1101 * instruction and data caches and other chip-specific features.
1105 /* Platform-specific initialisation */
1106 platform_probe_and_attach();
1109 /* Do basic tuning, hz etc */
1113 * Allocate a page for the system page mapped to 0xffff0000
1114 * This page will just contain the system vectors and can be
1115 * shared by all processes.
1117 systempage = pmap_preboot_get_pages(1);
1119 /* Map the vector page. */
1120 pmap_preboot_map_pages(systempage, ARM_VECTORS_HIGH, 1);
1121 if (virtual_end >= ARM_VECTORS_HIGH)
1122 virtual_end = ARM_VECTORS_HIGH - 1;
1124 /* Allocate dynamic per-cpu area. */
1125 dpcpu = pmap_preboot_get_vpages(DPCPU_SIZE / PAGE_SIZE);
1126 dpcpu_init((void *)dpcpu, 0);
1128 /* Allocate stacks for all modes */
1129 irqstack = pmap_preboot_get_vpages(IRQ_STACK_SIZE * MAXCPU);
1130 abtstack = pmap_preboot_get_vpages(ABT_STACK_SIZE * MAXCPU);
1131 undstack = pmap_preboot_get_vpages(UND_STACK_SIZE * MAXCPU );
1132 kernelstack = pmap_preboot_get_vpages(kstack_pages * MAXCPU);
1134 /* Allocate message buffer. */
1135 msgbufp = (void *)pmap_preboot_get_vpages(
1136 round_page(msgbufsize) / PAGE_SIZE);
1139 * Pages were allocated during the secondary bootstrap for the
1140 * stacks for different CPU modes.
1141 * We must now set the r13 registers in the different CPU modes to
1142 * point to these stacks.
1143 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
1144 * of the stack memory.
1149 /* Establish static device mappings. */
1150 err_devmap = platform_devmap_init();
1151 devmap_bootstrap(0, NULL);
1152 vm_max_kernel_address = platform_lastaddr();
1155 * Only after the SOC registers block is mapped we can perform device
1156 * tree fixups, as they may attempt to read parameters from hardware.
1158 OF_interpret("perform-fixup", 0);
1159 platform_gpio_init();
1162 debugf("initarm: console initialized\n");
1163 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp);
1164 debugf(" boothowto = 0x%08x\n", boothowto);
1165 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
1166 debugf(" lastaddr1: 0x%08x\n", lastaddr);
1169 env = kern_getenv("kernelname");
1171 strlcpy(kernelname, env, sizeof(kernelname));
1173 if (err_devmap != 0)
1174 printf("WARNING: could not fully configure devmap, error=%d\n",
1177 platform_late_init();
1180 * We must now clean the cache again....
1181 * Cleaning may be done by reading new data to displace any
1182 * dirty data in the cache. This will have happened in cpu_setttb()
1183 * but since we are boot strapping the addresses used for the read
1184 * may have just been remapped and thus the cache could be out
1185 * of sync. A re-clean after the switch will cure this.
1186 * After booting there are no gross relocations of the kernel thus
1187 * this problem will not occur after initarm().
1189 /* Set stack for exception handlers */
1191 init_proc0(kernelstack);
1192 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
1193 enable_interrupts(PSR_A);
1196 /* Exclude the kernel (and all the things we allocated which immediately
1197 * follow the kernel) from the VM allocation pool but not from crash
1198 * dumps. virtual_avail is a global variable which tracks the kva we've
1199 * "allocated" while setting up pmaps.
1201 * Prepare the list of physical memory available to the vm subsystem.
1203 arm_physmem_exclude_region(abp->abp_physaddr,
1204 pmap_preboot_get_pages(0) - abp->abp_physaddr, EXFLAG_NOALLOC);
1205 arm_physmem_init_kernel_globals();
1207 init_param2(physmem);
1208 /* Init message buffer. */
1209 msgbufinit(msgbufp, msgbufsize);
1212 return ((void *)STACKALIGN(thread0.td_pcb));
1216 #endif /* __ARM_ARCH < 6 */