1 /* $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $ */
4 * Copyright (c) 2004 Olivier Houchard
5 * Copyright (c) 1994-1998 Mark Brinicombe.
6 * Copyright (c) 1994 Brini.
9 * This code is derived from software written for Brini by Mark Brinicombe
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by Mark Brinicombe
22 * for the NetBSD Project.
23 * 4. The name of the company nor the name of the author may be used to
24 * endorse or promote products derived from this software without specific
25 * prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
28 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
29 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
30 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
31 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
32 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
33 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * Machine dependant functions for kernel setup
42 * Updated : 18/04/01 updated for new wscons
45 #include "opt_compat.h"
47 #include "opt_kstack_pages.h"
48 #include "opt_platform.h"
49 #include "opt_sched.h"
50 #include "opt_timer.h"
52 #include <sys/cdefs.h>
53 __FBSDID("$FreeBSD$");
55 #include <sys/param.h>
57 #include <sys/systm.h>
63 #include <sys/ctype.h>
66 #include <sys/imgact.h>
68 #include <sys/kernel.h>
70 #include <sys/linker.h>
72 #include <sys/malloc.h>
73 #include <sys/msgbuf.h>
74 #include <sys/mutex.h>
76 #include <sys/ptrace.h>
77 #include <sys/reboot.h>
79 #include <sys/rwlock.h>
80 #include <sys/sched.h>
81 #include <sys/signalvar.h>
82 #include <sys/syscallsubr.h>
83 #include <sys/sysctl.h>
84 #include <sys/sysent.h>
85 #include <sys/sysproto.h>
91 #include <vm/vm_map.h>
92 #include <vm/vm_object.h>
93 #include <vm/vm_page.h>
94 #include <vm/vm_pager.h>
96 #include <machine/acle-compat.h>
97 #include <machine/armreg.h>
98 #include <machine/atags.h>
99 #include <machine/cpu.h>
100 #include <machine/cpuinfo.h>
101 #include <machine/debug_monitor.h>
102 #include <machine/db_machdep.h>
103 #include <machine/devmap.h>
104 #include <machine/frame.h>
105 #include <machine/intr.h>
106 #include <machine/machdep.h>
107 #include <machine/md_var.h>
108 #include <machine/metadata.h>
109 #include <machine/pcb.h>
110 #include <machine/physmem.h>
111 #include <machine/platform.h>
112 #include <machine/reg.h>
113 #include <machine/trap.h>
114 #include <machine/undefined.h>
115 #include <machine/vfp.h>
116 #include <machine/vmparam.h>
117 #include <machine/sysarch.h>
120 #include <contrib/libfdt/libfdt.h>
121 #include <dev/fdt/fdt_common.h>
122 #include <dev/ofw/openfirm.h>
130 DB_SHOW_COMMAND(cp15, db_show_cp15)
134 reg = cp15_midr_get();
135 db_printf("Cpu ID: 0x%08x\n", reg);
136 reg = cp15_ctr_get();
137 db_printf("Current Cache Lvl ID: 0x%08x\n",reg);
139 reg = cp15_sctlr_get();
140 db_printf("Ctrl: 0x%08x\n",reg);
141 reg = cp15_actlr_get();
142 db_printf("Aux Ctrl: 0x%08x\n",reg);
144 reg = cp15_id_pfr0_get();
145 db_printf("Processor Feat 0: 0x%08x\n", reg);
146 reg = cp15_id_pfr1_get();
147 db_printf("Processor Feat 1: 0x%08x\n", reg);
148 reg = cp15_id_dfr0_get();
149 db_printf("Debug Feat 0: 0x%08x\n", reg);
150 reg = cp15_id_afr0_get();
151 db_printf("Auxiliary Feat 0: 0x%08x\n", reg);
152 reg = cp15_id_mmfr0_get();
153 db_printf("Memory Model Feat 0: 0x%08x\n", reg);
154 reg = cp15_id_mmfr1_get();
155 db_printf("Memory Model Feat 1: 0x%08x\n", reg);
156 reg = cp15_id_mmfr2_get();
157 db_printf("Memory Model Feat 2: 0x%08x\n", reg);
158 reg = cp15_id_mmfr3_get();
159 db_printf("Memory Model Feat 3: 0x%08x\n", reg);
160 reg = cp15_ttbr_get();
161 db_printf("TTB0: 0x%08x\n", reg);
164 DB_SHOW_COMMAND(vtop, db_show_vtop)
169 cp15_ats1cpr_set(addr);
170 reg = cp15_par_get();
171 db_printf("Physical address reg: 0x%08x\n",reg);
173 db_printf("show vtop <virt_addr>\n");
175 #endif /* __ARM_ARCH >= 6 */
179 #define debugf(fmt, args...) printf(fmt, ##args)
181 #define debugf(fmt, args...)
184 #if defined(COMPAT_FREEBSD4) || defined(COMPAT_FREEBSD5) || \
185 defined(COMPAT_FREEBSD6) || defined(COMPAT_FREEBSD7) || \
186 defined(COMPAT_FREEBSD9)
187 #error FreeBSD/arm doesn't provide compatibility with releases prior to 10
190 struct pcpu __pcpu[MAXCPU];
191 struct pcpu *pcpup = &__pcpu[0];
193 static struct trapframe proc0_tf;
194 uint32_t cpu_reset_address = 0;
196 vm_offset_t vector_page;
198 int (*_arm_memcpy)(void *, void *, int, int) = NULL;
199 int (*_arm_bzero)(void *, int, int) = NULL;
200 int _min_memcpy_size = 0;
201 int _min_bzero_size = 0;
206 static char *loader_envp;
211 vm_offset_t systempage;
212 vm_offset_t irqstack;
213 vm_offset_t undstack;
214 vm_offset_t abtstack;
217 * This is the number of L2 page tables required for covering max
218 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf,
219 * stacks etc.), uprounded to be divisible by 4.
221 #define KERNEL_PT_MAX 78
223 static struct pv_addr kernel_pt_table[KERNEL_PT_MAX];
225 struct pv_addr systempage;
226 static struct pv_addr msgbufpv;
227 struct pv_addr irqstack;
228 struct pv_addr undstack;
229 struct pv_addr abtstack;
230 static struct pv_addr kernelstack;
234 #if defined(LINUX_BOOT_ABI)
235 #define LBABI_MAX_BANKS 10
237 #define CMDLINE_GUARD "FreeBSD:"
239 struct arm_lbabi_tag *atag_list;
240 char linux_command_line[LBABI_MAX_COMMAND_LINE + 1];
241 char atags[LBABI_MAX_COMMAND_LINE * 2];
242 uint32_t memstart[LBABI_MAX_BANKS];
243 uint32_t memsize[LBABI_MAX_BANKS];
247 static uint32_t board_revision;
248 /* hex representation of uint64_t */
249 static char board_serial[32];
251 SYSCTL_NODE(_hw, OID_AUTO, board, CTLFLAG_RD, 0, "Board attributes");
252 SYSCTL_UINT(_hw_board, OID_AUTO, revision, CTLFLAG_RD,
253 &board_revision, 0, "Board revision");
254 SYSCTL_STRING(_hw_board, OID_AUTO, serial, CTLFLAG_RD,
255 board_serial, 0, "Board serial");
258 SYSCTL_INT(_hw, HW_FLOATINGPT, floatingpoint, CTLFLAG_RD,
259 &vfp_exists, 0, "Floating point support enabled");
262 board_set_serial(uint64_t serial)
265 snprintf(board_serial, sizeof(board_serial)-1,
270 board_set_revision(uint32_t revision)
273 board_revision = revision;
277 sendsig(catcher, ksi, mask)
284 struct trapframe *tf;
285 struct sigframe *fp, frame;
287 struct sysentvec *sysent;
294 PROC_LOCK_ASSERT(p, MA_OWNED);
295 sig = ksi->ksi_signo;
296 code = ksi->ksi_code;
298 mtx_assert(&psp->ps_mtx, MA_OWNED);
300 onstack = sigonstack(tf->tf_usr_sp);
302 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm,
305 /* Allocate and validate space for the signal handler context. */
306 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !(onstack) &&
307 SIGISMEMBER(psp->ps_sigonstack, sig)) {
308 fp = (struct sigframe *)((uintptr_t)td->td_sigstk.ss_sp +
309 td->td_sigstk.ss_size);
310 #if defined(COMPAT_43)
311 td->td_sigstk.ss_flags |= SS_ONSTACK;
314 fp = (struct sigframe *)td->td_frame->tf_usr_sp;
316 /* make room on the stack */
319 /* make the stack aligned */
320 fp = (struct sigframe *)STACKALIGN(fp);
321 /* Populate the siginfo frame. */
322 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0);
323 frame.sf_si = ksi->ksi_info;
324 frame.sf_uc.uc_sigmask = *mask;
325 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK )
326 ? ((onstack) ? SS_ONSTACK : 0) : SS_DISABLE;
327 frame.sf_uc.uc_stack = td->td_sigstk;
328 mtx_unlock(&psp->ps_mtx);
329 PROC_UNLOCK(td->td_proc);
331 /* Copy the sigframe out to the user's stack. */
332 if (copyout(&frame, fp, sizeof(*fp)) != 0) {
333 /* Process has trashed its stack. Kill it. */
334 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp);
340 * Build context to run handler in. We invoke the handler
341 * directly, only returning via the trampoline. Note the
342 * trampoline version numbers are coordinated with machine-
343 * dependent code in libc.
347 tf->tf_r1 = (register_t)&fp->sf_si;
348 tf->tf_r2 = (register_t)&fp->sf_uc;
350 /* the trampoline uses r5 as the uc address */
351 tf->tf_r5 = (register_t)&fp->sf_uc;
352 tf->tf_pc = (register_t)catcher;
353 tf->tf_usr_sp = (register_t)fp;
354 sysent = p->p_sysent;
355 if (sysent->sv_sigcode_base != 0)
356 tf->tf_usr_lr = (register_t)sysent->sv_sigcode_base;
358 tf->tf_usr_lr = (register_t)(sysent->sv_psstrings -
359 *(sysent->sv_szsigcode));
360 /* Set the mode to enter in the signal handler */
362 if ((register_t)catcher & 1)
363 tf->tf_spsr |= PSR_T;
365 tf->tf_spsr &= ~PSR_T;
368 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr,
372 mtx_lock(&psp->ps_mtx);
375 struct kva_md_info kmi;
380 * Initialize the vector page, and select whether or not to
381 * relocate the vectors.
383 * NOTE: We expect the vector page to be mapped at its expected
387 extern unsigned int page0[], page0_data[];
389 arm_vector_init(vm_offset_t va, int which)
391 unsigned int *vectors = (int *) va;
392 unsigned int *vectors_data = vectors + (page0_data - page0);
396 * Loop through the vectors we're taking over, and copy the
397 * vector's insn and data word.
399 for (vec = 0; vec < ARM_NVEC; vec++) {
400 if ((which & (1 << vec)) == 0) {
401 /* Don't want to take over this vector. */
404 vectors[vec] = page0[vec];
405 vectors_data[vec] = page0_data[vec];
408 /* Now sync the vectors. */
409 icache_sync(va, (ARM_NVEC * 2) * sizeof(u_int));
413 if (va == ARM_VECTORS_HIGH) {
415 * Assume the MD caller knows what it's doing here, and
416 * really does want the vector page relocated.
418 * Note: This has to be done here (and not just in
419 * cpu_setup()) because the vector page needs to be
420 * accessible *before* cpu_startup() is called.
423 * NOTE: If the CPU control register is not readable,
424 * this will totally fail! We'll just assume that
425 * any system that has high vector support has a
426 * readable CPU control register, for now. If we
427 * ever encounter one that does not, we'll have to
430 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC);
435 cpu_startup(void *dummy)
437 struct pcb *pcb = thread0.td_pcb;
438 const unsigned int mbyte = 1024 * 1024;
439 #if __ARM_ARCH < 6 && !defined(ARM_CACHE_LOCK_ENABLE)
445 vm_ksubmap_init(&kmi);
448 * Display the RAM layout.
450 printf("real memory = %ju (%ju MB)\n",
451 (uintmax_t)arm32_ptob(realmem),
452 (uintmax_t)arm32_ptob(realmem) / mbyte);
453 printf("avail memory = %ju (%ju MB)\n",
454 (uintmax_t)arm32_ptob(vm_cnt.v_free_count),
455 (uintmax_t)arm32_ptob(vm_cnt.v_free_count) / mbyte);
457 arm_physmem_print_tables();
458 arm_devmap_print_table();
462 vm_pager_bufferinit();
463 pcb->pcb_regs.sf_sp = (u_int)thread0.td_kstack +
464 USPACE_SVC_STACK_TOP;
465 pmap_set_pcb_pagedir(kernel_pmap, pcb);
467 vector_page_setprot(VM_PROT_READ);
469 #ifdef ARM_CACHE_LOCK_ENABLE
470 pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS);
471 arm_lock_cache_line(ARM_TP_ADDRESS);
473 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO);
474 pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m));
476 *(uint32_t *)ARM_RAS_START = 0;
477 *(uint32_t *)ARM_RAS_END = 0xffffffff;
481 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
484 * Flush the D-cache for non-DMA I/O so that the I-cache can
485 * be made coherent later.
488 cpu_flush_dcache(void *ptr, size_t len)
491 dcache_wb_poc((vm_offset_t)ptr, (vm_paddr_t)vtophys(ptr), len);
494 /* Get current clock frequency for the given cpu id. */
496 cpu_est_clockrate(int cpu_id, uint64_t *rate)
506 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", busy, curcpu);
508 #ifndef NO_EVENTTIMERS
512 if (!sched_runnable())
514 #ifndef NO_EVENTTIMERS
519 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", busy, curcpu);
523 cpu_idle_wakeup(int cpu)
530 * Most ARM platforms don't need to do anything special to init their clocks
531 * (they get intialized during normal device attachment), and by not defining a
532 * cpu_initclocks() function they get this generic one. Any platform that needs
533 * to do something special can just provide their own implementation, which will
534 * override this one due to the weak linkage.
537 arm_generic_initclocks(void)
540 #ifndef NO_EVENTTIMERS
542 if (PCPU_GET(cpuid) == 0)
543 cpu_initclocks_bsp();
547 cpu_initclocks_bsp();
551 __weak_reference(arm_generic_initclocks, cpu_initclocks);
554 fill_regs(struct thread *td, struct reg *regs)
556 struct trapframe *tf = td->td_frame;
557 bcopy(&tf->tf_r0, regs->r, sizeof(regs->r));
558 regs->r_sp = tf->tf_usr_sp;
559 regs->r_lr = tf->tf_usr_lr;
560 regs->r_pc = tf->tf_pc;
561 regs->r_cpsr = tf->tf_spsr;
565 fill_fpregs(struct thread *td, struct fpreg *regs)
567 bzero(regs, sizeof(*regs));
572 set_regs(struct thread *td, struct reg *regs)
574 struct trapframe *tf = td->td_frame;
576 bcopy(regs->r, &tf->tf_r0, sizeof(regs->r));
577 tf->tf_usr_sp = regs->r_sp;
578 tf->tf_usr_lr = regs->r_lr;
579 tf->tf_pc = regs->r_pc;
580 tf->tf_spsr &= ~PSR_FLAGS;
581 tf->tf_spsr |= regs->r_cpsr & PSR_FLAGS;
586 set_fpregs(struct thread *td, struct fpreg *regs)
592 fill_dbregs(struct thread *td, struct dbreg *regs)
597 set_dbregs(struct thread *td, struct dbreg *regs)
604 ptrace_read_int(struct thread *td, vm_offset_t addr, uint32_t *v)
607 if (proc_readmem(td, td->td_proc, addr, v, sizeof(*v)) != sizeof(*v))
613 ptrace_write_int(struct thread *td, vm_offset_t addr, uint32_t v)
616 if (proc_writemem(td, td->td_proc, addr, &v, sizeof(v)) != sizeof(v))
622 ptrace_get_usr_reg(void *cookie, int reg)
625 struct thread *td = cookie;
627 KASSERT(((reg >= 0) && (reg <= ARM_REG_NUM_PC)),
628 ("reg is outside range"));
632 ret = td->td_frame->tf_pc;
635 ret = td->td_frame->tf_usr_lr;
638 ret = td->td_frame->tf_usr_sp;
641 ret = *((register_t*)&td->td_frame->tf_r0 + reg);
649 ptrace_get_usr_int(void* cookie, vm_offset_t offset, u_int* val)
651 struct thread *td = cookie;
654 error = ptrace_read_int(td, offset, val);
660 * This function parses current instruction opcode and decodes
661 * any possible jump (change in PC) which might occur after
662 * the instruction is executed.
664 * @param td Thread structure of analysed task
665 * @param cur_instr Currently executed instruction
666 * @param alt_next_address Pointer to the variable where
667 * the destination address of the
668 * jump instruction shall be stored.
670 * @return <0> when jump is possible
674 ptrace_get_alternative_next(struct thread *td, uint32_t cur_instr,
675 uint32_t *alt_next_address)
679 if (inst_branch(cur_instr) || inst_call(cur_instr) ||
680 inst_return(cur_instr)) {
681 error = arm_predict_branch(td, cur_instr, td->td_frame->tf_pc,
682 alt_next_address, ptrace_get_usr_reg, ptrace_get_usr_int);
691 ptrace_single_step(struct thread *td)
694 int error, error_alt;
695 uint32_t cur_instr, alt_next = 0;
697 /* TODO: This needs to be updated for Thumb-2 */
698 if ((td->td_frame->tf_spsr & PSR_T) != 0)
701 KASSERT(td->td_md.md_ptrace_instr == 0,
702 ("Didn't clear single step"));
703 KASSERT(td->td_md.md_ptrace_instr_alt == 0,
704 ("Didn't clear alternative single step"));
708 error = ptrace_read_int(td, td->td_frame->tf_pc,
713 error = ptrace_read_int(td, td->td_frame->tf_pc + INSN_SIZE,
714 &td->td_md.md_ptrace_instr);
716 error = ptrace_write_int(td, td->td_frame->tf_pc + INSN_SIZE,
719 td->td_md.md_ptrace_instr = 0;
721 td->td_md.md_ptrace_addr = td->td_frame->tf_pc +
726 error_alt = ptrace_get_alternative_next(td, cur_instr, &alt_next);
727 if (error_alt == 0) {
728 error_alt = ptrace_read_int(td, alt_next,
729 &td->td_md.md_ptrace_instr_alt);
731 td->td_md.md_ptrace_instr_alt = 0;
733 error_alt = ptrace_write_int(td, alt_next,
736 td->td_md.md_ptrace_instr_alt = 0;
738 td->td_md.md_ptrace_addr_alt = alt_next;
744 return ((error != 0) && (error_alt != 0));
748 ptrace_clear_single_step(struct thread *td)
752 /* TODO: This needs to be updated for Thumb-2 */
753 if ((td->td_frame->tf_spsr & PSR_T) != 0)
756 if (td->td_md.md_ptrace_instr != 0) {
759 ptrace_write_int(td, td->td_md.md_ptrace_addr,
760 td->td_md.md_ptrace_instr);
762 td->td_md.md_ptrace_instr = 0;
765 if (td->td_md.md_ptrace_instr_alt != 0) {
768 ptrace_write_int(td, td->td_md.md_ptrace_addr_alt,
769 td->td_md.md_ptrace_instr_alt);
771 td->td_md.md_ptrace_instr_alt = 0;
778 ptrace_set_pc(struct thread *td, unsigned long addr)
780 td->td_frame->tf_pc = addr;
785 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
796 if (td->td_md.md_spinlock_count == 0) {
797 cspr = disable_interrupts(PSR_I | PSR_F);
798 td->td_md.md_spinlock_count = 1;
799 td->td_md.md_saved_cspr = cspr;
801 td->td_md.md_spinlock_count++;
813 cspr = td->td_md.md_saved_cspr;
814 td->td_md.md_spinlock_count--;
815 if (td->td_md.md_spinlock_count == 0)
816 restore_interrupts(cspr);
820 * Clear registers on exec
823 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
825 struct trapframe *tf = td->td_frame;
827 memset(tf, 0, sizeof(*tf));
828 tf->tf_usr_sp = stack;
829 tf->tf_usr_lr = imgp->entry_addr;
830 tf->tf_svc_lr = 0x77777777;
831 tf->tf_pc = imgp->entry_addr;
832 tf->tf_spsr = PSR_USR32_MODE;
836 * Get machine context.
839 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret)
841 struct trapframe *tf = td->td_frame;
842 __greg_t *gr = mcp->__gregs;
844 if (clear_ret & GET_MC_CLEAR_RET) {
846 gr[_REG_CPSR] = tf->tf_spsr & ~PSR_C;
848 gr[_REG_R0] = tf->tf_r0;
849 gr[_REG_CPSR] = tf->tf_spsr;
851 gr[_REG_R1] = tf->tf_r1;
852 gr[_REG_R2] = tf->tf_r2;
853 gr[_REG_R3] = tf->tf_r3;
854 gr[_REG_R4] = tf->tf_r4;
855 gr[_REG_R5] = tf->tf_r5;
856 gr[_REG_R6] = tf->tf_r6;
857 gr[_REG_R7] = tf->tf_r7;
858 gr[_REG_R8] = tf->tf_r8;
859 gr[_REG_R9] = tf->tf_r9;
860 gr[_REG_R10] = tf->tf_r10;
861 gr[_REG_R11] = tf->tf_r11;
862 gr[_REG_R12] = tf->tf_r12;
863 gr[_REG_SP] = tf->tf_usr_sp;
864 gr[_REG_LR] = tf->tf_usr_lr;
865 gr[_REG_PC] = tf->tf_pc;
871 * Set machine context.
873 * However, we don't set any but the user modifiable flags, and we won't
874 * touch the cs selector.
877 set_mcontext(struct thread *td, mcontext_t *mcp)
879 struct trapframe *tf = td->td_frame;
880 const __greg_t *gr = mcp->__gregs;
882 tf->tf_r0 = gr[_REG_R0];
883 tf->tf_r1 = gr[_REG_R1];
884 tf->tf_r2 = gr[_REG_R2];
885 tf->tf_r3 = gr[_REG_R3];
886 tf->tf_r4 = gr[_REG_R4];
887 tf->tf_r5 = gr[_REG_R5];
888 tf->tf_r6 = gr[_REG_R6];
889 tf->tf_r7 = gr[_REG_R7];
890 tf->tf_r8 = gr[_REG_R8];
891 tf->tf_r9 = gr[_REG_R9];
892 tf->tf_r10 = gr[_REG_R10];
893 tf->tf_r11 = gr[_REG_R11];
894 tf->tf_r12 = gr[_REG_R12];
895 tf->tf_usr_sp = gr[_REG_SP];
896 tf->tf_usr_lr = gr[_REG_LR];
897 tf->tf_pc = gr[_REG_PC];
898 tf->tf_spsr = gr[_REG_CPSR];
907 sys_sigreturn(td, uap)
909 struct sigreturn_args /* {
910 const struct __ucontext *sigcntxp;
918 if (copyin(uap->sigcntxp, &uc, sizeof(uc)))
921 * Make sure the processor mode has not been tampered with and
922 * interrupts have not been disabled.
924 spsr = uc.uc_mcontext.__gregs[_REG_CPSR];
925 if ((spsr & PSR_MODE) != PSR_USR32_MODE ||
926 (spsr & (PSR_I | PSR_F)) != 0)
928 /* Restore register context. */
929 set_mcontext(td, &uc.uc_mcontext);
931 /* Restore signal mask. */
932 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
934 return (EJUSTRETURN);
939 * Construct a PCB from a trapframe. This is called from kdb_trap() where
940 * we want to start a backtrace from the function that caused us to enter
941 * the debugger. We have the context in the trapframe, but base the trace
942 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
943 * enough for a backtrace.
946 makectx(struct trapframe *tf, struct pcb *pcb)
948 pcb->pcb_regs.sf_r4 = tf->tf_r4;
949 pcb->pcb_regs.sf_r5 = tf->tf_r5;
950 pcb->pcb_regs.sf_r6 = tf->tf_r6;
951 pcb->pcb_regs.sf_r7 = tf->tf_r7;
952 pcb->pcb_regs.sf_r8 = tf->tf_r8;
953 pcb->pcb_regs.sf_r9 = tf->tf_r9;
954 pcb->pcb_regs.sf_r10 = tf->tf_r10;
955 pcb->pcb_regs.sf_r11 = tf->tf_r11;
956 pcb->pcb_regs.sf_r12 = tf->tf_r12;
957 pcb->pcb_regs.sf_pc = tf->tf_pc;
958 pcb->pcb_regs.sf_lr = tf->tf_usr_lr;
959 pcb->pcb_regs.sf_sp = tf->tf_usr_sp;
963 * Fake up a boot descriptor table
966 fake_preload_metadata(struct arm_boot_params *abp __unused, void *dtb_ptr,
970 vm_offset_t zstart = 0, zend = 0;
972 vm_offset_t lastaddr;
974 static uint32_t fake_preload[35];
976 fake_preload[i++] = MODINFO_NAME;
977 fake_preload[i++] = strlen("kernel") + 1;
978 strcpy((char*)&fake_preload[i++], "kernel");
980 fake_preload[i++] = MODINFO_TYPE;
981 fake_preload[i++] = strlen("elf kernel") + 1;
982 strcpy((char*)&fake_preload[i++], "elf kernel");
984 fake_preload[i++] = MODINFO_ADDR;
985 fake_preload[i++] = sizeof(vm_offset_t);
986 fake_preload[i++] = KERNVIRTADDR;
987 fake_preload[i++] = MODINFO_SIZE;
988 fake_preload[i++] = sizeof(uint32_t);
989 fake_preload[i++] = (uint32_t)&end - KERNVIRTADDR;
991 if (*(uint32_t *)KERNVIRTADDR == MAGIC_TRAMP_NUMBER) {
992 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_SSYM;
993 fake_preload[i++] = sizeof(vm_offset_t);
994 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 4);
995 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_ESYM;
996 fake_preload[i++] = sizeof(vm_offset_t);
997 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 8);
998 lastaddr = *(uint32_t *)(KERNVIRTADDR + 8);
1000 zstart = *(uint32_t *)(KERNVIRTADDR + 4);
1001 db_fetch_ksymtab(zstart, zend);
1004 lastaddr = (vm_offset_t)&end;
1005 if (dtb_ptr != NULL) {
1006 /* Copy DTB to KVA space and insert it into module chain. */
1007 lastaddr = roundup(lastaddr, sizeof(int));
1008 fake_preload[i++] = MODINFO_METADATA | MODINFOMD_DTBP;
1009 fake_preload[i++] = sizeof(uint32_t);
1010 fake_preload[i++] = (uint32_t)lastaddr;
1011 memmove((void *)lastaddr, dtb_ptr, dtb_size);
1012 lastaddr += dtb_size;
1013 lastaddr = roundup(lastaddr, sizeof(int));
1015 fake_preload[i++] = 0;
1016 fake_preload[i] = 0;
1017 preload_metadata = (void *)fake_preload;
1019 init_static_kenv(NULL, 0);
1028 set_curthread(&thread0);
1030 pcpu_init(pcpup, 0, sizeof(struct pcpu));
1031 PCPU_SET(curthread, &thread0);
1034 #if defined(LINUX_BOOT_ABI)
1036 /* Convert the U-Boot command line into FreeBSD kenv and boot options. */
1038 cmdline_set_env(char *cmdline, const char *guard)
1040 char *cmdline_next, *env;
1041 size_t size, guard_len;
1044 size = strlen(cmdline);
1045 /* Skip leading spaces. */
1046 for (; isspace(*cmdline) && (size > 0); cmdline++)
1049 /* Test and remove guard. */
1050 if (guard != NULL && guard[0] != '\0') {
1051 guard_len = strlen(guard);
1052 if (strncasecmp(cmdline, guard, guard_len) != 0)
1054 cmdline += guard_len;
1058 /* Skip leading spaces. */
1059 for (; isspace(*cmdline) && (size > 0); cmdline++)
1062 /* Replace ',' with '\0'. */
1063 /* TODO: implement escaping for ',' character. */
1064 cmdline_next = cmdline;
1065 while(strsep(&cmdline_next, ",") != NULL)
1067 init_static_kenv(cmdline, 0);
1068 /* Parse boothowto. */
1069 for (i = 0; howto_names[i].ev != NULL; i++) {
1070 env = kern_getenv(howto_names[i].ev);
1072 if (strtoul(env, NULL, 10) != 0)
1073 boothowto |= howto_names[i].mask;
1080 linux_parse_boot_param(struct arm_boot_params *abp)
1082 struct arm_lbabi_tag *walker;
1086 vm_offset_t lastaddr;
1088 struct fdt_header *dtb_ptr;
1093 * Linux boot ABI: r0 = 0, r1 is the board type (!= 0) and r2
1094 * is atags or dtb pointer. If all of these aren't satisfied,
1095 * then punt. Unfortunately, it looks like DT enabled kernels
1096 * doesn't uses board type and U-Boot delivers 0 in r1 for them.
1098 if (abp->abp_r0 != 0 || abp->abp_r2 == 0)
1101 /* Test if r2 point to valid DTB. */
1102 dtb_ptr = (struct fdt_header *)abp->abp_r2;
1103 if (fdt_check_header(dtb_ptr) == 0) {
1104 dtb_size = fdt_totalsize(dtb_ptr);
1105 return (fake_preload_metadata(abp, dtb_ptr, dtb_size));
1109 board_id = abp->abp_r1;
1110 walker = (struct arm_lbabi_tag *)abp->abp_r2;
1112 if (ATAG_TAG(walker) != ATAG_CORE)
1116 while (ATAG_TAG(walker) != ATAG_NONE) {
1117 switch (ATAG_TAG(walker)) {
1121 arm_physmem_hardware_region(walker->u.tag_mem.start,
1122 walker->u.tag_mem.size);
1127 serial = walker->u.tag_sn.high;
1129 serial |= walker->u.tag_sn.low;
1130 board_set_serial(serial);
1133 revision = walker->u.tag_rev.rev;
1134 board_set_revision(revision);
1137 size = ATAG_SIZE(walker) -
1138 sizeof(struct arm_lbabi_header);
1139 size = min(size, LBABI_MAX_COMMAND_LINE);
1140 strncpy(linux_command_line, walker->u.tag_cmd.command,
1142 linux_command_line[size] = '\0';
1147 walker = ATAG_NEXT(walker);
1150 /* Save a copy for later */
1151 bcopy(atag_list, atags,
1152 (char *)walker - (char *)atag_list + ATAG_SIZE(walker));
1154 lastaddr = fake_preload_metadata(abp, NULL, 0);
1155 cmdline_set_env(linux_command_line, CMDLINE_GUARD);
1160 #if defined(FREEBSD_BOOT_LOADER)
1162 freebsd_parse_boot_param(struct arm_boot_params *abp)
1164 vm_offset_t lastaddr = 0;
1168 vm_offset_t ksym_start;
1169 vm_offset_t ksym_end;
1173 * Mask metadata pointer: it is supposed to be on page boundary. If
1174 * the first argument (mdp) doesn't point to a valid address the
1175 * bootloader must have passed us something else than the metadata
1176 * ptr, so we give up. Also give up if we cannot find metadta section
1177 * the loader creates that we get all this data out of.
1180 if ((mdp = (void *)(abp->abp_r0 & ~PAGE_MASK)) == NULL)
1182 preload_metadata = mdp;
1183 kmdp = preload_search_by_type("elf kernel");
1187 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1188 loader_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *);
1189 init_static_kenv(loader_envp, 0);
1190 lastaddr = MD_FETCH(kmdp, MODINFOMD_KERNEND, vm_offset_t);
1192 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1193 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1194 db_fetch_ksymtab(ksym_start, ksym_end);
1201 default_parse_boot_param(struct arm_boot_params *abp)
1203 vm_offset_t lastaddr;
1205 #if defined(LINUX_BOOT_ABI)
1206 if ((lastaddr = linux_parse_boot_param(abp)) != 0)
1209 #if defined(FREEBSD_BOOT_LOADER)
1210 if ((lastaddr = freebsd_parse_boot_param(abp)) != 0)
1213 /* Fall back to hardcoded metadata. */
1214 lastaddr = fake_preload_metadata(abp, NULL, 0);
1220 * Stub version of the boot parameter parsing routine. We are
1221 * called early in initarm, before even VM has been initialized.
1222 * This routine needs to preserve any data that the boot loader
1223 * has passed in before the kernel starts to grow past the end
1224 * of the BSS, traditionally the place boot-loaders put this data.
1226 * Since this is called so early, things that depend on the vm system
1227 * being setup (including access to some SoC's serial ports), about
1228 * all that can be done in this routine is to copy the arguments.
1230 * This is the default boot parameter parsing routine. Individual
1231 * kernels/boards can override this weak function with one of their
1232 * own. We just fake metadata...
1234 __weak_reference(default_parse_boot_param, parse_boot_param);
1240 init_proc0(vm_offset_t kstack)
1242 proc_linkup0(&proc0, &thread0);
1243 thread0.td_kstack = kstack;
1244 thread0.td_pcb = (struct pcb *)
1245 (thread0.td_kstack + kstack_pages * PAGE_SIZE) - 1;
1246 thread0.td_pcb->pcb_flags = 0;
1247 thread0.td_pcb->pcb_vfpcpu = -1;
1248 thread0.td_pcb->pcb_vfpstate.fpscr = VFPSCR_DN;
1249 thread0.td_frame = &proc0_tf;
1250 pcpup->pc_curpcb = thread0.td_pcb;
1254 arm_predict_branch(void *cookie, u_int insn, register_t pc, register_t *new_pc,
1255 u_int (*fetch_reg)(void*, int), u_int (*read_int)(void*, vm_offset_t, u_int*))
1257 u_int addr, nregs, offset = 0;
1260 switch ((insn >> 24) & 0xf) {
1261 case 0x2: /* add pc, reg1, #value */
1262 case 0x0: /* add pc, reg1, reg2, lsl #offset */
1263 addr = fetch_reg(cookie, (insn >> 16) & 0xf);
1264 if (((insn >> 16) & 0xf) == 15)
1266 if (insn & 0x0200000) {
1267 offset = (insn >> 7) & 0x1e;
1268 offset = (insn & 0xff) << (32 - offset) |
1269 (insn & 0xff) >> offset;
1272 offset = fetch_reg(cookie, insn & 0x0f);
1273 if ((insn & 0x0000ff0) != 0x00000000) {
1275 nregs = fetch_reg(cookie,
1278 nregs = (insn >> 7) & 0x1f;
1279 switch ((insn >> 5) & 3) {
1282 offset = offset << nregs;
1286 offset = offset >> nregs;
1293 *new_pc = addr + offset;
1298 case 0xa: /* b ... */
1299 case 0xb: /* bl ... */
1300 addr = ((insn << 2) & 0x03ffffff);
1301 if (addr & 0x02000000)
1303 *new_pc = (pc + 8 + addr);
1305 case 0x7: /* ldr pc, [pc, reg, lsl #2] */
1306 addr = fetch_reg(cookie, insn & 0xf);
1307 addr = pc + 8 + (addr << 2);
1308 error = read_int(cookie, addr, &addr);
1311 case 0x1: /* mov pc, reg */
1312 *new_pc = fetch_reg(cookie, insn & 0xf);
1315 case 0x5: /* ldr pc, [reg] */
1316 addr = fetch_reg(cookie, (insn >> 16) & 0xf);
1317 /* ldr pc, [reg, #offset] */
1318 if (insn & (1 << 24))
1319 offset = insn & 0xfff;
1320 if (insn & 0x00800000)
1324 error = read_int(cookie, addr, &addr);
1328 case 0x8: /* ldmxx reg, {..., pc} */
1330 addr = fetch_reg(cookie, (insn >> 16) & 0xf);
1331 nregs = (insn & 0x5555) + ((insn >> 1) & 0x5555);
1332 nregs = (nregs & 0x3333) + ((nregs >> 2) & 0x3333);
1333 nregs = (nregs + (nregs >> 4)) & 0x0f0f;
1334 nregs = (nregs + (nregs >> 8)) & 0x001f;
1335 switch ((insn >> 23) & 0x3) {
1336 case 0x0: /* ldmda */
1339 case 0x1: /* ldmia */
1340 addr = addr + 0 + ((nregs - 1) << 2);
1342 case 0x2: /* ldmdb */
1345 case 0x3: /* ldmib */
1346 addr = addr + 4 + ((nregs - 1) << 2);
1349 error = read_int(cookie, addr, &addr);
1360 set_stackptrs(int cpu)
1363 set_stackptr(PSR_IRQ32_MODE,
1364 irqstack + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1365 set_stackptr(PSR_ABT32_MODE,
1366 abtstack + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1367 set_stackptr(PSR_UND32_MODE,
1368 undstack + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1372 set_stackptrs(int cpu)
1375 set_stackptr(PSR_IRQ32_MODE,
1376 irqstack.pv_va + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1377 set_stackptr(PSR_ABT32_MODE,
1378 abtstack.pv_va + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1379 set_stackptr(PSR_UND32_MODE,
1380 undstack.pv_va + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1385 #define efi_next_descriptor(ptr, size) \
1386 ((struct efi_md *)(((uint8_t *) ptr) + size))
1389 add_efi_map_entries(struct efi_map_header *efihdr, struct mem_region *mr,
1392 struct efi_md *map, *p;
1394 size_t efisz, memory_size;
1397 static const char *types[] = {
1403 "RuntimeServicesCode",
1404 "RuntimeServicesData",
1405 "ConventionalMemory",
1407 "ACPIReclaimMemory",
1410 "MemoryMappedIOPortSpace",
1417 * Memory map data provided by UEFI via the GetMemoryMap
1418 * Boot Services API.
1420 efisz = roundup2(sizeof(struct efi_map_header), 0x10);
1421 map = (struct efi_md *)((uint8_t *)efihdr + efisz);
1423 if (efihdr->descriptor_size == 0)
1425 ndesc = efihdr->memory_size / efihdr->descriptor_size;
1427 if (boothowto & RB_VERBOSE)
1428 printf("%23s %12s %12s %8s %4s\n",
1429 "Type", "Physical", "Virtual", "#Pages", "Attr");
1432 for (i = 0, j = 0, p = map; i < ndesc; i++,
1433 p = efi_next_descriptor(p, efihdr->descriptor_size)) {
1434 if (boothowto & RB_VERBOSE) {
1435 if (p->md_type <= EFI_MD_TYPE_PALCODE)
1436 type = types[p->md_type];
1439 printf("%23s %012llx %12p %08llx ", type, p->md_phys,
1440 p->md_virt, p->md_pages);
1441 if (p->md_attr & EFI_MD_ATTR_UC)
1443 if (p->md_attr & EFI_MD_ATTR_WC)
1445 if (p->md_attr & EFI_MD_ATTR_WT)
1447 if (p->md_attr & EFI_MD_ATTR_WB)
1449 if (p->md_attr & EFI_MD_ATTR_UCE)
1451 if (p->md_attr & EFI_MD_ATTR_WP)
1453 if (p->md_attr & EFI_MD_ATTR_RP)
1455 if (p->md_attr & EFI_MD_ATTR_XP)
1457 if (p->md_attr & EFI_MD_ATTR_RT)
1462 switch (p->md_type) {
1463 case EFI_MD_TYPE_CODE:
1464 case EFI_MD_TYPE_DATA:
1465 case EFI_MD_TYPE_BS_CODE:
1466 case EFI_MD_TYPE_BS_DATA:
1467 case EFI_MD_TYPE_FREE:
1469 * We're allowed to use any entry with these types.
1477 if (j >= FDT_MEM_REGIONS)
1480 mr[j].mr_start = p->md_phys;
1481 mr[j].mr_size = p->md_pages * PAGE_SIZE;
1482 memory_size += mr[j].mr_size;
1509 debugf("loader passed (static) kenv:\n");
1510 if (loader_envp == NULL) {
1511 debugf(" no env, null ptr\n");
1514 debugf(" loader_envp = 0x%08x\n", (uint32_t)loader_envp);
1516 for (cp = loader_envp; cp != NULL; cp = kenv_next(cp))
1517 debugf(" %x %s\n", (uint32_t)cp, cp);
1522 initarm(struct arm_boot_params *abp)
1524 struct mem_region mem_regions[FDT_MEM_REGIONS];
1525 struct pv_addr kernel_l1pt;
1526 struct pv_addr dpcpu;
1527 vm_offset_t dtbp, freemempos, l2_start, lastaddr;
1533 int i, j, err_devmap, mem_regions_sz;
1535 lastaddr = parse_boot_param(abp);
1536 arm_physmem_kernaddr = abp->abp_physaddr;
1544 * Find the dtb passed in by the boot loader.
1546 kmdp = preload_search_by_type("elf kernel");
1548 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
1550 dtbp = (vm_offset_t)NULL;
1552 #if defined(FDT_DTB_STATIC)
1554 * In case the device tree blob was not retrieved (from metadata) try
1555 * to use the statically embedded one.
1557 if (dtbp == (vm_offset_t)NULL)
1558 dtbp = (vm_offset_t)&fdt_static_dtb;
1561 if (OF_install(OFW_FDT, 0) == FALSE)
1562 panic("Cannot install FDT");
1564 if (OF_init((void *)dtbp) != 0)
1565 panic("OF_init failed with the found device tree");
1567 /* Grab physical memory regions information from device tree. */
1568 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz, &memsize) != 0)
1569 panic("Cannot get physical memory regions");
1570 arm_physmem_hardware_regions(mem_regions, mem_regions_sz);
1572 /* Grab reserved memory regions information from device tree. */
1573 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0)
1574 arm_physmem_exclude_regions(mem_regions, mem_regions_sz,
1575 EXFLAG_NODUMP | EXFLAG_NOALLOC);
1577 /* Platform-specific initialisation */
1578 platform_probe_and_attach();
1582 /* Do basic tuning, hz etc */
1585 /* Calculate number of L2 tables needed for mapping vm_page_array */
1586 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page);
1587 l2size = (l2size >> L1_S_SHIFT) + 1;
1590 * Add one table for end of kernel map, one for stacks, msgbuf and
1591 * L1 and L2 tables map and one for vectors map.
1595 /* Make it divisible by 4 */
1596 l2size = (l2size + 3) & ~3;
1598 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK;
1600 /* Define a macro to simplify memory allocation */
1601 #define valloc_pages(var, np) \
1602 alloc_pages((var).pv_va, (np)); \
1603 (var).pv_pa = (var).pv_va + (abp->abp_physaddr - KERNVIRTADDR);
1605 #define alloc_pages(var, np) \
1606 (var) = freemempos; \
1607 freemempos += (np * PAGE_SIZE); \
1608 memset((char *)(var), 0, ((np) * PAGE_SIZE));
1610 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
1611 freemempos += PAGE_SIZE;
1612 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
1614 for (i = 0, j = 0; i < l2size; ++i) {
1615 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
1616 valloc_pages(kernel_pt_table[i],
1617 L2_TABLE_SIZE / PAGE_SIZE);
1620 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va +
1621 L2_TABLE_SIZE_REAL * (i - j);
1622 kernel_pt_table[i].pv_pa =
1623 kernel_pt_table[i].pv_va - KERNVIRTADDR +
1629 * Allocate a page for the system page mapped to 0x00000000
1630 * or 0xffff0000. This page will just contain the system vectors
1631 * and can be shared by all processes.
1633 valloc_pages(systempage, 1);
1635 /* Allocate dynamic per-cpu area. */
1636 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
1637 dpcpu_init((void *)dpcpu.pv_va, 0);
1639 /* Allocate stacks for all modes */
1640 valloc_pages(irqstack, IRQ_STACK_SIZE * MAXCPU);
1641 valloc_pages(abtstack, ABT_STACK_SIZE * MAXCPU);
1642 valloc_pages(undstack, UND_STACK_SIZE * MAXCPU);
1643 valloc_pages(kernelstack, kstack_pages * MAXCPU);
1644 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
1647 * Now we start construction of the L1 page table
1648 * We start by mapping the L2 page tables into the L1.
1649 * This means that we can replace L1 mappings later on if necessary
1651 l1pagetable = kernel_l1pt.pv_va;
1654 * Try to map as much as possible of kernel text and data using
1655 * 1MB section mapping and for the rest of initial kernel address
1656 * space use L2 coarse tables.
1658 * Link L2 tables for mapping remainder of kernel (modulo 1MB)
1659 * and kernel structures
1661 l2_start = lastaddr & ~(L1_S_OFFSET);
1662 for (i = 0 ; i < l2size - 1; i++)
1663 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE,
1664 &kernel_pt_table[i]);
1666 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE;
1668 /* Map kernel code and data */
1669 pmap_map_chunk(l1pagetable, KERNVIRTADDR, abp->abp_physaddr,
1670 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK,
1671 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
1673 /* Map L1 directory and allocated L2 page tables */
1674 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
1675 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
1677 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va,
1678 kernel_pt_table[0].pv_pa,
1679 L2_TABLE_SIZE_REAL * l2size,
1680 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
1682 /* Map allocated DPCPU, stacks and msgbuf */
1683 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa,
1684 freemempos - dpcpu.pv_va,
1685 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
1687 /* Link and map the vector page */
1688 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH,
1689 &kernel_pt_table[l2size - 1]);
1690 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
1691 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE);
1693 /* Establish static device mappings. */
1694 err_devmap = platform_devmap_init();
1695 arm_devmap_bootstrap(l1pagetable, NULL);
1696 vm_max_kernel_address = platform_lastaddr();
1698 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT);
1699 pmap_pa = kernel_l1pt.pv_pa;
1700 cpu_setttb(kernel_l1pt.pv_pa);
1702 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2));
1705 * Now that proper page tables are installed, call cpu_setup() to enable
1706 * instruction and data caches and other chip-specific features.
1711 * Only after the SOC registers block is mapped we can perform device
1712 * tree fixups, as they may attempt to read parameters from hardware.
1714 OF_interpret("perform-fixup", 0);
1716 platform_gpio_init();
1720 debugf("initarm: console initialized\n");
1721 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp);
1722 debugf(" boothowto = 0x%08x\n", boothowto);
1723 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
1726 env = kern_getenv("kernelname");
1728 strlcpy(kernelname, env, sizeof(kernelname));
1732 if (err_devmap != 0)
1733 printf("WARNING: could not fully configure devmap, error=%d\n",
1736 platform_late_init();
1739 * Pages were allocated during the secondary bootstrap for the
1740 * stacks for different CPU modes.
1741 * We must now set the r13 registers in the different CPU modes to
1742 * point to these stacks.
1743 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
1744 * of the stack memory.
1746 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE);
1751 * We must now clean the cache again....
1752 * Cleaning may be done by reading new data to displace any
1753 * dirty data in the cache. This will have happened in cpu_setttb()
1754 * but since we are boot strapping the addresses used for the read
1755 * may have just been remapped and thus the cache could be out
1756 * of sync. A re-clean after the switch will cure this.
1757 * After booting there are no gross relocations of the kernel thus
1758 * this problem will not occur after initarm().
1760 cpu_idcache_wbinv_all();
1764 init_proc0(kernelstack.pv_va);
1766 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
1767 pmap_bootstrap(freemempos, &kernel_l1pt);
1768 msgbufp = (void *)msgbufpv.pv_va;
1769 msgbufinit(msgbufp, msgbufsize);
1773 * Exclude the kernel (and all the things we allocated which immediately
1774 * follow the kernel) from the VM allocation pool but not from crash
1775 * dumps. virtual_avail is a global variable which tracks the kva we've
1776 * "allocated" while setting up pmaps.
1778 * Prepare the list of physical memory available to the vm subsystem.
1780 arm_physmem_exclude_region(abp->abp_physaddr,
1781 (virtual_avail - KERNVIRTADDR), EXFLAG_NOALLOC);
1782 arm_physmem_init_kernel_globals();
1784 init_param2(physmem);
1788 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
1789 sizeof(struct pcb)));
1791 #else /* __ARM_ARCH < 6 */
1793 initarm(struct arm_boot_params *abp)
1795 struct mem_region mem_regions[FDT_MEM_REGIONS];
1796 vm_paddr_t lastaddr;
1797 vm_offset_t dtbp, kernelstack, dpcpu;
1800 int err_devmap, mem_regions_sz;
1802 struct efi_map_header *efihdr;
1805 /* get last allocated physical address */
1806 arm_physmem_kernaddr = abp->abp_physaddr;
1807 lastaddr = parse_boot_param(abp) - KERNVIRTADDR + arm_physmem_kernaddr;
1813 * Find the dtb passed in by the boot loader.
1815 kmdp = preload_search_by_type("elf kernel");
1816 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
1817 #if defined(FDT_DTB_STATIC)
1819 * In case the device tree blob was not retrieved (from metadata) try
1820 * to use the statically embedded one.
1822 if (dtbp == (vm_offset_t)NULL)
1823 dtbp = (vm_offset_t)&fdt_static_dtb;
1826 if (OF_install(OFW_FDT, 0) == FALSE)
1827 panic("Cannot install FDT");
1829 if (OF_init((void *)dtbp) != 0)
1830 panic("OF_init failed with the found device tree");
1832 #if defined(LINUX_BOOT_ABI)
1833 if (loader_envp == NULL && fdt_get_chosen_bootargs(linux_command_line,
1834 LBABI_MAX_COMMAND_LINE) == 0)
1835 cmdline_set_env(linux_command_line, CMDLINE_GUARD);
1839 efihdr = (struct efi_map_header *)preload_search_info(kmdp,
1840 MODINFO_METADATA | MODINFOMD_EFI_MAP);
1841 if (efihdr != NULL) {
1842 add_efi_map_entries(efihdr, mem_regions, &mem_regions_sz);
1846 /* Grab physical memory regions information from device tree. */
1847 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz,NULL) != 0)
1848 panic("Cannot get physical memory regions");
1850 arm_physmem_hardware_regions(mem_regions, mem_regions_sz);
1852 /* Grab reserved memory regions information from device tree. */
1853 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0)
1854 arm_physmem_exclude_regions(mem_regions, mem_regions_sz,
1855 EXFLAG_NODUMP | EXFLAG_NOALLOC);
1858 * Set TEX remapping registers.
1859 * Setup kernel page tables and switch to kernel L1 page table.
1862 pmap_bootstrap_prepare(lastaddr);
1865 * Now that proper page tables are installed, call cpu_setup() to enable
1866 * instruction and data caches and other chip-specific features.
1870 /* Platform-specific initialisation */
1871 platform_probe_and_attach();
1874 /* Do basic tuning, hz etc */
1878 * Allocate a page for the system page mapped to 0xffff0000
1879 * This page will just contain the system vectors and can be
1880 * shared by all processes.
1882 systempage = pmap_preboot_get_pages(1);
1884 /* Map the vector page. */
1885 pmap_preboot_map_pages(systempage, ARM_VECTORS_HIGH, 1);
1886 if (virtual_end >= ARM_VECTORS_HIGH)
1887 virtual_end = ARM_VECTORS_HIGH - 1;
1889 /* Allocate dynamic per-cpu area. */
1890 dpcpu = pmap_preboot_get_vpages(DPCPU_SIZE / PAGE_SIZE);
1891 dpcpu_init((void *)dpcpu, 0);
1893 /* Allocate stacks for all modes */
1894 irqstack = pmap_preboot_get_vpages(IRQ_STACK_SIZE * MAXCPU);
1895 abtstack = pmap_preboot_get_vpages(ABT_STACK_SIZE * MAXCPU);
1896 undstack = pmap_preboot_get_vpages(UND_STACK_SIZE * MAXCPU );
1897 kernelstack = pmap_preboot_get_vpages(kstack_pages * MAXCPU);
1899 /* Allocate message buffer. */
1900 msgbufp = (void *)pmap_preboot_get_vpages(
1901 round_page(msgbufsize) / PAGE_SIZE);
1904 * Pages were allocated during the secondary bootstrap for the
1905 * stacks for different CPU modes.
1906 * We must now set the r13 registers in the different CPU modes to
1907 * point to these stacks.
1908 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
1909 * of the stack memory.
1914 /* Establish static device mappings. */
1915 err_devmap = platform_devmap_init();
1916 arm_devmap_bootstrap(0, NULL);
1917 vm_max_kernel_address = platform_lastaddr();
1920 * Only after the SOC registers block is mapped we can perform device
1921 * tree fixups, as they may attempt to read parameters from hardware.
1923 OF_interpret("perform-fixup", 0);
1924 platform_gpio_init();
1927 debugf("initarm: console initialized\n");
1928 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp);
1929 debugf(" boothowto = 0x%08x\n", boothowto);
1930 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
1931 debugf(" lastaddr1: 0x%08x\n", lastaddr);
1934 env = kern_getenv("kernelname");
1936 strlcpy(kernelname, env, sizeof(kernelname));
1938 if (err_devmap != 0)
1939 printf("WARNING: could not fully configure devmap, error=%d\n",
1942 platform_late_init();
1945 * We must now clean the cache again....
1946 * Cleaning may be done by reading new data to displace any
1947 * dirty data in the cache. This will have happened in cpu_setttb()
1948 * but since we are boot strapping the addresses used for the read
1949 * may have just been remapped and thus the cache could be out
1950 * of sync. A re-clean after the switch will cure this.
1951 * After booting there are no gross relocations of the kernel thus
1952 * this problem will not occur after initarm().
1954 /* Set stack for exception handlers */
1956 init_proc0(kernelstack);
1957 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
1958 enable_interrupts(PSR_A);
1961 /* Exclude the kernel (and all the things we allocated which immediately
1962 * follow the kernel) from the VM allocation pool but not from crash
1963 * dumps. virtual_avail is a global variable which tracks the kva we've
1964 * "allocated" while setting up pmaps.
1966 * Prepare the list of physical memory available to the vm subsystem.
1968 arm_physmem_exclude_region(abp->abp_physaddr,
1969 pmap_preboot_get_pages(0) - abp->abp_physaddr, EXFLAG_NOALLOC);
1970 arm_physmem_init_kernel_globals();
1972 init_param2(physmem);
1973 /* Init message buffer. */
1974 msgbufinit(msgbufp, msgbufsize);
1977 return ((void *)STACKALIGN(thread0.td_pcb));
1981 #endif /* __ARM_ARCH < 6 */
1984 uint32_t (*arm_cpu_fill_vdso_timehands)(struct vdso_timehands *,
1985 struct timecounter *);
1988 cpu_fill_vdso_timehands(struct vdso_timehands *vdso_th, struct timecounter *tc)
1991 return (arm_cpu_fill_vdso_timehands != NULL ?
1992 arm_cpu_fill_vdso_timehands(vdso_th, tc) : 0);