1 /* $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $ */
4 * SPDX-License-Identifier: BSD-4-Clause
6 * Copyright (c) 2004 Olivier Houchard
7 * Copyright (c) 1994-1998 Mark Brinicombe.
8 * Copyright (c) 1994 Brini.
11 * This code is derived from software written for Brini by Mark Brinicombe
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
21 * 3. All advertising materials mentioning features or use of this software
22 * must display the following acknowledgement:
23 * This product includes software developed by Mark Brinicombe
24 * for the NetBSD Project.
25 * 4. The name of the company nor the name of the author may be used to
26 * endorse or promote products derived from this software without specific
27 * prior written permission.
29 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
31 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
32 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
41 * Machine dependent functions for kernel setup
44 * Updated : 18/04/01 updated for new wscons
47 #include "opt_compat.h"
49 #include "opt_kstack_pages.h"
50 #include "opt_platform.h"
51 #include "opt_sched.h"
52 #include "opt_timer.h"
54 #include <sys/cdefs.h>
55 __FBSDID("$FreeBSD$");
57 #include <sys/param.h>
62 #include <sys/devmap.h>
64 #include <sys/imgact.h>
66 #include <sys/kernel.h>
67 #include <sys/linker.h>
68 #include <sys/msgbuf.h>
69 #include <sys/reboot.h>
70 #include <sys/rwlock.h>
71 #include <sys/sched.h>
72 #include <sys/syscallsubr.h>
73 #include <sys/sysent.h>
74 #include <sys/sysproto.h>
75 #include <sys/vmmeter.h>
77 #include <vm/vm_object.h>
78 #include <vm/vm_page.h>
79 #include <vm/vm_pager.h>
81 #include <machine/debug_monitor.h>
82 #include <machine/machdep.h>
83 #include <machine/metadata.h>
84 #include <machine/pcb.h>
85 #include <machine/physmem.h>
86 #include <machine/platform.h>
87 #include <machine/sysarch.h>
88 #include <machine/undefined.h>
89 #include <machine/vfp.h>
90 #include <machine/vmparam.h>
93 #include <dev/fdt/fdt_common.h>
94 #include <machine/ofw_machdep.h>
98 #define debugf(fmt, args...) printf(fmt, ##args)
100 #define debugf(fmt, args...)
103 #if defined(COMPAT_FREEBSD4) || defined(COMPAT_FREEBSD5) || \
104 defined(COMPAT_FREEBSD6) || defined(COMPAT_FREEBSD7) || \
105 defined(COMPAT_FREEBSD9)
106 #error FreeBSD/arm doesn't provide compatibility with releases prior to 10
109 #if __ARM_ARCH >= 6 && !defined(INTRNG)
110 #error armv6 requires INTRNG
113 struct pcpu __pcpu[MAXCPU];
114 struct pcpu *pcpup = &__pcpu[0];
116 static struct trapframe proc0_tf;
117 uint32_t cpu_reset_address = 0;
119 vm_offset_t vector_page;
121 int (*_arm_memcpy)(void *, void *, int, int) = NULL;
122 int (*_arm_bzero)(void *, int, int) = NULL;
123 int _min_memcpy_size = 0;
124 int _min_bzero_size = 0;
131 vm_offset_t systempage;
132 vm_offset_t irqstack;
133 vm_offset_t undstack;
134 vm_offset_t abtstack;
137 * This is the number of L2 page tables required for covering max
138 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf,
139 * stacks etc.), uprounded to be divisible by 4.
141 #define KERNEL_PT_MAX 78
142 static struct pv_addr kernel_pt_table[KERNEL_PT_MAX];
143 struct pv_addr systempage;
144 static struct pv_addr msgbufpv;
145 struct pv_addr irqstack;
146 struct pv_addr undstack;
147 struct pv_addr abtstack;
148 static struct pv_addr kernelstack;
149 #endif /* __ARM_ARCH >= 6 */
153 static delay_func *delay_impl;
154 static void *delay_arg;
157 struct kva_md_info kmi;
162 * Initialize the vector page, and select whether or not to
163 * relocate the vectors.
165 * NOTE: We expect the vector page to be mapped at its expected
169 extern unsigned int page0[], page0_data[];
171 arm_vector_init(vm_offset_t va, int which)
173 unsigned int *vectors = (int *) va;
174 unsigned int *vectors_data = vectors + (page0_data - page0);
178 * Loop through the vectors we're taking over, and copy the
179 * vector's insn and data word.
181 for (vec = 0; vec < ARM_NVEC; vec++) {
182 if ((which & (1 << vec)) == 0) {
183 /* Don't want to take over this vector. */
186 vectors[vec] = page0[vec];
187 vectors_data[vec] = page0_data[vec];
190 /* Now sync the vectors. */
191 icache_sync(va, (ARM_NVEC * 2) * sizeof(u_int));
195 if (va == ARM_VECTORS_HIGH) {
197 * Enable high vectors in the system control reg (SCTLR).
199 * Assume the MD caller knows what it's doing here, and really
200 * does want the vector page relocated.
202 * Note: This has to be done here (and not just in
203 * cpu_setup()) because the vector page needs to be
204 * accessible *before* cpu_startup() is called.
207 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC);
213 cpu_startup(void *dummy)
215 struct pcb *pcb = thread0.td_pcb;
216 const unsigned int mbyte = 1024 * 1024;
217 #if __ARM_ARCH < 6 && !defined(ARM_CACHE_LOCK_ENABLE)
223 vm_ksubmap_init(&kmi);
226 * Display the RAM layout.
228 printf("real memory = %ju (%ju MB)\n",
229 (uintmax_t)arm32_ptob(realmem),
230 (uintmax_t)arm32_ptob(realmem) / mbyte);
231 printf("avail memory = %ju (%ju MB)\n",
232 (uintmax_t)arm32_ptob(vm_free_count()),
233 (uintmax_t)arm32_ptob(vm_free_count()) / mbyte);
235 arm_physmem_print_tables();
236 devmap_print_table();
240 vm_pager_bufferinit();
241 pcb->pcb_regs.sf_sp = (u_int)thread0.td_kstack +
242 USPACE_SVC_STACK_TOP;
243 pmap_set_pcb_pagedir(kernel_pmap, pcb);
245 vector_page_setprot(VM_PROT_READ);
247 #ifdef ARM_CACHE_LOCK_ENABLE
248 pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS);
249 arm_lock_cache_line(ARM_TP_ADDRESS);
251 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO);
252 pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m));
254 *(uint32_t *)ARM_RAS_START = 0;
255 *(uint32_t *)ARM_RAS_END = 0xffffffff;
259 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
262 * Flush the D-cache for non-DMA I/O so that the I-cache can
263 * be made coherent later.
266 cpu_flush_dcache(void *ptr, size_t len)
269 dcache_wb_poc((vm_offset_t)ptr, (vm_paddr_t)vtophys(ptr), len);
272 /* Get current clock frequency for the given cpu id. */
274 cpu_est_clockrate(int cpu_id, uint64_t *rate)
284 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", busy, curcpu);
286 #ifndef NO_EVENTTIMERS
290 if (!sched_runnable())
292 #ifndef NO_EVENTTIMERS
297 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", busy, curcpu);
301 cpu_idle_wakeup(int cpu)
307 #ifdef NO_EVENTTIMERS
309 * Most ARM platforms don't need to do anything special to init their clocks
310 * (they get intialized during normal device attachment), and by not defining a
311 * cpu_initclocks() function they get this generic one. Any platform that needs
312 * to do something special can just provide their own implementation, which will
313 * override this one due to the weak linkage.
316 arm_generic_initclocks(void)
319 __weak_reference(arm_generic_initclocks, cpu_initclocks);
327 if (PCPU_GET(cpuid) == 0)
328 cpu_initclocks_bsp();
332 cpu_initclocks_bsp();
339 arm_set_delay(delay_func *impl, void *arg)
342 KASSERT(impl != NULL, ("No DELAY implementation"));
352 delay_impl(usec, delay_arg);
358 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
369 if (td->td_md.md_spinlock_count == 0) {
370 cspr = disable_interrupts(PSR_I | PSR_F);
371 td->td_md.md_spinlock_count = 1;
372 td->td_md.md_saved_cspr = cspr;
374 td->td_md.md_spinlock_count++;
386 cspr = td->td_md.md_saved_cspr;
387 td->td_md.md_spinlock_count--;
388 if (td->td_md.md_spinlock_count == 0)
389 restore_interrupts(cspr);
393 * Clear registers on exec
396 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
398 struct trapframe *tf = td->td_frame;
400 memset(tf, 0, sizeof(*tf));
401 tf->tf_usr_sp = stack;
402 tf->tf_usr_lr = imgp->entry_addr;
403 tf->tf_svc_lr = 0x77777777;
404 tf->tf_pc = imgp->entry_addr;
405 tf->tf_spsr = PSR_USR32_MODE;
411 * Get machine VFP context.
414 get_vfpcontext(struct thread *td, mcontext_vfp_t *vfp)
419 if (td == curthread) {
421 vfp_store(&pcb->pcb_vfpstate, false);
424 MPASS(TD_IS_SUSPENDED(td));
425 memcpy(vfp->mcv_reg, pcb->pcb_vfpstate.reg,
426 sizeof(vfp->mcv_reg));
427 vfp->mcv_fpscr = pcb->pcb_vfpstate.fpscr;
431 * Set machine VFP context.
434 set_vfpcontext(struct thread *td, mcontext_vfp_t *vfp)
439 if (td == curthread) {
444 MPASS(TD_IS_SUSPENDED(td));
445 memcpy(pcb->pcb_vfpstate.reg, vfp->mcv_reg,
446 sizeof(pcb->pcb_vfpstate.reg));
447 pcb->pcb_vfpstate.fpscr = vfp->mcv_fpscr;
452 arm_get_vfpstate(struct thread *td, void *args)
455 struct arm_get_vfpstate_args ua;
456 mcontext_vfp_t mcontext_vfp;
458 rv = copyin(args, &ua, sizeof(ua));
461 if (ua.mc_vfp_size != sizeof(mcontext_vfp_t))
464 get_vfpcontext(td, &mcontext_vfp);
466 bzero(&mcontext_vfp, sizeof(mcontext_vfp));
469 rv = copyout(&mcontext_vfp, ua.mc_vfp, sizeof(mcontext_vfp));
476 * Get machine context.
479 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret)
481 struct trapframe *tf = td->td_frame;
482 __greg_t *gr = mcp->__gregs;
484 if (clear_ret & GET_MC_CLEAR_RET) {
486 gr[_REG_CPSR] = tf->tf_spsr & ~PSR_C;
488 gr[_REG_R0] = tf->tf_r0;
489 gr[_REG_CPSR] = tf->tf_spsr;
491 gr[_REG_R1] = tf->tf_r1;
492 gr[_REG_R2] = tf->tf_r2;
493 gr[_REG_R3] = tf->tf_r3;
494 gr[_REG_R4] = tf->tf_r4;
495 gr[_REG_R5] = tf->tf_r5;
496 gr[_REG_R6] = tf->tf_r6;
497 gr[_REG_R7] = tf->tf_r7;
498 gr[_REG_R8] = tf->tf_r8;
499 gr[_REG_R9] = tf->tf_r9;
500 gr[_REG_R10] = tf->tf_r10;
501 gr[_REG_R11] = tf->tf_r11;
502 gr[_REG_R12] = tf->tf_r12;
503 gr[_REG_SP] = tf->tf_usr_sp;
504 gr[_REG_LR] = tf->tf_usr_lr;
505 gr[_REG_PC] = tf->tf_pc;
507 mcp->mc_vfp_size = 0;
508 mcp->mc_vfp_ptr = NULL;
509 memset(&mcp->mc_spare, 0, sizeof(mcp->mc_spare));
515 * Set machine context.
517 * However, we don't set any but the user modifiable flags, and we won't
518 * touch the cs selector.
521 set_mcontext(struct thread *td, mcontext_t *mcp)
523 mcontext_vfp_t mc_vfp, *vfp;
524 struct trapframe *tf = td->td_frame;
525 const __greg_t *gr = mcp->__gregs;
529 * Make sure the processor mode has not been tampered with and
530 * interrupts have not been disabled.
532 spsr = gr[_REG_CPSR];
533 if ((spsr & PSR_MODE) != PSR_USR32_MODE ||
534 (spsr & (PSR_I | PSR_F)) != 0)
538 if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_size != sizeof(mc_vfp)) {
539 printf("%s: %s: Malformed mc_vfp_size: %d (0x%08X)\n",
540 td->td_proc->p_comm, __func__,
541 mcp->mc_vfp_size, mcp->mc_vfp_size);
542 } else if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_ptr == NULL) {
543 printf("%s: %s: c_vfp_size != 0 but mc_vfp_ptr == NULL\n",
544 td->td_proc->p_comm, __func__);
548 if (mcp->mc_vfp_size == sizeof(mc_vfp) && mcp->mc_vfp_ptr != NULL) {
549 if (copyin(mcp->mc_vfp_ptr, &mc_vfp, sizeof(mc_vfp)) != 0)
556 tf->tf_r0 = gr[_REG_R0];
557 tf->tf_r1 = gr[_REG_R1];
558 tf->tf_r2 = gr[_REG_R2];
559 tf->tf_r3 = gr[_REG_R3];
560 tf->tf_r4 = gr[_REG_R4];
561 tf->tf_r5 = gr[_REG_R5];
562 tf->tf_r6 = gr[_REG_R6];
563 tf->tf_r7 = gr[_REG_R7];
564 tf->tf_r8 = gr[_REG_R8];
565 tf->tf_r9 = gr[_REG_R9];
566 tf->tf_r10 = gr[_REG_R10];
567 tf->tf_r11 = gr[_REG_R11];
568 tf->tf_r12 = gr[_REG_R12];
569 tf->tf_usr_sp = gr[_REG_SP];
570 tf->tf_usr_lr = gr[_REG_LR];
571 tf->tf_pc = gr[_REG_PC];
572 tf->tf_spsr = gr[_REG_CPSR];
575 set_vfpcontext(td, vfp);
581 sendsig(catcher, ksi, mask)
588 struct trapframe *tf;
589 struct sigframe *fp, frame;
591 struct sysentvec *sysent;
598 PROC_LOCK_ASSERT(p, MA_OWNED);
599 sig = ksi->ksi_signo;
600 code = ksi->ksi_code;
602 mtx_assert(&psp->ps_mtx, MA_OWNED);
604 onstack = sigonstack(tf->tf_usr_sp);
606 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm,
609 /* Allocate and validate space for the signal handler context. */
610 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !(onstack) &&
611 SIGISMEMBER(psp->ps_sigonstack, sig)) {
612 fp = (struct sigframe *)((uintptr_t)td->td_sigstk.ss_sp +
613 td->td_sigstk.ss_size);
614 #if defined(COMPAT_43)
615 td->td_sigstk.ss_flags |= SS_ONSTACK;
618 fp = (struct sigframe *)td->td_frame->tf_usr_sp;
620 /* make room on the stack */
623 /* make the stack aligned */
624 fp = (struct sigframe *)STACKALIGN(fp);
625 /* Populate the siginfo frame. */
626 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0);
628 get_vfpcontext(td, &frame.sf_vfp);
629 frame.sf_uc.uc_mcontext.mc_vfp_size = sizeof(fp->sf_vfp);
630 frame.sf_uc.uc_mcontext.mc_vfp_ptr = &fp->sf_vfp;
632 frame.sf_uc.uc_mcontext.mc_vfp_size = 0;
633 frame.sf_uc.uc_mcontext.mc_vfp_ptr = NULL;
635 frame.sf_si = ksi->ksi_info;
636 frame.sf_uc.uc_sigmask = *mask;
637 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK )
638 ? ((onstack) ? SS_ONSTACK : 0) : SS_DISABLE;
639 frame.sf_uc.uc_stack = td->td_sigstk;
640 mtx_unlock(&psp->ps_mtx);
641 PROC_UNLOCK(td->td_proc);
643 /* Copy the sigframe out to the user's stack. */
644 if (copyout(&frame, fp, sizeof(*fp)) != 0) {
645 /* Process has trashed its stack. Kill it. */
646 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp);
652 * Build context to run handler in. We invoke the handler
653 * directly, only returning via the trampoline. Note the
654 * trampoline version numbers are coordinated with machine-
655 * dependent code in libc.
659 tf->tf_r1 = (register_t)&fp->sf_si;
660 tf->tf_r2 = (register_t)&fp->sf_uc;
662 /* the trampoline uses r5 as the uc address */
663 tf->tf_r5 = (register_t)&fp->sf_uc;
664 tf->tf_pc = (register_t)catcher;
665 tf->tf_usr_sp = (register_t)fp;
666 sysent = p->p_sysent;
667 if (sysent->sv_sigcode_base != 0)
668 tf->tf_usr_lr = (register_t)sysent->sv_sigcode_base;
670 tf->tf_usr_lr = (register_t)(sysent->sv_psstrings -
671 *(sysent->sv_szsigcode));
672 /* Set the mode to enter in the signal handler */
674 if ((register_t)catcher & 1)
675 tf->tf_spsr |= PSR_T;
677 tf->tf_spsr &= ~PSR_T;
680 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr,
684 mtx_lock(&psp->ps_mtx);
688 sys_sigreturn(td, uap)
690 struct sigreturn_args /* {
691 const struct __ucontext *sigcntxp;
699 if (copyin(uap->sigcntxp, &uc, sizeof(uc)))
701 /* Restore register context. */
702 error = set_mcontext(td, &uc.uc_mcontext);
706 /* Restore signal mask. */
707 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
709 return (EJUSTRETURN);
713 * Construct a PCB from a trapframe. This is called from kdb_trap() where
714 * we want to start a backtrace from the function that caused us to enter
715 * the debugger. We have the context in the trapframe, but base the trace
716 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
717 * enough for a backtrace.
720 makectx(struct trapframe *tf, struct pcb *pcb)
722 pcb->pcb_regs.sf_r4 = tf->tf_r4;
723 pcb->pcb_regs.sf_r5 = tf->tf_r5;
724 pcb->pcb_regs.sf_r6 = tf->tf_r6;
725 pcb->pcb_regs.sf_r7 = tf->tf_r7;
726 pcb->pcb_regs.sf_r8 = tf->tf_r8;
727 pcb->pcb_regs.sf_r9 = tf->tf_r9;
728 pcb->pcb_regs.sf_r10 = tf->tf_r10;
729 pcb->pcb_regs.sf_r11 = tf->tf_r11;
730 pcb->pcb_regs.sf_r12 = tf->tf_r12;
731 pcb->pcb_regs.sf_pc = tf->tf_pc;
732 pcb->pcb_regs.sf_lr = tf->tf_usr_lr;
733 pcb->pcb_regs.sf_sp = tf->tf_usr_sp;
740 set_curthread(&thread0);
742 pcpu_init(pcpup, 0, sizeof(struct pcpu));
743 PCPU_SET(curthread, &thread0);
750 init_proc0(vm_offset_t kstack)
752 proc_linkup0(&proc0, &thread0);
753 thread0.td_kstack = kstack;
754 thread0.td_pcb = (struct pcb *)
755 (thread0.td_kstack + kstack_pages * PAGE_SIZE) - 1;
756 thread0.td_pcb->pcb_flags = 0;
757 thread0.td_pcb->pcb_vfpcpu = -1;
758 thread0.td_pcb->pcb_vfpstate.fpscr = VFPSCR_DN;
759 thread0.td_frame = &proc0_tf;
760 pcpup->pc_curpcb = thread0.td_pcb;
765 set_stackptrs(int cpu)
768 set_stackptr(PSR_IRQ32_MODE,
769 irqstack + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
770 set_stackptr(PSR_ABT32_MODE,
771 abtstack + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
772 set_stackptr(PSR_UND32_MODE,
773 undstack + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
777 set_stackptrs(int cpu)
780 set_stackptr(PSR_IRQ32_MODE,
781 irqstack.pv_va + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
782 set_stackptr(PSR_ABT32_MODE,
783 abtstack.pv_va + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
784 set_stackptr(PSR_UND32_MODE,
785 undstack.pv_va + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
795 if (boothowto & RB_KDB)
796 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
803 initarm(struct arm_boot_params *abp)
805 struct mem_region mem_regions[FDT_MEM_REGIONS];
806 struct pv_addr kernel_l1pt;
807 struct pv_addr dpcpu;
808 vm_offset_t dtbp, freemempos, l2_start, lastaddr;
814 int i, j, err_devmap, mem_regions_sz;
816 lastaddr = parse_boot_param(abp);
817 arm_physmem_kernaddr = abp->abp_physaddr;
825 * Find the dtb passed in by the boot loader.
827 kmdp = preload_search_by_type("elf kernel");
829 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
831 dtbp = (vm_offset_t)NULL;
833 #if defined(FDT_DTB_STATIC)
835 * In case the device tree blob was not retrieved (from metadata) try
836 * to use the statically embedded one.
838 if (dtbp == (vm_offset_t)NULL)
839 dtbp = (vm_offset_t)&fdt_static_dtb;
842 if (OF_install(OFW_FDT, 0) == FALSE)
843 panic("Cannot install FDT");
845 if (OF_init((void *)dtbp) != 0)
846 panic("OF_init failed with the found device tree");
848 /* Grab physical memory regions information from device tree. */
849 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz, &memsize) != 0)
850 panic("Cannot get physical memory regions");
851 arm_physmem_hardware_regions(mem_regions, mem_regions_sz);
853 /* Grab reserved memory regions information from device tree. */
854 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0)
855 arm_physmem_exclude_regions(mem_regions, mem_regions_sz,
856 EXFLAG_NODUMP | EXFLAG_NOALLOC);
858 /* Platform-specific initialisation */
859 platform_probe_and_attach();
863 /* Do basic tuning, hz etc */
866 /* Calculate number of L2 tables needed for mapping vm_page_array */
867 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page);
868 l2size = (l2size >> L1_S_SHIFT) + 1;
871 * Add one table for end of kernel map, one for stacks, msgbuf and
872 * L1 and L2 tables map, one for vectors map and two for
873 * l2 structures from pmap_bootstrap.
877 /* Make it divisible by 4 */
878 l2size = (l2size + 3) & ~3;
880 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK;
882 /* Define a macro to simplify memory allocation */
883 #define valloc_pages(var, np) \
884 alloc_pages((var).pv_va, (np)); \
885 (var).pv_pa = (var).pv_va + (abp->abp_physaddr - KERNVIRTADDR);
887 #define alloc_pages(var, np) \
888 (var) = freemempos; \
889 freemempos += (np * PAGE_SIZE); \
890 memset((char *)(var), 0, ((np) * PAGE_SIZE));
892 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
893 freemempos += PAGE_SIZE;
894 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
896 for (i = 0, j = 0; i < l2size; ++i) {
897 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
898 valloc_pages(kernel_pt_table[i],
899 L2_TABLE_SIZE / PAGE_SIZE);
902 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va +
903 L2_TABLE_SIZE_REAL * (i - j);
904 kernel_pt_table[i].pv_pa =
905 kernel_pt_table[i].pv_va - KERNVIRTADDR +
911 * Allocate a page for the system page mapped to 0x00000000
912 * or 0xffff0000. This page will just contain the system vectors
913 * and can be shared by all processes.
915 valloc_pages(systempage, 1);
917 /* Allocate dynamic per-cpu area. */
918 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
919 dpcpu_init((void *)dpcpu.pv_va, 0);
921 /* Allocate stacks for all modes */
922 valloc_pages(irqstack, IRQ_STACK_SIZE * MAXCPU);
923 valloc_pages(abtstack, ABT_STACK_SIZE * MAXCPU);
924 valloc_pages(undstack, UND_STACK_SIZE * MAXCPU);
925 valloc_pages(kernelstack, kstack_pages * MAXCPU);
926 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
929 * Now we start construction of the L1 page table
930 * We start by mapping the L2 page tables into the L1.
931 * This means that we can replace L1 mappings later on if necessary
933 l1pagetable = kernel_l1pt.pv_va;
936 * Try to map as much as possible of kernel text and data using
937 * 1MB section mapping and for the rest of initial kernel address
938 * space use L2 coarse tables.
940 * Link L2 tables for mapping remainder of kernel (modulo 1MB)
941 * and kernel structures
943 l2_start = lastaddr & ~(L1_S_OFFSET);
944 for (i = 0 ; i < l2size - 1; i++)
945 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE,
946 &kernel_pt_table[i]);
948 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE;
950 /* Map kernel code and data */
951 pmap_map_chunk(l1pagetable, KERNVIRTADDR, abp->abp_physaddr,
952 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK,
953 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
955 /* Map L1 directory and allocated L2 page tables */
956 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
957 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
959 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va,
960 kernel_pt_table[0].pv_pa,
961 L2_TABLE_SIZE_REAL * l2size,
962 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
964 /* Map allocated DPCPU, stacks and msgbuf */
965 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa,
966 freemempos - dpcpu.pv_va,
967 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
969 /* Link and map the vector page */
970 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH,
971 &kernel_pt_table[l2size - 1]);
972 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
973 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE);
975 /* Establish static device mappings. */
976 err_devmap = platform_devmap_init();
977 devmap_bootstrap(l1pagetable, NULL);
978 vm_max_kernel_address = platform_lastaddr();
980 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT);
981 pmap_pa = kernel_l1pt.pv_pa;
982 cpu_setttb(kernel_l1pt.pv_pa);
984 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2));
987 * Now that proper page tables are installed, call cpu_setup() to enable
988 * instruction and data caches and other chip-specific features.
993 * Only after the SOC registers block is mapped we can perform device
994 * tree fixups, as they may attempt to read parameters from hardware.
996 OF_interpret("perform-fixup", 0);
998 platform_gpio_init();
1002 debugf("initarm: console initialized\n");
1003 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp);
1004 debugf(" boothowto = 0x%08x\n", boothowto);
1005 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
1008 env = kern_getenv("kernelname");
1010 strlcpy(kernelname, env, sizeof(kernelname));
1014 if (err_devmap != 0)
1015 printf("WARNING: could not fully configure devmap, error=%d\n",
1018 platform_late_init();
1021 * Pages were allocated during the secondary bootstrap for the
1022 * stacks for different CPU modes.
1023 * We must now set the r13 registers in the different CPU modes to
1024 * point to these stacks.
1025 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
1026 * of the stack memory.
1028 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE);
1033 * We must now clean the cache again....
1034 * Cleaning may be done by reading new data to displace any
1035 * dirty data in the cache. This will have happened in cpu_setttb()
1036 * but since we are boot strapping the addresses used for the read
1037 * may have just been remapped and thus the cache could be out
1038 * of sync. A re-clean after the switch will cure this.
1039 * After booting there are no gross relocations of the kernel thus
1040 * this problem will not occur after initarm().
1042 cpu_idcache_wbinv_all();
1046 init_proc0(kernelstack.pv_va);
1048 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
1049 pmap_bootstrap(freemempos, &kernel_l1pt);
1050 msgbufp = (void *)msgbufpv.pv_va;
1051 msgbufinit(msgbufp, msgbufsize);
1055 * Exclude the kernel (and all the things we allocated which immediately
1056 * follow the kernel) from the VM allocation pool but not from crash
1057 * dumps. virtual_avail is a global variable which tracks the kva we've
1058 * "allocated" while setting up pmaps.
1060 * Prepare the list of physical memory available to the vm subsystem.
1062 arm_physmem_exclude_region(abp->abp_physaddr,
1063 (virtual_avail - KERNVIRTADDR), EXFLAG_NOALLOC);
1064 arm_physmem_init_kernel_globals();
1066 init_param2(physmem);
1070 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
1071 sizeof(struct pcb)));
1073 #else /* __ARM_ARCH < 6 */
1075 initarm(struct arm_boot_params *abp)
1077 struct mem_region mem_regions[FDT_MEM_REGIONS];
1078 vm_paddr_t lastaddr;
1079 vm_offset_t dtbp, kernelstack, dpcpu;
1082 int err_devmap, mem_regions_sz;
1084 struct efi_map_header *efihdr;
1087 /* get last allocated physical address */
1088 arm_physmem_kernaddr = abp->abp_physaddr;
1089 lastaddr = parse_boot_param(abp) - KERNVIRTADDR + arm_physmem_kernaddr;
1095 * Find the dtb passed in by the boot loader.
1097 kmdp = preload_search_by_type("elf kernel");
1098 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
1099 #if defined(FDT_DTB_STATIC)
1101 * In case the device tree blob was not retrieved (from metadata) try
1102 * to use the statically embedded one.
1104 if (dtbp == (vm_offset_t)NULL)
1105 dtbp = (vm_offset_t)&fdt_static_dtb;
1108 if (OF_install(OFW_FDT, 0) == FALSE)
1109 panic("Cannot install FDT");
1111 if (OF_init((void *)dtbp) != 0)
1112 panic("OF_init failed with the found device tree");
1114 #if defined(LINUX_BOOT_ABI)
1115 arm_parse_fdt_bootargs();
1119 efihdr = (struct efi_map_header *)preload_search_info(kmdp,
1120 MODINFO_METADATA | MODINFOMD_EFI_MAP);
1121 if (efihdr != NULL) {
1122 arm_add_efi_map_entries(efihdr, mem_regions, &mem_regions_sz);
1126 /* Grab physical memory regions information from device tree. */
1127 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz,NULL) != 0)
1128 panic("Cannot get physical memory regions");
1130 arm_physmem_hardware_regions(mem_regions, mem_regions_sz);
1132 /* Grab reserved memory regions information from device tree. */
1133 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0)
1134 arm_physmem_exclude_regions(mem_regions, mem_regions_sz,
1135 EXFLAG_NODUMP | EXFLAG_NOALLOC);
1138 * Set TEX remapping registers.
1139 * Setup kernel page tables and switch to kernel L1 page table.
1142 pmap_bootstrap_prepare(lastaddr);
1145 * If EARLY_PRINTF support is enabled, we need to re-establish the
1146 * mapping after pmap_bootstrap_prepare() switches to new page tables.
1147 * Note that we can only do the remapping if the VA is outside the
1148 * kernel, now that we have real virtual (not VA=PA) mappings in effect.
1149 * Early printf does not work between the time pmap_set_tex() does
1150 * cp15_prrr_set() and this code remaps the VA.
1152 #if defined(EARLY_PRINTF) && defined(SOCDEV_PA) && defined(SOCDEV_VA) && SOCDEV_VA < KERNBASE
1153 pmap_preboot_map_attr(SOCDEV_PA, SOCDEV_VA, 1024 * 1024,
1154 VM_PROT_READ | VM_PROT_WRITE, VM_MEMATTR_DEVICE);
1158 * Now that proper page tables are installed, call cpu_setup() to enable
1159 * instruction and data caches and other chip-specific features.
1163 /* Platform-specific initialisation */
1164 platform_probe_and_attach();
1167 /* Do basic tuning, hz etc */
1171 * Allocate a page for the system page mapped to 0xffff0000
1172 * This page will just contain the system vectors and can be
1173 * shared by all processes.
1175 systempage = pmap_preboot_get_pages(1);
1177 /* Map the vector page. */
1178 pmap_preboot_map_pages(systempage, ARM_VECTORS_HIGH, 1);
1179 if (virtual_end >= ARM_VECTORS_HIGH)
1180 virtual_end = ARM_VECTORS_HIGH - 1;
1182 /* Allocate dynamic per-cpu area. */
1183 dpcpu = pmap_preboot_get_vpages(DPCPU_SIZE / PAGE_SIZE);
1184 dpcpu_init((void *)dpcpu, 0);
1186 /* Allocate stacks for all modes */
1187 irqstack = pmap_preboot_get_vpages(IRQ_STACK_SIZE * MAXCPU);
1188 abtstack = pmap_preboot_get_vpages(ABT_STACK_SIZE * MAXCPU);
1189 undstack = pmap_preboot_get_vpages(UND_STACK_SIZE * MAXCPU );
1190 kernelstack = pmap_preboot_get_vpages(kstack_pages * MAXCPU);
1192 /* Allocate message buffer. */
1193 msgbufp = (void *)pmap_preboot_get_vpages(
1194 round_page(msgbufsize) / PAGE_SIZE);
1197 * Pages were allocated during the secondary bootstrap for the
1198 * stacks for different CPU modes.
1199 * We must now set the r13 registers in the different CPU modes to
1200 * point to these stacks.
1201 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
1202 * of the stack memory.
1207 /* Establish static device mappings. */
1208 err_devmap = platform_devmap_init();
1209 devmap_bootstrap(0, NULL);
1210 vm_max_kernel_address = platform_lastaddr();
1213 * Only after the SOC registers block is mapped we can perform device
1214 * tree fixups, as they may attempt to read parameters from hardware.
1216 OF_interpret("perform-fixup", 0);
1217 platform_gpio_init();
1221 * If we made a mapping for EARLY_PRINTF after pmap_bootstrap_prepare(),
1222 * undo it now that the normal console printf works.
1224 #if defined(EARLY_PRINTF) && defined(SOCDEV_PA) && defined(SOCDEV_VA) && SOCDEV_VA < KERNBASE
1225 pmap_kremove(SOCDEV_VA);
1228 debugf("initarm: console initialized\n");
1229 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp);
1230 debugf(" boothowto = 0x%08x\n", boothowto);
1231 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
1232 debugf(" lastaddr1: 0x%08x\n", lastaddr);
1235 env = kern_getenv("kernelname");
1237 strlcpy(kernelname, env, sizeof(kernelname));
1239 if (err_devmap != 0)
1240 printf("WARNING: could not fully configure devmap, error=%d\n",
1243 platform_late_init();
1246 * We must now clean the cache again....
1247 * Cleaning may be done by reading new data to displace any
1248 * dirty data in the cache. This will have happened in cpu_setttb()
1249 * but since we are boot strapping the addresses used for the read
1250 * may have just been remapped and thus the cache could be out
1251 * of sync. A re-clean after the switch will cure this.
1252 * After booting there are no gross relocations of the kernel thus
1253 * this problem will not occur after initarm().
1255 /* Set stack for exception handlers */
1257 init_proc0(kernelstack);
1258 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
1259 enable_interrupts(PSR_A);
1262 /* Exclude the kernel (and all the things we allocated which immediately
1263 * follow the kernel) from the VM allocation pool but not from crash
1264 * dumps. virtual_avail is a global variable which tracks the kva we've
1265 * "allocated" while setting up pmaps.
1267 * Prepare the list of physical memory available to the vm subsystem.
1269 arm_physmem_exclude_region(abp->abp_physaddr,
1270 pmap_preboot_get_pages(0) - abp->abp_physaddr, EXFLAG_NOALLOC);
1271 arm_physmem_init_kernel_globals();
1273 init_param2(physmem);
1274 /* Init message buffer. */
1275 msgbufinit(msgbufp, msgbufsize);
1278 /* Apply possible BP hardening. */
1279 cpuinfo_init_bp_hardening();
1280 return ((void *)STACKALIGN(thread0.td_pcb));
1284 #endif /* __ARM_ARCH < 6 */