1 /* $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $ */
4 * Copyright (c) 2004 Olivier Houchard
5 * Copyright (c) 1994-1998 Mark Brinicombe.
6 * Copyright (c) 1994 Brini.
9 * This code is derived from software written for Brini by Mark Brinicombe
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by Mark Brinicombe
22 * for the NetBSD Project.
23 * 4. The name of the company nor the name of the author may be used to
24 * endorse or promote products derived from this software without specific
25 * prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
28 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
29 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
30 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
31 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
32 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
33 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * Machine dependant functions for kernel setup
42 * Updated : 18/04/01 updated for new wscons
45 #include "opt_compat.h"
47 #include "opt_kstack_pages.h"
48 #include "opt_platform.h"
49 #include "opt_sched.h"
50 #include "opt_timer.h"
52 #include <sys/cdefs.h>
53 __FBSDID("$FreeBSD$");
55 #include <sys/param.h>
57 #include <sys/systm.h>
65 #include <sys/imgact.h>
67 #include <sys/kernel.h>
69 #include <sys/linker.h>
71 #include <sys/malloc.h>
72 #include <sys/msgbuf.h>
73 #include <sys/mutex.h>
75 #include <sys/ptrace.h>
76 #include <sys/reboot.h>
77 #include <sys/rwlock.h>
78 #include <sys/sched.h>
79 #include <sys/signalvar.h>
80 #include <sys/syscallsubr.h>
81 #include <sys/sysctl.h>
82 #include <sys/sysent.h>
83 #include <sys/sysproto.h>
89 #include <vm/vm_map.h>
90 #include <vm/vm_object.h>
91 #include <vm/vm_page.h>
92 #include <vm/vm_pager.h>
94 #include <machine/acle-compat.h>
95 #include <machine/armreg.h>
96 #include <machine/atags.h>
97 #include <machine/cpu.h>
98 #include <machine/cpuinfo.h>
99 #include <machine/db_machdep.h>
100 #include <machine/devmap.h>
101 #include <machine/frame.h>
102 #include <machine/intr.h>
103 #include <machine/machdep.h>
104 #include <machine/md_var.h>
105 #include <machine/metadata.h>
106 #include <machine/pcb.h>
107 #include <machine/physmem.h>
108 #include <machine/platform.h>
109 #include <machine/reg.h>
110 #include <machine/trap.h>
111 #include <machine/undefined.h>
112 #include <machine/vfp.h>
113 #include <machine/vmparam.h>
114 #include <machine/sysarch.h>
117 #include <dev/fdt/fdt_common.h>
118 #include <dev/ofw/openfirm.h>
125 #include <machine/cpu-v6.h>
127 DB_SHOW_COMMAND(cp15, db_show_cp15)
131 reg = cp15_midr_get();
132 db_printf("Cpu ID: 0x%08x\n", reg);
133 reg = cp15_ctr_get();
134 db_printf("Current Cache Lvl ID: 0x%08x\n",reg);
136 reg = cp15_sctlr_get();
137 db_printf("Ctrl: 0x%08x\n",reg);
138 reg = cp15_actlr_get();
139 db_printf("Aux Ctrl: 0x%08x\n",reg);
141 reg = cp15_id_pfr0_get();
142 db_printf("Processor Feat 0: 0x%08x\n", reg);
143 reg = cp15_id_pfr1_get();
144 db_printf("Processor Feat 1: 0x%08x\n", reg);
145 reg = cp15_id_dfr0_get();
146 db_printf("Debug Feat 0: 0x%08x\n", reg);
147 reg = cp15_id_afr0_get();
148 db_printf("Auxiliary Feat 0: 0x%08x\n", reg);
149 reg = cp15_id_mmfr0_get();
150 db_printf("Memory Model Feat 0: 0x%08x\n", reg);
151 reg = cp15_id_mmfr1_get();
152 db_printf("Memory Model Feat 1: 0x%08x\n", reg);
153 reg = cp15_id_mmfr2_get();
154 db_printf("Memory Model Feat 2: 0x%08x\n", reg);
155 reg = cp15_id_mmfr3_get();
156 db_printf("Memory Model Feat 3: 0x%08x\n", reg);
157 reg = cp15_ttbr_get();
158 db_printf("TTB0: 0x%08x\n", reg);
161 DB_SHOW_COMMAND(vtop, db_show_vtop)
166 cp15_ats1cpr_set(addr);
167 reg = cp15_par_get();
168 db_printf("Physical address reg: 0x%08x\n",reg);
170 db_printf("show vtop <virt_addr>\n");
172 #endif /* __ARM_ARCH >= 6 */
176 #define debugf(fmt, args...) printf(fmt, ##args)
178 #define debugf(fmt, args...)
181 struct pcpu __pcpu[MAXCPU];
182 struct pcpu *pcpup = &__pcpu[0];
184 static struct trapframe proc0_tf;
185 uint32_t cpu_reset_address = 0;
187 vm_offset_t vector_page;
189 int (*_arm_memcpy)(void *, void *, int, int) = NULL;
190 int (*_arm_bzero)(void *, int, int) = NULL;
191 int _min_memcpy_size = 0;
192 int _min_bzero_size = 0;
197 static char *loader_envp;
202 vm_offset_t systempage;
203 vm_offset_t irqstack;
204 vm_offset_t undstack;
205 vm_offset_t abtstack;
208 * This is the number of L2 page tables required for covering max
209 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf,
210 * stacks etc.), uprounded to be divisible by 4.
212 #define KERNEL_PT_MAX 78
214 static struct pv_addr kernel_pt_table[KERNEL_PT_MAX];
216 struct pv_addr systempage;
217 static struct pv_addr msgbufpv;
218 struct pv_addr irqstack;
219 struct pv_addr undstack;
220 struct pv_addr abtstack;
221 static struct pv_addr kernelstack;
225 #if defined(LINUX_BOOT_ABI)
226 #define LBABI_MAX_BANKS 10
229 struct arm_lbabi_tag *atag_list;
230 char linux_command_line[LBABI_MAX_COMMAND_LINE + 1];
231 char atags[LBABI_MAX_COMMAND_LINE * 2];
232 uint32_t memstart[LBABI_MAX_BANKS];
233 uint32_t memsize[LBABI_MAX_BANKS];
237 static uint32_t board_revision;
238 /* hex representation of uint64_t */
239 static char board_serial[32];
241 SYSCTL_NODE(_hw, OID_AUTO, board, CTLFLAG_RD, 0, "Board attributes");
242 SYSCTL_UINT(_hw_board, OID_AUTO, revision, CTLFLAG_RD,
243 &board_revision, 0, "Board revision");
244 SYSCTL_STRING(_hw_board, OID_AUTO, serial, CTLFLAG_RD,
245 board_serial, 0, "Board serial");
248 SYSCTL_INT(_hw, HW_FLOATINGPT, floatingpoint, CTLFLAG_RD,
249 &vfp_exists, 0, "Floating point support enabled");
252 board_set_serial(uint64_t serial)
255 snprintf(board_serial, sizeof(board_serial)-1,
260 board_set_revision(uint32_t revision)
263 board_revision = revision;
267 sendsig(catcher, ksi, mask)
274 struct trapframe *tf;
275 struct sigframe *fp, frame;
277 struct sysentvec *sysent;
284 PROC_LOCK_ASSERT(p, MA_OWNED);
285 sig = ksi->ksi_signo;
286 code = ksi->ksi_code;
288 mtx_assert(&psp->ps_mtx, MA_OWNED);
290 onstack = sigonstack(tf->tf_usr_sp);
292 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm,
295 /* Allocate and validate space for the signal handler context. */
296 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !(onstack) &&
297 SIGISMEMBER(psp->ps_sigonstack, sig)) {
298 fp = (struct sigframe *)(td->td_sigstk.ss_sp +
299 td->td_sigstk.ss_size);
300 #if defined(COMPAT_43)
301 td->td_sigstk.ss_flags |= SS_ONSTACK;
304 fp = (struct sigframe *)td->td_frame->tf_usr_sp;
306 /* make room on the stack */
309 /* make the stack aligned */
310 fp = (struct sigframe *)STACKALIGN(fp);
311 /* Populate the siginfo frame. */
312 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0);
313 frame.sf_si = ksi->ksi_info;
314 frame.sf_uc.uc_sigmask = *mask;
315 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK )
316 ? ((onstack) ? SS_ONSTACK : 0) : SS_DISABLE;
317 frame.sf_uc.uc_stack = td->td_sigstk;
318 mtx_unlock(&psp->ps_mtx);
319 PROC_UNLOCK(td->td_proc);
321 /* Copy the sigframe out to the user's stack. */
322 if (copyout(&frame, fp, sizeof(*fp)) != 0) {
323 /* Process has trashed its stack. Kill it. */
324 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp);
330 * Build context to run handler in. We invoke the handler
331 * directly, only returning via the trampoline. Note the
332 * trampoline version numbers are coordinated with machine-
333 * dependent code in libc.
337 tf->tf_r1 = (register_t)&fp->sf_si;
338 tf->tf_r2 = (register_t)&fp->sf_uc;
340 /* the trampoline uses r5 as the uc address */
341 tf->tf_r5 = (register_t)&fp->sf_uc;
342 tf->tf_pc = (register_t)catcher;
343 tf->tf_usr_sp = (register_t)fp;
344 sysent = p->p_sysent;
345 if (sysent->sv_sigcode_base != 0)
346 tf->tf_usr_lr = (register_t)sysent->sv_sigcode_base;
348 tf->tf_usr_lr = (register_t)(sysent->sv_psstrings -
349 *(sysent->sv_szsigcode));
350 /* Set the mode to enter in the signal handler */
352 if ((register_t)catcher & 1)
353 tf->tf_spsr |= PSR_T;
355 tf->tf_spsr &= ~PSR_T;
358 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr,
362 mtx_lock(&psp->ps_mtx);
365 struct kva_md_info kmi;
370 * Initialize the vector page, and select whether or not to
371 * relocate the vectors.
373 * NOTE: We expect the vector page to be mapped at its expected
377 extern unsigned int page0[], page0_data[];
379 arm_vector_init(vm_offset_t va, int which)
381 unsigned int *vectors = (int *) va;
382 unsigned int *vectors_data = vectors + (page0_data - page0);
386 * Loop through the vectors we're taking over, and copy the
387 * vector's insn and data word.
389 for (vec = 0; vec < ARM_NVEC; vec++) {
390 if ((which & (1 << vec)) == 0) {
391 /* Don't want to take over this vector. */
394 vectors[vec] = page0[vec];
395 vectors_data[vec] = page0_data[vec];
398 /* Now sync the vectors. */
399 cpu_icache_sync_range(va, (ARM_NVEC * 2) * sizeof(u_int));
403 if (va == ARM_VECTORS_HIGH) {
405 * Assume the MD caller knows what it's doing here, and
406 * really does want the vector page relocated.
408 * Note: This has to be done here (and not just in
409 * cpu_setup()) because the vector page needs to be
410 * accessible *before* cpu_startup() is called.
413 * NOTE: If the CPU control register is not readable,
414 * this will totally fail! We'll just assume that
415 * any system that has high vector support has a
416 * readable CPU control register, for now. If we
417 * ever encounter one that does not, we'll have to
420 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC);
425 cpu_startup(void *dummy)
427 struct pcb *pcb = thread0.td_pcb;
428 const unsigned int mbyte = 1024 * 1024;
429 #ifdef ARM_TP_ADDRESS
430 #ifndef ARM_CACHE_LOCK_ENABLE
437 vm_ksubmap_init(&kmi);
440 * Display the RAM layout.
442 printf("real memory = %ju (%ju MB)\n",
443 (uintmax_t)arm32_ptob(realmem),
444 (uintmax_t)arm32_ptob(realmem) / mbyte);
445 printf("avail memory = %ju (%ju MB)\n",
446 (uintmax_t)arm32_ptob(vm_cnt.v_free_count),
447 (uintmax_t)arm32_ptob(vm_cnt.v_free_count) / mbyte);
449 arm_physmem_print_tables();
450 arm_devmap_print_table();
454 vm_pager_bufferinit();
455 pcb->pcb_regs.sf_sp = (u_int)thread0.td_kstack +
456 USPACE_SVC_STACK_TOP;
457 pmap_set_pcb_pagedir(pmap_kernel(), pcb);
459 vector_page_setprot(VM_PROT_READ);
462 #ifdef ARM_TP_ADDRESS
463 #ifdef ARM_CACHE_LOCK_ENABLE
464 pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS);
465 arm_lock_cache_line(ARM_TP_ADDRESS);
467 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO);
468 pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m));
470 *(uint32_t *)ARM_RAS_START = 0;
471 *(uint32_t *)ARM_RAS_END = 0xffffffff;
475 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
478 * Flush the D-cache for non-DMA I/O so that the I-cache can
479 * be made coherent later.
482 cpu_flush_dcache(void *ptr, size_t len)
485 cpu_dcache_wb_range((uintptr_t)ptr, len);
487 cpu_l2cache_wb_range((uintptr_t)vtophys(ptr), len);
489 cpu_l2cache_wb_range((uintptr_t)ptr, len);
493 /* Get current clock frequency for the given cpu id. */
495 cpu_est_clockrate(int cpu_id, uint64_t *rate)
505 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", busy, curcpu);
507 #ifndef NO_EVENTTIMERS
511 if (!sched_runnable())
513 #ifndef NO_EVENTTIMERS
518 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", busy, curcpu);
522 cpu_idle_wakeup(int cpu)
529 * Most ARM platforms don't need to do anything special to init their clocks
530 * (they get intialized during normal device attachment), and by not defining a
531 * cpu_initclocks() function they get this generic one. Any platform that needs
532 * to do something special can just provide their own implementation, which will
533 * override this one due to the weak linkage.
536 arm_generic_initclocks(void)
539 #ifndef NO_EVENTTIMERS
541 if (PCPU_GET(cpuid) == 0)
542 cpu_initclocks_bsp();
546 cpu_initclocks_bsp();
550 __weak_reference(arm_generic_initclocks, cpu_initclocks);
553 fill_regs(struct thread *td, struct reg *regs)
555 struct trapframe *tf = td->td_frame;
556 bcopy(&tf->tf_r0, regs->r, sizeof(regs->r));
557 regs->r_sp = tf->tf_usr_sp;
558 regs->r_lr = tf->tf_usr_lr;
559 regs->r_pc = tf->tf_pc;
560 regs->r_cpsr = tf->tf_spsr;
564 fill_fpregs(struct thread *td, struct fpreg *regs)
566 bzero(regs, sizeof(*regs));
571 set_regs(struct thread *td, struct reg *regs)
573 struct trapframe *tf = td->td_frame;
575 bcopy(regs->r, &tf->tf_r0, sizeof(regs->r));
576 tf->tf_usr_sp = regs->r_sp;
577 tf->tf_usr_lr = regs->r_lr;
578 tf->tf_pc = regs->r_pc;
579 tf->tf_spsr &= ~PSR_FLAGS;
580 tf->tf_spsr |= regs->r_cpsr & PSR_FLAGS;
585 set_fpregs(struct thread *td, struct fpreg *regs)
591 fill_dbregs(struct thread *td, struct dbreg *regs)
596 set_dbregs(struct thread *td, struct dbreg *regs)
603 ptrace_read_int(struct thread *td, vm_offset_t addr, uint32_t *v)
606 if (proc_readmem(td, td->td_proc, addr, v, sizeof(*v)) != sizeof(*v))
612 ptrace_write_int(struct thread *td, vm_offset_t addr, uint32_t v)
615 if (proc_writemem(td, td->td_proc, addr, &v, sizeof(v)) != sizeof(v))
621 ptrace_get_usr_reg(void *cookie, int reg)
624 struct thread *td = cookie;
626 KASSERT(((reg >= 0) && (reg <= ARM_REG_NUM_PC)),
627 ("reg is outside range"));
631 ret = td->td_frame->tf_pc;
634 ret = td->td_frame->tf_usr_lr;
637 ret = td->td_frame->tf_usr_sp;
640 ret = *((register_t*)&td->td_frame->tf_r0 + reg);
648 ptrace_get_usr_int(void* cookie, vm_offset_t offset, u_int* val)
650 struct thread *td = cookie;
653 error = ptrace_read_int(td, offset, val);
659 * This function parses current instruction opcode and decodes
660 * any possible jump (change in PC) which might occur after
661 * the instruction is executed.
663 * @param td Thread structure of analysed task
664 * @param cur_instr Currently executed instruction
665 * @param alt_next_address Pointer to the variable where
666 * the destination address of the
667 * jump instruction shall be stored.
669 * @return <0> when jump is possible
673 ptrace_get_alternative_next(struct thread *td, uint32_t cur_instr,
674 uint32_t *alt_next_address)
678 if (inst_branch(cur_instr) || inst_call(cur_instr) ||
679 inst_return(cur_instr)) {
680 error = arm_predict_branch(td, cur_instr, td->td_frame->tf_pc,
681 alt_next_address, ptrace_get_usr_reg, ptrace_get_usr_int);
690 ptrace_single_step(struct thread *td)
693 int error, error_alt;
694 uint32_t cur_instr, alt_next = 0;
696 /* TODO: This needs to be updated for Thumb-2 */
697 if ((td->td_frame->tf_spsr & PSR_T) != 0)
700 KASSERT(td->td_md.md_ptrace_instr == 0,
701 ("Didn't clear single step"));
702 KASSERT(td->td_md.md_ptrace_instr_alt == 0,
703 ("Didn't clear alternative single step"));
707 error = ptrace_read_int(td, td->td_frame->tf_pc,
712 error = ptrace_read_int(td, td->td_frame->tf_pc + INSN_SIZE,
713 &td->td_md.md_ptrace_instr);
715 error = ptrace_write_int(td, td->td_frame->tf_pc + INSN_SIZE,
718 td->td_md.md_ptrace_instr = 0;
720 td->td_md.md_ptrace_addr = td->td_frame->tf_pc +
725 error_alt = ptrace_get_alternative_next(td, cur_instr, &alt_next);
726 if (error_alt == 0) {
727 error_alt = ptrace_read_int(td, alt_next,
728 &td->td_md.md_ptrace_instr_alt);
730 td->td_md.md_ptrace_instr_alt = 0;
732 error_alt = ptrace_write_int(td, alt_next,
735 td->td_md.md_ptrace_instr_alt = 0;
737 td->td_md.md_ptrace_addr_alt = alt_next;
743 return ((error != 0) && (error_alt != 0));
747 ptrace_clear_single_step(struct thread *td)
751 /* TODO: This needs to be updated for Thumb-2 */
752 if ((td->td_frame->tf_spsr & PSR_T) != 0)
755 if (td->td_md.md_ptrace_instr != 0) {
758 ptrace_write_int(td, td->td_md.md_ptrace_addr,
759 td->td_md.md_ptrace_instr);
761 td->td_md.md_ptrace_instr = 0;
764 if (td->td_md.md_ptrace_instr_alt != 0) {
767 ptrace_write_int(td, td->td_md.md_ptrace_addr_alt,
768 td->td_md.md_ptrace_instr_alt);
770 td->td_md.md_ptrace_instr_alt = 0;
777 ptrace_set_pc(struct thread *td, unsigned long addr)
779 td->td_frame->tf_pc = addr;
784 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
795 if (td->td_md.md_spinlock_count == 0) {
796 cspr = disable_interrupts(PSR_I | PSR_F);
797 td->td_md.md_spinlock_count = 1;
798 td->td_md.md_saved_cspr = cspr;
800 td->td_md.md_spinlock_count++;
812 cspr = td->td_md.md_saved_cspr;
813 td->td_md.md_spinlock_count--;
814 if (td->td_md.md_spinlock_count == 0)
815 restore_interrupts(cspr);
819 * Clear registers on exec
822 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
824 struct trapframe *tf = td->td_frame;
826 memset(tf, 0, sizeof(*tf));
827 tf->tf_usr_sp = stack;
828 tf->tf_usr_lr = imgp->entry_addr;
829 tf->tf_svc_lr = 0x77777777;
830 tf->tf_pc = imgp->entry_addr;
831 tf->tf_spsr = PSR_USR32_MODE;
835 * Get machine context.
838 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret)
840 struct trapframe *tf = td->td_frame;
841 __greg_t *gr = mcp->__gregs;
843 if (clear_ret & GET_MC_CLEAR_RET) {
845 gr[_REG_CPSR] = tf->tf_spsr & ~PSR_C;
847 gr[_REG_R0] = tf->tf_r0;
848 gr[_REG_CPSR] = tf->tf_spsr;
850 gr[_REG_R1] = tf->tf_r1;
851 gr[_REG_R2] = tf->tf_r2;
852 gr[_REG_R3] = tf->tf_r3;
853 gr[_REG_R4] = tf->tf_r4;
854 gr[_REG_R5] = tf->tf_r5;
855 gr[_REG_R6] = tf->tf_r6;
856 gr[_REG_R7] = tf->tf_r7;
857 gr[_REG_R8] = tf->tf_r8;
858 gr[_REG_R9] = tf->tf_r9;
859 gr[_REG_R10] = tf->tf_r10;
860 gr[_REG_R11] = tf->tf_r11;
861 gr[_REG_R12] = tf->tf_r12;
862 gr[_REG_SP] = tf->tf_usr_sp;
863 gr[_REG_LR] = tf->tf_usr_lr;
864 gr[_REG_PC] = tf->tf_pc;
870 * Set machine context.
872 * However, we don't set any but the user modifiable flags, and we won't
873 * touch the cs selector.
876 set_mcontext(struct thread *td, mcontext_t *mcp)
878 struct trapframe *tf = td->td_frame;
879 const __greg_t *gr = mcp->__gregs;
881 tf->tf_r0 = gr[_REG_R0];
882 tf->tf_r1 = gr[_REG_R1];
883 tf->tf_r2 = gr[_REG_R2];
884 tf->tf_r3 = gr[_REG_R3];
885 tf->tf_r4 = gr[_REG_R4];
886 tf->tf_r5 = gr[_REG_R5];
887 tf->tf_r6 = gr[_REG_R6];
888 tf->tf_r7 = gr[_REG_R7];
889 tf->tf_r8 = gr[_REG_R8];
890 tf->tf_r9 = gr[_REG_R9];
891 tf->tf_r10 = gr[_REG_R10];
892 tf->tf_r11 = gr[_REG_R11];
893 tf->tf_r12 = gr[_REG_R12];
894 tf->tf_usr_sp = gr[_REG_SP];
895 tf->tf_usr_lr = gr[_REG_LR];
896 tf->tf_pc = gr[_REG_PC];
897 tf->tf_spsr = gr[_REG_CPSR];
906 sys_sigreturn(td, uap)
908 struct sigreturn_args /* {
909 const struct __ucontext *sigcntxp;
917 if (copyin(uap->sigcntxp, &uc, sizeof(uc)))
920 * Make sure the processor mode has not been tampered with and
921 * interrupts have not been disabled.
923 spsr = uc.uc_mcontext.__gregs[_REG_CPSR];
924 if ((spsr & PSR_MODE) != PSR_USR32_MODE ||
925 (spsr & (PSR_I | PSR_F)) != 0)
927 /* Restore register context. */
928 set_mcontext(td, &uc.uc_mcontext);
930 /* Restore signal mask. */
931 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
933 return (EJUSTRETURN);
938 * Construct a PCB from a trapframe. This is called from kdb_trap() where
939 * we want to start a backtrace from the function that caused us to enter
940 * the debugger. We have the context in the trapframe, but base the trace
941 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
942 * enough for a backtrace.
945 makectx(struct trapframe *tf, struct pcb *pcb)
947 pcb->pcb_regs.sf_r4 = tf->tf_r4;
948 pcb->pcb_regs.sf_r5 = tf->tf_r5;
949 pcb->pcb_regs.sf_r6 = tf->tf_r6;
950 pcb->pcb_regs.sf_r7 = tf->tf_r7;
951 pcb->pcb_regs.sf_r8 = tf->tf_r8;
952 pcb->pcb_regs.sf_r9 = tf->tf_r9;
953 pcb->pcb_regs.sf_r10 = tf->tf_r10;
954 pcb->pcb_regs.sf_r11 = tf->tf_r11;
955 pcb->pcb_regs.sf_r12 = tf->tf_r12;
956 pcb->pcb_regs.sf_pc = tf->tf_pc;
957 pcb->pcb_regs.sf_lr = tf->tf_usr_lr;
958 pcb->pcb_regs.sf_sp = tf->tf_usr_sp;
962 * Fake up a boot descriptor table
965 fake_preload_metadata(struct arm_boot_params *abp __unused)
968 vm_offset_t zstart = 0, zend = 0;
970 vm_offset_t lastaddr;
972 static uint32_t fake_preload[35];
974 fake_preload[i++] = MODINFO_NAME;
975 fake_preload[i++] = strlen("kernel") + 1;
976 strcpy((char*)&fake_preload[i++], "kernel");
978 fake_preload[i++] = MODINFO_TYPE;
979 fake_preload[i++] = strlen("elf kernel") + 1;
980 strcpy((char*)&fake_preload[i++], "elf kernel");
982 fake_preload[i++] = MODINFO_ADDR;
983 fake_preload[i++] = sizeof(vm_offset_t);
984 fake_preload[i++] = KERNVIRTADDR;
985 fake_preload[i++] = MODINFO_SIZE;
986 fake_preload[i++] = sizeof(uint32_t);
987 fake_preload[i++] = (uint32_t)&end - KERNVIRTADDR;
989 if (*(uint32_t *)KERNVIRTADDR == MAGIC_TRAMP_NUMBER) {
990 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_SSYM;
991 fake_preload[i++] = sizeof(vm_offset_t);
992 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 4);
993 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_ESYM;
994 fake_preload[i++] = sizeof(vm_offset_t);
995 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 8);
996 lastaddr = *(uint32_t *)(KERNVIRTADDR + 8);
998 zstart = *(uint32_t *)(KERNVIRTADDR + 4);
999 db_fetch_ksymtab(zstart, zend);
1002 lastaddr = (vm_offset_t)&end;
1003 fake_preload[i++] = 0;
1004 fake_preload[i] = 0;
1005 preload_metadata = (void *)fake_preload;
1007 init_static_kenv(NULL, 0);
1016 set_curthread(&thread0);
1018 pcpu_init(pcpup, 0, sizeof(struct pcpu));
1019 PCPU_SET(curthread, &thread0);
1022 #if defined(LINUX_BOOT_ABI)
1024 linux_parse_boot_param(struct arm_boot_params *abp)
1026 struct arm_lbabi_tag *walker;
1031 * Linux boot ABI: r0 = 0, r1 is the board type (!= 0) and r2
1032 * is atags or dtb pointer. If all of these aren't satisfied,
1035 if (!(abp->abp_r0 == 0 && abp->abp_r1 != 0 && abp->abp_r2 != 0))
1038 board_id = abp->abp_r1;
1039 walker = (struct arm_lbabi_tag *)
1040 (abp->abp_r2 + KERNVIRTADDR - abp->abp_physaddr);
1042 /* xxx - Need to also look for binary device tree */
1043 if (ATAG_TAG(walker) != ATAG_CORE)
1047 while (ATAG_TAG(walker) != ATAG_NONE) {
1048 switch (ATAG_TAG(walker)) {
1052 arm_physmem_hardware_region(walker->u.tag_mem.start,
1053 walker->u.tag_mem.size);
1058 serial = walker->u.tag_sn.low |
1059 ((uint64_t)walker->u.tag_sn.high << 32);
1060 board_set_serial(serial);
1063 revision = walker->u.tag_rev.rev;
1064 board_set_revision(revision);
1067 /* XXX open question: Parse this for boothowto? */
1068 bcopy(walker->u.tag_cmd.command, linux_command_line,
1074 walker = ATAG_NEXT(walker);
1077 /* Save a copy for later */
1078 bcopy(atag_list, atags,
1079 (char *)walker - (char *)atag_list + ATAG_SIZE(walker));
1081 init_static_kenv(NULL, 0);
1083 return fake_preload_metadata(abp);
1087 #if defined(FREEBSD_BOOT_LOADER)
1089 freebsd_parse_boot_param(struct arm_boot_params *abp)
1091 vm_offset_t lastaddr = 0;
1095 vm_offset_t ksym_start;
1096 vm_offset_t ksym_end;
1100 * Mask metadata pointer: it is supposed to be on page boundary. If
1101 * the first argument (mdp) doesn't point to a valid address the
1102 * bootloader must have passed us something else than the metadata
1103 * ptr, so we give up. Also give up if we cannot find metadta section
1104 * the loader creates that we get all this data out of.
1107 if ((mdp = (void *)(abp->abp_r0 & ~PAGE_MASK)) == NULL)
1109 preload_metadata = mdp;
1110 kmdp = preload_search_by_type("elf kernel");
1114 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1115 loader_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *);
1116 init_static_kenv(loader_envp, 0);
1117 lastaddr = MD_FETCH(kmdp, MODINFOMD_KERNEND, vm_offset_t);
1119 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1120 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1121 db_fetch_ksymtab(ksym_start, ksym_end);
1128 default_parse_boot_param(struct arm_boot_params *abp)
1130 vm_offset_t lastaddr;
1132 #if defined(LINUX_BOOT_ABI)
1133 if ((lastaddr = linux_parse_boot_param(abp)) != 0)
1136 #if defined(FREEBSD_BOOT_LOADER)
1137 if ((lastaddr = freebsd_parse_boot_param(abp)) != 0)
1140 /* Fall back to hardcoded metadata. */
1141 lastaddr = fake_preload_metadata(abp);
1147 * Stub version of the boot parameter parsing routine. We are
1148 * called early in initarm, before even VM has been initialized.
1149 * This routine needs to preserve any data that the boot loader
1150 * has passed in before the kernel starts to grow past the end
1151 * of the BSS, traditionally the place boot-loaders put this data.
1153 * Since this is called so early, things that depend on the vm system
1154 * being setup (including access to some SoC's serial ports), about
1155 * all that can be done in this routine is to copy the arguments.
1157 * This is the default boot parameter parsing routine. Individual
1158 * kernels/boards can override this weak function with one of their
1159 * own. We just fake metadata...
1161 __weak_reference(default_parse_boot_param, parse_boot_param);
1167 init_proc0(vm_offset_t kstack)
1169 proc_linkup0(&proc0, &thread0);
1170 thread0.td_kstack = kstack;
1171 thread0.td_pcb = (struct pcb *)
1172 (thread0.td_kstack + kstack_pages * PAGE_SIZE) - 1;
1173 thread0.td_pcb->pcb_flags = 0;
1174 thread0.td_pcb->pcb_vfpcpu = -1;
1175 thread0.td_pcb->pcb_vfpstate.fpscr = VFPSCR_DN;
1176 thread0.td_frame = &proc0_tf;
1177 pcpup->pc_curpcb = thread0.td_pcb;
1181 arm_predict_branch(void *cookie, u_int insn, register_t pc, register_t *new_pc,
1182 u_int (*fetch_reg)(void*, int), u_int (*read_int)(void*, vm_offset_t, u_int*))
1184 u_int addr, nregs, offset = 0;
1187 switch ((insn >> 24) & 0xf) {
1188 case 0x2: /* add pc, reg1, #value */
1189 case 0x0: /* add pc, reg1, reg2, lsl #offset */
1190 addr = fetch_reg(cookie, (insn >> 16) & 0xf);
1191 if (((insn >> 16) & 0xf) == 15)
1193 if (insn & 0x0200000) {
1194 offset = (insn >> 7) & 0x1e;
1195 offset = (insn & 0xff) << (32 - offset) |
1196 (insn & 0xff) >> offset;
1199 offset = fetch_reg(cookie, insn & 0x0f);
1200 if ((insn & 0x0000ff0) != 0x00000000) {
1202 nregs = fetch_reg(cookie,
1205 nregs = (insn >> 7) & 0x1f;
1206 switch ((insn >> 5) & 3) {
1209 offset = offset << nregs;
1213 offset = offset >> nregs;
1220 *new_pc = addr + offset;
1225 case 0xa: /* b ... */
1226 case 0xb: /* bl ... */
1227 addr = ((insn << 2) & 0x03ffffff);
1228 if (addr & 0x02000000)
1230 *new_pc = (pc + 8 + addr);
1232 case 0x7: /* ldr pc, [pc, reg, lsl #2] */
1233 addr = fetch_reg(cookie, insn & 0xf);
1234 addr = pc + 8 + (addr << 2);
1235 error = read_int(cookie, addr, &addr);
1238 case 0x1: /* mov pc, reg */
1239 *new_pc = fetch_reg(cookie, insn & 0xf);
1242 case 0x5: /* ldr pc, [reg] */
1243 addr = fetch_reg(cookie, (insn >> 16) & 0xf);
1244 /* ldr pc, [reg, #offset] */
1245 if (insn & (1 << 24))
1246 offset = insn & 0xfff;
1247 if (insn & 0x00800000)
1251 error = read_int(cookie, addr, &addr);
1255 case 0x8: /* ldmxx reg, {..., pc} */
1257 addr = fetch_reg(cookie, (insn >> 16) & 0xf);
1258 nregs = (insn & 0x5555) + ((insn >> 1) & 0x5555);
1259 nregs = (nregs & 0x3333) + ((nregs >> 2) & 0x3333);
1260 nregs = (nregs + (nregs >> 4)) & 0x0f0f;
1261 nregs = (nregs + (nregs >> 8)) & 0x001f;
1262 switch ((insn >> 23) & 0x3) {
1263 case 0x0: /* ldmda */
1266 case 0x1: /* ldmia */
1267 addr = addr + 0 + ((nregs - 1) << 2);
1269 case 0x2: /* ldmdb */
1272 case 0x3: /* ldmib */
1273 addr = addr + 4 + ((nregs - 1) << 2);
1276 error = read_int(cookie, addr, &addr);
1287 set_stackptrs(int cpu)
1290 set_stackptr(PSR_IRQ32_MODE,
1291 irqstack + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1292 set_stackptr(PSR_ABT32_MODE,
1293 abtstack + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1294 set_stackptr(PSR_UND32_MODE,
1295 undstack + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1299 set_stackptrs(int cpu)
1302 set_stackptr(PSR_IRQ32_MODE,
1303 irqstack.pv_va + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1304 set_stackptr(PSR_ABT32_MODE,
1305 abtstack.pv_va + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1306 set_stackptr(PSR_UND32_MODE,
1307 undstack.pv_va + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1312 #define efi_next_descriptor(ptr, size) \
1313 ((struct efi_md *)(((uint8_t *) ptr) + size))
1316 add_efi_map_entries(struct efi_map_header *efihdr, struct mem_region *mr,
1317 int *mrcnt, uint32_t *memsize)
1319 struct efi_md *map, *p;
1321 size_t efisz, memory_size;
1324 static const char *types[] = {
1330 "RuntimeServicesCode",
1331 "RuntimeServicesData",
1332 "ConventionalMemory",
1334 "ACPIReclaimMemory",
1337 "MemoryMappedIOPortSpace",
1345 * Memory map data provided by UEFI via the GetMemoryMap
1346 * Boot Services API.
1348 efisz = roundup2(sizeof(struct efi_map_header), 0x10);
1349 map = (struct efi_md *)((uint8_t *)efihdr + efisz);
1351 if (efihdr->descriptor_size == 0)
1353 ndesc = efihdr->memory_size / efihdr->descriptor_size;
1355 if (boothowto & RB_VERBOSE)
1356 printf("%23s %12s %12s %8s %4s\n",
1357 "Type", "Physical", "Virtual", "#Pages", "Attr");
1360 for (i = 0, j = 0, p = map; i < ndesc; i++,
1361 p = efi_next_descriptor(p, efihdr->descriptor_size)) {
1362 if (boothowto & RB_VERBOSE) {
1363 if (p->md_type <= EFI_MD_TYPE_PALCODE)
1364 type = types[p->md_type];
1367 printf("%23s %012llx %12p %08llx ", type, p->md_phys,
1368 p->md_virt, p->md_pages);
1369 if (p->md_attr & EFI_MD_ATTR_UC)
1371 if (p->md_attr & EFI_MD_ATTR_WC)
1373 if (p->md_attr & EFI_MD_ATTR_WT)
1375 if (p->md_attr & EFI_MD_ATTR_WB)
1377 if (p->md_attr & EFI_MD_ATTR_UCE)
1379 if (p->md_attr & EFI_MD_ATTR_WP)
1381 if (p->md_attr & EFI_MD_ATTR_RP)
1383 if (p->md_attr & EFI_MD_ATTR_XP)
1385 if (p->md_attr & EFI_MD_ATTR_RT)
1390 switch (p->md_type) {
1391 case EFI_MD_TYPE_CODE:
1392 case EFI_MD_TYPE_DATA:
1393 case EFI_MD_TYPE_BS_CODE:
1394 case EFI_MD_TYPE_BS_DATA:
1395 case EFI_MD_TYPE_FREE:
1397 * We're allowed to use any entry with these types.
1405 if (j >= FDT_MEM_REGIONS)
1408 mr[j].mr_start = p->md_phys;
1409 mr[j].mr_size = p->md_pages * PAGE_SIZE;
1410 memory_size += mr[j].mr_size;
1414 *memsize = memory_size;
1438 debugf("loader passed (static) kenv:\n");
1439 if (loader_envp == NULL) {
1440 debugf(" no env, null ptr\n");
1443 debugf(" loader_envp = 0x%08x\n", (uint32_t)loader_envp);
1445 for (cp = loader_envp; cp != NULL; cp = kenv_next(cp))
1446 debugf(" %x %s\n", (uint32_t)cp, cp);
1449 #ifndef ARM_NEW_PMAP
1451 initarm(struct arm_boot_params *abp)
1453 struct mem_region mem_regions[FDT_MEM_REGIONS];
1454 struct pv_addr kernel_l1pt;
1455 struct pv_addr dpcpu;
1456 vm_offset_t dtbp, freemempos, l2_start, lastaddr;
1457 uint32_t memsize, l2size;
1461 int i, j, err_devmap, mem_regions_sz;
1463 lastaddr = parse_boot_param(abp);
1464 arm_physmem_kernaddr = abp->abp_physaddr;
1472 * Find the dtb passed in by the boot loader.
1474 kmdp = preload_search_by_type("elf kernel");
1476 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
1478 dtbp = (vm_offset_t)NULL;
1480 #if defined(FDT_DTB_STATIC)
1482 * In case the device tree blob was not retrieved (from metadata) try
1483 * to use the statically embedded one.
1485 if (dtbp == (vm_offset_t)NULL)
1486 dtbp = (vm_offset_t)&fdt_static_dtb;
1489 if (OF_install(OFW_FDT, 0) == FALSE)
1490 panic("Cannot install FDT");
1492 if (OF_init((void *)dtbp) != 0)
1493 panic("OF_init failed with the found device tree");
1495 /* Grab physical memory regions information from device tree. */
1496 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz, &memsize) != 0)
1497 panic("Cannot get physical memory regions");
1498 arm_physmem_hardware_regions(mem_regions, mem_regions_sz);
1500 /* Grab reserved memory regions information from device tree. */
1501 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0)
1502 arm_physmem_exclude_regions(mem_regions, mem_regions_sz,
1503 EXFLAG_NODUMP | EXFLAG_NOALLOC);
1505 /* Platform-specific initialisation */
1506 platform_probe_and_attach();
1510 /* Do basic tuning, hz etc */
1513 /* Calculate number of L2 tables needed for mapping vm_page_array */
1514 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page);
1515 l2size = (l2size >> L1_S_SHIFT) + 1;
1518 * Add one table for end of kernel map, one for stacks, msgbuf and
1519 * L1 and L2 tables map and one for vectors map.
1523 /* Make it divisible by 4 */
1524 l2size = (l2size + 3) & ~3;
1526 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK;
1528 /* Define a macro to simplify memory allocation */
1529 #define valloc_pages(var, np) \
1530 alloc_pages((var).pv_va, (np)); \
1531 (var).pv_pa = (var).pv_va + (abp->abp_physaddr - KERNVIRTADDR);
1533 #define alloc_pages(var, np) \
1534 (var) = freemempos; \
1535 freemempos += (np * PAGE_SIZE); \
1536 memset((char *)(var), 0, ((np) * PAGE_SIZE));
1538 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
1539 freemempos += PAGE_SIZE;
1540 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
1542 for (i = 0, j = 0; i < l2size; ++i) {
1543 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
1544 valloc_pages(kernel_pt_table[i],
1545 L2_TABLE_SIZE / PAGE_SIZE);
1548 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va +
1549 L2_TABLE_SIZE_REAL * (i - j);
1550 kernel_pt_table[i].pv_pa =
1551 kernel_pt_table[i].pv_va - KERNVIRTADDR +
1557 * Allocate a page for the system page mapped to 0x00000000
1558 * or 0xffff0000. This page will just contain the system vectors
1559 * and can be shared by all processes.
1561 valloc_pages(systempage, 1);
1563 /* Allocate dynamic per-cpu area. */
1564 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
1565 dpcpu_init((void *)dpcpu.pv_va, 0);
1567 /* Allocate stacks for all modes */
1568 valloc_pages(irqstack, IRQ_STACK_SIZE * MAXCPU);
1569 valloc_pages(abtstack, ABT_STACK_SIZE * MAXCPU);
1570 valloc_pages(undstack, UND_STACK_SIZE * MAXCPU);
1571 valloc_pages(kernelstack, kstack_pages * MAXCPU);
1572 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
1575 * Now we start construction of the L1 page table
1576 * We start by mapping the L2 page tables into the L1.
1577 * This means that we can replace L1 mappings later on if necessary
1579 l1pagetable = kernel_l1pt.pv_va;
1582 * Try to map as much as possible of kernel text and data using
1583 * 1MB section mapping and for the rest of initial kernel address
1584 * space use L2 coarse tables.
1586 * Link L2 tables for mapping remainder of kernel (modulo 1MB)
1587 * and kernel structures
1589 l2_start = lastaddr & ~(L1_S_OFFSET);
1590 for (i = 0 ; i < l2size - 1; i++)
1591 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE,
1592 &kernel_pt_table[i]);
1594 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE;
1596 /* Map kernel code and data */
1597 pmap_map_chunk(l1pagetable, KERNVIRTADDR, abp->abp_physaddr,
1598 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK,
1599 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
1601 /* Map L1 directory and allocated L2 page tables */
1602 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
1603 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
1605 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va,
1606 kernel_pt_table[0].pv_pa,
1607 L2_TABLE_SIZE_REAL * l2size,
1608 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
1610 /* Map allocated DPCPU, stacks and msgbuf */
1611 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa,
1612 freemempos - dpcpu.pv_va,
1613 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
1615 /* Link and map the vector page */
1616 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH,
1617 &kernel_pt_table[l2size - 1]);
1618 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
1619 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE);
1621 /* Establish static device mappings. */
1622 err_devmap = platform_devmap_init();
1623 arm_devmap_bootstrap(l1pagetable, NULL);
1624 vm_max_kernel_address = platform_lastaddr();
1626 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT);
1627 pmap_pa = kernel_l1pt.pv_pa;
1628 setttb(kernel_l1pt.pv_pa);
1630 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2));
1633 * Now that proper page tables are installed, call cpu_setup() to enable
1634 * instruction and data caches and other chip-specific features.
1639 * Only after the SOC registers block is mapped we can perform device
1640 * tree fixups, as they may attempt to read parameters from hardware.
1642 OF_interpret("perform-fixup", 0);
1644 platform_gpio_init();
1648 debugf("initarm: console initialized\n");
1649 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp);
1650 debugf(" boothowto = 0x%08x\n", boothowto);
1651 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
1654 env = kern_getenv("kernelname");
1656 strlcpy(kernelname, env, sizeof(kernelname));
1660 if (err_devmap != 0)
1661 printf("WARNING: could not fully configure devmap, error=%d\n",
1664 platform_late_init();
1667 * Pages were allocated during the secondary bootstrap for the
1668 * stacks for different CPU modes.
1669 * We must now set the r13 registers in the different CPU modes to
1670 * point to these stacks.
1671 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
1672 * of the stack memory.
1674 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE);
1679 * We must now clean the cache again....
1680 * Cleaning may be done by reading new data to displace any
1681 * dirty data in the cache. This will have happened in setttb()
1682 * but since we are boot strapping the addresses used for the read
1683 * may have just been remapped and thus the cache could be out
1684 * of sync. A re-clean after the switch will cure this.
1685 * After booting there are no gross relocations of the kernel thus
1686 * this problem will not occur after initarm().
1688 cpu_idcache_wbinv_all();
1692 init_proc0(kernelstack.pv_va);
1694 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
1695 pmap_bootstrap(freemempos, &kernel_l1pt);
1696 msgbufp = (void *)msgbufpv.pv_va;
1697 msgbufinit(msgbufp, msgbufsize);
1701 * Exclude the kernel (and all the things we allocated which immediately
1702 * follow the kernel) from the VM allocation pool but not from crash
1703 * dumps. virtual_avail is a global variable which tracks the kva we've
1704 * "allocated" while setting up pmaps.
1706 * Prepare the list of physical memory available to the vm subsystem.
1708 arm_physmem_exclude_region(abp->abp_physaddr,
1709 (virtual_avail - KERNVIRTADDR), EXFLAG_NOALLOC);
1710 arm_physmem_init_kernel_globals();
1712 init_param2(physmem);
1715 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
1716 sizeof(struct pcb)));
1718 #else /* !ARM_NEW_PMAP */
1720 initarm(struct arm_boot_params *abp)
1722 struct mem_region mem_regions[FDT_MEM_REGIONS];
1723 vm_paddr_t lastaddr;
1724 vm_offset_t dtbp, kernelstack, dpcpu;
1728 int err_devmap, mem_regions_sz;
1730 struct efi_map_header *efihdr;
1733 /* get last allocated physical address */
1734 arm_physmem_kernaddr = abp->abp_physaddr;
1735 lastaddr = parse_boot_param(abp) - KERNVIRTADDR + arm_physmem_kernaddr;
1742 * Find the dtb passed in by the boot loader.
1744 kmdp = preload_search_by_type("elf kernel");
1745 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
1746 #if defined(FDT_DTB_STATIC)
1748 * In case the device tree blob was not retrieved (from metadata) try
1749 * to use the statically embedded one.
1751 if (dtbp == (vm_offset_t)NULL)
1752 dtbp = (vm_offset_t)&fdt_static_dtb;
1755 if (OF_install(OFW_FDT, 0) == FALSE)
1756 panic("Cannot install FDT");
1758 if (OF_init((void *)dtbp) != 0)
1759 panic("OF_init failed with the found device tree");
1762 efihdr = (struct efi_map_header *)preload_search_info(kmdp,
1763 MODINFO_METADATA | MODINFOMD_EFI_MAP);
1764 if (efihdr != NULL) {
1765 add_efi_map_entries(efihdr, mem_regions, &mem_regions_sz,
1770 /* Grab physical memory regions information from device tree. */
1771 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz,
1773 panic("Cannot get physical memory regions");
1775 arm_physmem_hardware_regions(mem_regions, mem_regions_sz);
1777 /* Grab reserved memory regions information from device tree. */
1778 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0)
1779 arm_physmem_exclude_regions(mem_regions, mem_regions_sz,
1780 EXFLAG_NODUMP | EXFLAG_NOALLOC);
1783 * Set TEX remapping registers.
1784 * Setup kernel page tables and switch to kernel L1 page table.
1787 pmap_bootstrap_prepare(lastaddr);
1790 * Now that proper page tables are installed, call cpu_setup() to enable
1791 * instruction and data caches and other chip-specific features.
1795 /* Platform-specific initialisation */
1796 platform_probe_and_attach();
1799 /* Do basic tuning, hz etc */
1803 * Allocate a page for the system page mapped to 0xffff0000
1804 * This page will just contain the system vectors and can be
1805 * shared by all processes.
1807 systempage = pmap_preboot_get_pages(1);
1809 /* Map the vector page. */
1810 pmap_preboot_map_pages(systempage, ARM_VECTORS_HIGH, 1);
1811 if (virtual_end >= ARM_VECTORS_HIGH)
1812 virtual_end = ARM_VECTORS_HIGH - 1;
1814 /* Allocate dynamic per-cpu area. */
1815 dpcpu = pmap_preboot_get_vpages(DPCPU_SIZE / PAGE_SIZE);
1816 dpcpu_init((void *)dpcpu, 0);
1818 /* Allocate stacks for all modes */
1819 irqstack = pmap_preboot_get_vpages(IRQ_STACK_SIZE * MAXCPU);
1820 abtstack = pmap_preboot_get_vpages(ABT_STACK_SIZE * MAXCPU);
1821 undstack = pmap_preboot_get_vpages(UND_STACK_SIZE * MAXCPU );
1822 kernelstack = pmap_preboot_get_vpages(kstack_pages * MAXCPU);
1824 /* Allocate message buffer. */
1825 msgbufp = (void *)pmap_preboot_get_vpages(
1826 round_page(msgbufsize) / PAGE_SIZE);
1829 * Pages were allocated during the secondary bootstrap for the
1830 * stacks for different CPU modes.
1831 * We must now set the r13 registers in the different CPU modes to
1832 * point to these stacks.
1833 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
1834 * of the stack memory.
1839 /* Establish static device mappings. */
1840 err_devmap = platform_devmap_init();
1841 arm_devmap_bootstrap(0, NULL);
1842 vm_max_kernel_address = platform_lastaddr();
1845 * Only after the SOC registers block is mapped we can perform device
1846 * tree fixups, as they may attempt to read parameters from hardware.
1848 OF_interpret("perform-fixup", 0);
1849 platform_gpio_init();
1852 debugf("initarm: console initialized\n");
1853 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp);
1854 debugf(" boothowto = 0x%08x\n", boothowto);
1855 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
1856 debugf(" lastaddr1: 0x%08x\n", lastaddr);
1859 env = kern_getenv("kernelname");
1861 strlcpy(kernelname, env, sizeof(kernelname));
1863 if (err_devmap != 0)
1864 printf("WARNING: could not fully configure devmap, error=%d\n",
1867 platform_late_init();
1870 * We must now clean the cache again....
1871 * Cleaning may be done by reading new data to displace any
1872 * dirty data in the cache. This will have happened in setttb()
1873 * but since we are boot strapping the addresses used for the read
1874 * may have just been remapped and thus the cache could be out
1875 * of sync. A re-clean after the switch will cure this.
1876 * After booting there are no gross relocations of the kernel thus
1877 * this problem will not occur after initarm().
1879 /* Set stack for exception handlers */
1881 init_proc0(kernelstack);
1882 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
1883 enable_interrupts(PSR_A);
1886 /* Exclude the kernel (and all the things we allocated which immediately
1887 * follow the kernel) from the VM allocation pool but not from crash
1888 * dumps. virtual_avail is a global variable which tracks the kva we've
1889 * "allocated" while setting up pmaps.
1891 * Prepare the list of physical memory available to the vm subsystem.
1893 arm_physmem_exclude_region(abp->abp_physaddr,
1894 pmap_preboot_get_pages(0) - abp->abp_physaddr, EXFLAG_NOALLOC);
1895 arm_physmem_init_kernel_globals();
1897 init_param2(physmem);
1898 /* Init message buffer. */
1899 msgbufinit(msgbufp, msgbufsize);
1901 return ((void *)STACKALIGN(thread0.td_pcb));
1905 #endif /* !ARM_NEW_PMAP */
1908 uint32_t (*arm_cpu_fill_vdso_timehands)(struct vdso_timehands *,
1909 struct timecounter *);
1912 cpu_fill_vdso_timehands(struct vdso_timehands *vdso_th, struct timecounter *tc)
1915 return (arm_cpu_fill_vdso_timehands != NULL ?
1916 arm_cpu_fill_vdso_timehands(vdso_th, tc) : 0);