1 /* $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $ */
4 * SPDX-License-Identifier: BSD-4-Clause
6 * Copyright (c) 2004 Olivier Houchard
7 * Copyright (c) 1994-1998 Mark Brinicombe.
8 * Copyright (c) 1994 Brini.
11 * This code is derived from software written for Brini by Mark Brinicombe
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
21 * 3. All advertising materials mentioning features or use of this software
22 * must display the following acknowledgement:
23 * This product includes software developed by Mark Brinicombe
24 * for the NetBSD Project.
25 * 4. The name of the company nor the name of the author may be used to
26 * endorse or promote products derived from this software without specific
27 * prior written permission.
29 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
31 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
32 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
41 * Machine dependent functions for kernel setup
44 * Updated : 18/04/01 updated for new wscons
48 #include "opt_kstack_pages.h"
49 #include "opt_platform.h"
50 #include "opt_sched.h"
51 #include "opt_timer.h"
53 #include <sys/cdefs.h>
54 __FBSDID("$FreeBSD$");
56 #include <sys/param.h>
61 #include <sys/devmap.h>
63 #include <sys/imgact.h>
65 #include <sys/kernel.h>
67 #include <sys/linker.h>
68 #include <sys/msgbuf.h>
69 #include <sys/reboot.h>
70 #include <sys/rwlock.h>
71 #include <sys/sched.h>
72 #include <sys/syscallsubr.h>
73 #include <sys/sysent.h>
74 #include <sys/sysproto.h>
75 #include <sys/vmmeter.h>
77 #include <vm/vm_object.h>
78 #include <vm/vm_page.h>
79 #include <vm/vm_pager.h>
81 #include <machine/asm.h>
82 #include <machine/debug_monitor.h>
83 #include <machine/machdep.h>
84 #include <machine/metadata.h>
85 #include <machine/pcb.h>
86 #include <machine/physmem.h>
87 #include <machine/platform.h>
88 #include <machine/sysarch.h>
89 #include <machine/undefined.h>
90 #include <machine/vfp.h>
91 #include <machine/vmparam.h>
94 #include <dev/fdt/fdt_common.h>
95 #include <machine/ofw_machdep.h>
99 #define debugf(fmt, args...) printf(fmt, ##args)
101 #define debugf(fmt, args...)
104 #if defined(COMPAT_FREEBSD4) || defined(COMPAT_FREEBSD5) || \
105 defined(COMPAT_FREEBSD6) || defined(COMPAT_FREEBSD7) || \
106 defined(COMPAT_FREEBSD9)
107 #error FreeBSD/arm doesn't provide compatibility with releases prior to 10
110 #if __ARM_ARCH >= 6 && !defined(INTRNG)
111 #error armv6 requires INTRNG
115 #error FreeBSD requires ARMv5 or later
118 struct pcpu __pcpu[MAXCPU];
119 struct pcpu *pcpup = &__pcpu[0];
121 static struct trapframe proc0_tf;
122 uint32_t cpu_reset_address = 0;
124 vm_offset_t vector_page;
126 int (*_arm_memcpy)(void *, void *, int, int) = NULL;
127 int (*_arm_bzero)(void *, int, int) = NULL;
128 int _min_memcpy_size = 0;
129 int _min_bzero_size = 0;
136 vm_offset_t systempage;
137 vm_offset_t irqstack;
138 vm_offset_t undstack;
139 vm_offset_t abtstack;
142 * This is the number of L2 page tables required for covering max
143 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf,
144 * stacks etc.), uprounded to be divisible by 4.
146 #define KERNEL_PT_MAX 78
147 static struct pv_addr kernel_pt_table[KERNEL_PT_MAX];
148 struct pv_addr systempage;
149 static struct pv_addr msgbufpv;
150 struct pv_addr irqstack;
151 struct pv_addr undstack;
152 struct pv_addr abtstack;
153 static struct pv_addr kernelstack;
154 #endif /* __ARM_ARCH >= 6 */
158 static delay_func *delay_impl;
159 static void *delay_arg;
162 struct kva_md_info kmi;
167 * Initialize the vector page, and select whether or not to
168 * relocate the vectors.
170 * NOTE: We expect the vector page to be mapped at its expected
174 extern unsigned int page0[], page0_data[];
176 arm_vector_init(vm_offset_t va, int which)
178 unsigned int *vectors = (int *) va;
179 unsigned int *vectors_data = vectors + (page0_data - page0);
183 * Loop through the vectors we're taking over, and copy the
184 * vector's insn and data word.
186 for (vec = 0; vec < ARM_NVEC; vec++) {
187 if ((which & (1 << vec)) == 0) {
188 /* Don't want to take over this vector. */
191 vectors[vec] = page0[vec];
192 vectors_data[vec] = page0_data[vec];
195 /* Now sync the vectors. */
196 icache_sync(va, (ARM_NVEC * 2) * sizeof(u_int));
200 if (va == ARM_VECTORS_HIGH) {
202 * Enable high vectors in the system control reg (SCTLR).
204 * Assume the MD caller knows what it's doing here, and really
205 * does want the vector page relocated.
207 * Note: This has to be done here (and not just in
208 * cpu_setup()) because the vector page needs to be
209 * accessible *before* cpu_startup() is called.
212 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC);
218 cpu_startup(void *dummy)
220 struct pcb *pcb = thread0.td_pcb;
221 const unsigned int mbyte = 1024 * 1024;
222 #if __ARM_ARCH < 6 && !defined(ARM_CACHE_LOCK_ENABLE)
228 vm_ksubmap_init(&kmi);
231 * Display the RAM layout.
233 printf("real memory = %ju (%ju MB)\n",
234 (uintmax_t)arm32_ptob(realmem),
235 (uintmax_t)arm32_ptob(realmem) / mbyte);
236 printf("avail memory = %ju (%ju MB)\n",
237 (uintmax_t)arm32_ptob(vm_free_count()),
238 (uintmax_t)arm32_ptob(vm_free_count()) / mbyte);
240 arm_physmem_print_tables();
241 devmap_print_table();
245 vm_pager_bufferinit();
246 pcb->pcb_regs.sf_sp = (u_int)thread0.td_kstack +
247 USPACE_SVC_STACK_TOP;
248 pmap_set_pcb_pagedir(kernel_pmap, pcb);
250 vector_page_setprot(VM_PROT_READ);
252 #ifdef ARM_CACHE_LOCK_ENABLE
253 pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS);
254 arm_lock_cache_line(ARM_TP_ADDRESS);
256 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO);
257 pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m));
259 *(uint32_t *)ARM_RAS_START = 0;
260 *(uint32_t *)ARM_RAS_END = 0xffffffff;
264 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
267 * Flush the D-cache for non-DMA I/O so that the I-cache can
268 * be made coherent later.
271 cpu_flush_dcache(void *ptr, size_t len)
274 dcache_wb_poc((vm_offset_t)ptr, (vm_paddr_t)vtophys(ptr), len);
277 /* Get current clock frequency for the given cpu id. */
279 cpu_est_clockrate(int cpu_id, uint64_t *rate)
284 pc = pcpu_find(cpu_id);
285 if (pc == NULL || rate == NULL)
288 if (pc->pc_clock == 0)
291 *rate = pc->pc_clock;
303 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", busy, curcpu);
305 #ifndef NO_EVENTTIMERS
309 if (!sched_runnable())
311 #ifndef NO_EVENTTIMERS
316 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", busy, curcpu);
320 cpu_idle_wakeup(int cpu)
326 #ifdef NO_EVENTTIMERS
328 * Most ARM platforms don't need to do anything special to init their clocks
329 * (they get intialized during normal device attachment), and by not defining a
330 * cpu_initclocks() function they get this generic one. Any platform that needs
331 * to do something special can just provide their own implementation, which will
332 * override this one due to the weak linkage.
335 arm_generic_initclocks(void)
338 __weak_reference(arm_generic_initclocks, cpu_initclocks);
346 if (PCPU_GET(cpuid) == 0)
347 cpu_initclocks_bsp();
351 cpu_initclocks_bsp();
358 arm_set_delay(delay_func *impl, void *arg)
361 KASSERT(impl != NULL, ("No DELAY implementation"));
371 delay_impl(usec, delay_arg);
377 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
388 if (td->td_md.md_spinlock_count == 0) {
389 cspr = disable_interrupts(PSR_I | PSR_F);
390 td->td_md.md_spinlock_count = 1;
391 td->td_md.md_saved_cspr = cspr;
394 td->td_md.md_spinlock_count++;
404 cspr = td->td_md.md_saved_cspr;
405 td->td_md.md_spinlock_count--;
406 if (td->td_md.md_spinlock_count == 0) {
408 restore_interrupts(cspr);
413 * Clear registers on exec
416 exec_setregs(struct thread *td, struct image_params *imgp, uintptr_t stack)
418 struct trapframe *tf = td->td_frame;
420 memset(tf, 0, sizeof(*tf));
421 tf->tf_usr_sp = stack;
422 tf->tf_usr_lr = imgp->entry_addr;
423 tf->tf_svc_lr = 0x77777777;
424 tf->tf_pc = imgp->entry_addr;
425 tf->tf_spsr = PSR_USR32_MODE;
431 * Get machine VFP context.
434 get_vfpcontext(struct thread *td, mcontext_vfp_t *vfp)
439 if (td == curthread) {
441 vfp_store(&pcb->pcb_vfpstate, false);
444 MPASS(TD_IS_SUSPENDED(td));
445 memcpy(vfp->mcv_reg, pcb->pcb_vfpstate.reg,
446 sizeof(vfp->mcv_reg));
447 vfp->mcv_fpscr = pcb->pcb_vfpstate.fpscr;
451 * Set machine VFP context.
454 set_vfpcontext(struct thread *td, mcontext_vfp_t *vfp)
459 if (td == curthread) {
464 MPASS(TD_IS_SUSPENDED(td));
465 memcpy(pcb->pcb_vfpstate.reg, vfp->mcv_reg,
466 sizeof(pcb->pcb_vfpstate.reg));
467 pcb->pcb_vfpstate.fpscr = vfp->mcv_fpscr;
472 arm_get_vfpstate(struct thread *td, void *args)
475 struct arm_get_vfpstate_args ua;
476 mcontext_vfp_t mcontext_vfp;
478 rv = copyin(args, &ua, sizeof(ua));
481 if (ua.mc_vfp_size != sizeof(mcontext_vfp_t))
484 get_vfpcontext(td, &mcontext_vfp);
486 bzero(&mcontext_vfp, sizeof(mcontext_vfp));
489 rv = copyout(&mcontext_vfp, ua.mc_vfp, sizeof(mcontext_vfp));
496 * Get machine context.
499 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret)
501 struct trapframe *tf = td->td_frame;
502 __greg_t *gr = mcp->__gregs;
504 if (clear_ret & GET_MC_CLEAR_RET) {
506 gr[_REG_CPSR] = tf->tf_spsr & ~PSR_C;
508 gr[_REG_R0] = tf->tf_r0;
509 gr[_REG_CPSR] = tf->tf_spsr;
511 gr[_REG_R1] = tf->tf_r1;
512 gr[_REG_R2] = tf->tf_r2;
513 gr[_REG_R3] = tf->tf_r3;
514 gr[_REG_R4] = tf->tf_r4;
515 gr[_REG_R5] = tf->tf_r5;
516 gr[_REG_R6] = tf->tf_r6;
517 gr[_REG_R7] = tf->tf_r7;
518 gr[_REG_R8] = tf->tf_r8;
519 gr[_REG_R9] = tf->tf_r9;
520 gr[_REG_R10] = tf->tf_r10;
521 gr[_REG_R11] = tf->tf_r11;
522 gr[_REG_R12] = tf->tf_r12;
523 gr[_REG_SP] = tf->tf_usr_sp;
524 gr[_REG_LR] = tf->tf_usr_lr;
525 gr[_REG_PC] = tf->tf_pc;
527 mcp->mc_vfp_size = 0;
528 mcp->mc_vfp_ptr = NULL;
529 memset(&mcp->mc_spare, 0, sizeof(mcp->mc_spare));
535 * Set machine context.
537 * However, we don't set any but the user modifiable flags, and we won't
538 * touch the cs selector.
541 set_mcontext(struct thread *td, mcontext_t *mcp)
543 mcontext_vfp_t mc_vfp, *vfp;
544 struct trapframe *tf = td->td_frame;
545 const __greg_t *gr = mcp->__gregs;
549 * Make sure the processor mode has not been tampered with and
550 * interrupts have not been disabled.
552 spsr = gr[_REG_CPSR];
553 if ((spsr & PSR_MODE) != PSR_USR32_MODE ||
554 (spsr & (PSR_I | PSR_F)) != 0)
558 if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_size != sizeof(mc_vfp)) {
559 printf("%s: %s: Malformed mc_vfp_size: %d (0x%08X)\n",
560 td->td_proc->p_comm, __func__,
561 mcp->mc_vfp_size, mcp->mc_vfp_size);
562 } else if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_ptr == NULL) {
563 printf("%s: %s: c_vfp_size != 0 but mc_vfp_ptr == NULL\n",
564 td->td_proc->p_comm, __func__);
568 if (mcp->mc_vfp_size == sizeof(mc_vfp) && mcp->mc_vfp_ptr != NULL) {
569 if (copyin(mcp->mc_vfp_ptr, &mc_vfp, sizeof(mc_vfp)) != 0)
576 tf->tf_r0 = gr[_REG_R0];
577 tf->tf_r1 = gr[_REG_R1];
578 tf->tf_r2 = gr[_REG_R2];
579 tf->tf_r3 = gr[_REG_R3];
580 tf->tf_r4 = gr[_REG_R4];
581 tf->tf_r5 = gr[_REG_R5];
582 tf->tf_r6 = gr[_REG_R6];
583 tf->tf_r7 = gr[_REG_R7];
584 tf->tf_r8 = gr[_REG_R8];
585 tf->tf_r9 = gr[_REG_R9];
586 tf->tf_r10 = gr[_REG_R10];
587 tf->tf_r11 = gr[_REG_R11];
588 tf->tf_r12 = gr[_REG_R12];
589 tf->tf_usr_sp = gr[_REG_SP];
590 tf->tf_usr_lr = gr[_REG_LR];
591 tf->tf_pc = gr[_REG_PC];
592 tf->tf_spsr = gr[_REG_CPSR];
595 set_vfpcontext(td, vfp);
601 sendsig(catcher, ksi, mask)
608 struct trapframe *tf;
609 struct sigframe *fp, frame;
611 struct sysentvec *sysent;
618 PROC_LOCK_ASSERT(p, MA_OWNED);
619 sig = ksi->ksi_signo;
620 code = ksi->ksi_code;
622 mtx_assert(&psp->ps_mtx, MA_OWNED);
624 onstack = sigonstack(tf->tf_usr_sp);
626 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm,
629 /* Allocate and validate space for the signal handler context. */
630 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !(onstack) &&
631 SIGISMEMBER(psp->ps_sigonstack, sig)) {
632 fp = (struct sigframe *)((uintptr_t)td->td_sigstk.ss_sp +
633 td->td_sigstk.ss_size);
634 #if defined(COMPAT_43)
635 td->td_sigstk.ss_flags |= SS_ONSTACK;
638 fp = (struct sigframe *)td->td_frame->tf_usr_sp;
640 /* make room on the stack */
643 /* make the stack aligned */
644 fp = (struct sigframe *)STACKALIGN(fp);
645 /* Populate the siginfo frame. */
646 bzero(&frame, sizeof(frame));
647 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0);
649 get_vfpcontext(td, &frame.sf_vfp);
650 frame.sf_uc.uc_mcontext.mc_vfp_size = sizeof(fp->sf_vfp);
651 frame.sf_uc.uc_mcontext.mc_vfp_ptr = &fp->sf_vfp;
653 frame.sf_uc.uc_mcontext.mc_vfp_size = 0;
654 frame.sf_uc.uc_mcontext.mc_vfp_ptr = NULL;
656 frame.sf_si = ksi->ksi_info;
657 frame.sf_uc.uc_sigmask = *mask;
658 frame.sf_uc.uc_stack = td->td_sigstk;
659 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) != 0 ?
660 (onstack ? SS_ONSTACK : 0) : SS_DISABLE;
661 mtx_unlock(&psp->ps_mtx);
662 PROC_UNLOCK(td->td_proc);
664 /* Copy the sigframe out to the user's stack. */
665 if (copyout(&frame, fp, sizeof(*fp)) != 0) {
666 /* Process has trashed its stack. Kill it. */
667 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp);
673 * Build context to run handler in. We invoke the handler
674 * directly, only returning via the trampoline. Note the
675 * trampoline version numbers are coordinated with machine-
676 * dependent code in libc.
680 tf->tf_r1 = (register_t)&fp->sf_si;
681 tf->tf_r2 = (register_t)&fp->sf_uc;
683 /* the trampoline uses r5 as the uc address */
684 tf->tf_r5 = (register_t)&fp->sf_uc;
685 tf->tf_pc = (register_t)catcher;
686 tf->tf_usr_sp = (register_t)fp;
687 sysent = p->p_sysent;
688 if (sysent->sv_sigcode_base != 0)
689 tf->tf_usr_lr = (register_t)sysent->sv_sigcode_base;
691 tf->tf_usr_lr = (register_t)(sysent->sv_psstrings -
692 *(sysent->sv_szsigcode));
693 /* Set the mode to enter in the signal handler */
695 if ((register_t)catcher & 1)
696 tf->tf_spsr |= PSR_T;
698 tf->tf_spsr &= ~PSR_T;
701 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr,
705 mtx_lock(&psp->ps_mtx);
709 sys_sigreturn(td, uap)
711 struct sigreturn_args /* {
712 const struct __ucontext *sigcntxp;
720 if (copyin(uap->sigcntxp, &uc, sizeof(uc)))
722 /* Restore register context. */
723 error = set_mcontext(td, &uc.uc_mcontext);
727 /* Restore signal mask. */
728 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
730 return (EJUSTRETURN);
734 * Construct a PCB from a trapframe. This is called from kdb_trap() where
735 * we want to start a backtrace from the function that caused us to enter
736 * the debugger. We have the context in the trapframe, but base the trace
737 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
738 * enough for a backtrace.
741 makectx(struct trapframe *tf, struct pcb *pcb)
743 pcb->pcb_regs.sf_r4 = tf->tf_r4;
744 pcb->pcb_regs.sf_r5 = tf->tf_r5;
745 pcb->pcb_regs.sf_r6 = tf->tf_r6;
746 pcb->pcb_regs.sf_r7 = tf->tf_r7;
747 pcb->pcb_regs.sf_r8 = tf->tf_r8;
748 pcb->pcb_regs.sf_r9 = tf->tf_r9;
749 pcb->pcb_regs.sf_r10 = tf->tf_r10;
750 pcb->pcb_regs.sf_r11 = tf->tf_r11;
751 pcb->pcb_regs.sf_r12 = tf->tf_r12;
752 pcb->pcb_regs.sf_pc = tf->tf_pc;
753 pcb->pcb_regs.sf_lr = tf->tf_usr_lr;
754 pcb->pcb_regs.sf_sp = tf->tf_usr_sp;
761 set_curthread(&thread0);
763 pcpu_init(pcpup, 0, sizeof(struct pcpu));
764 PCPU_SET(curthread, &thread0);
771 init_proc0(vm_offset_t kstack)
773 proc_linkup0(&proc0, &thread0);
774 thread0.td_kstack = kstack;
775 thread0.td_kstack_pages = kstack_pages;
776 thread0.td_pcb = (struct pcb *)(thread0.td_kstack +
777 thread0.td_kstack_pages * PAGE_SIZE) - 1;
778 thread0.td_pcb->pcb_flags = 0;
779 thread0.td_pcb->pcb_vfpcpu = -1;
780 thread0.td_pcb->pcb_vfpstate.fpscr = VFPSCR_DN;
781 thread0.td_frame = &proc0_tf;
782 pcpup->pc_curpcb = thread0.td_pcb;
787 set_stackptrs(int cpu)
790 set_stackptr(PSR_IRQ32_MODE,
791 irqstack + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
792 set_stackptr(PSR_ABT32_MODE,
793 abtstack + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
794 set_stackptr(PSR_UND32_MODE,
795 undstack + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
799 set_stackptrs(int cpu)
802 set_stackptr(PSR_IRQ32_MODE,
803 irqstack.pv_va + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
804 set_stackptr(PSR_ABT32_MODE,
805 abtstack.pv_va + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
806 set_stackptr(PSR_UND32_MODE,
807 undstack.pv_va + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
817 if (boothowto & RB_KDB)
818 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
825 initarm(struct arm_boot_params *abp)
827 struct mem_region mem_regions[FDT_MEM_REGIONS];
828 struct pv_addr kernel_l1pt;
829 struct pv_addr dpcpu;
830 vm_offset_t dtbp, freemempos, l2_start, lastaddr;
836 int i, j, err_devmap, mem_regions_sz;
838 lastaddr = parse_boot_param(abp);
839 arm_physmem_kernaddr = abp->abp_physaddr;
847 * Find the dtb passed in by the boot loader.
849 kmdp = preload_search_by_type("elf kernel");
851 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
853 dtbp = (vm_offset_t)NULL;
855 #if defined(FDT_DTB_STATIC)
857 * In case the device tree blob was not retrieved (from metadata) try
858 * to use the statically embedded one.
860 if (dtbp == (vm_offset_t)NULL)
861 dtbp = (vm_offset_t)&fdt_static_dtb;
864 if (OF_install(OFW_FDT, 0) == FALSE)
865 panic("Cannot install FDT");
867 if (OF_init((void *)dtbp) != 0)
868 panic("OF_init failed with the found device tree");
870 /* Grab physical memory regions information from device tree. */
871 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz, &memsize) != 0)
872 panic("Cannot get physical memory regions");
873 arm_physmem_hardware_regions(mem_regions, mem_regions_sz);
875 /* Grab reserved memory regions information from device tree. */
876 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0)
877 arm_physmem_exclude_regions(mem_regions, mem_regions_sz,
878 EXFLAG_NODUMP | EXFLAG_NOALLOC);
880 /* Platform-specific initialisation */
881 platform_probe_and_attach();
885 /* Do basic tuning, hz etc */
888 /* Calculate number of L2 tables needed for mapping vm_page_array */
889 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page);
890 l2size = (l2size >> L1_S_SHIFT) + 1;
893 * Add one table for end of kernel map, one for stacks, msgbuf and
894 * L1 and L2 tables map, one for vectors map and two for
895 * l2 structures from pmap_bootstrap.
899 /* Make it divisible by 4 */
900 l2size = (l2size + 3) & ~3;
902 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK;
904 /* Define a macro to simplify memory allocation */
905 #define valloc_pages(var, np) \
906 alloc_pages((var).pv_va, (np)); \
907 (var).pv_pa = (var).pv_va + (abp->abp_physaddr - KERNVIRTADDR);
909 #define alloc_pages(var, np) \
910 (var) = freemempos; \
911 freemempos += (np * PAGE_SIZE); \
912 memset((char *)(var), 0, ((np) * PAGE_SIZE));
914 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
915 freemempos += PAGE_SIZE;
916 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
918 for (i = 0, j = 0; i < l2size; ++i) {
919 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
920 valloc_pages(kernel_pt_table[i],
921 L2_TABLE_SIZE / PAGE_SIZE);
924 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va +
925 L2_TABLE_SIZE_REAL * (i - j);
926 kernel_pt_table[i].pv_pa =
927 kernel_pt_table[i].pv_va - KERNVIRTADDR +
933 * Allocate a page for the system page mapped to 0x00000000
934 * or 0xffff0000. This page will just contain the system vectors
935 * and can be shared by all processes.
937 valloc_pages(systempage, 1);
939 /* Allocate dynamic per-cpu area. */
940 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
941 dpcpu_init((void *)dpcpu.pv_va, 0);
943 /* Allocate stacks for all modes */
944 valloc_pages(irqstack, IRQ_STACK_SIZE * MAXCPU);
945 valloc_pages(abtstack, ABT_STACK_SIZE * MAXCPU);
946 valloc_pages(undstack, UND_STACK_SIZE * MAXCPU);
947 valloc_pages(kernelstack, kstack_pages);
948 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
951 * Now we start construction of the L1 page table
952 * We start by mapping the L2 page tables into the L1.
953 * This means that we can replace L1 mappings later on if necessary
955 l1pagetable = kernel_l1pt.pv_va;
958 * Try to map as much as possible of kernel text and data using
959 * 1MB section mapping and for the rest of initial kernel address
960 * space use L2 coarse tables.
962 * Link L2 tables for mapping remainder of kernel (modulo 1MB)
963 * and kernel structures
965 l2_start = lastaddr & ~(L1_S_OFFSET);
966 for (i = 0 ; i < l2size - 1; i++)
967 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE,
968 &kernel_pt_table[i]);
970 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE;
972 /* Map kernel code and data */
973 pmap_map_chunk(l1pagetable, KERNVIRTADDR, abp->abp_physaddr,
974 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK,
975 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
977 /* Map L1 directory and allocated L2 page tables */
978 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
979 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
981 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va,
982 kernel_pt_table[0].pv_pa,
983 L2_TABLE_SIZE_REAL * l2size,
984 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
986 /* Map allocated DPCPU, stacks and msgbuf */
987 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa,
988 freemempos - dpcpu.pv_va,
989 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
991 /* Link and map the vector page */
992 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH,
993 &kernel_pt_table[l2size - 1]);
994 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
995 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE);
997 /* Establish static device mappings. */
998 err_devmap = platform_devmap_init();
999 devmap_bootstrap(l1pagetable, NULL);
1000 vm_max_kernel_address = platform_lastaddr();
1002 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT);
1003 pmap_pa = kernel_l1pt.pv_pa;
1004 cpu_setttb(kernel_l1pt.pv_pa);
1006 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2));
1009 * Now that proper page tables are installed, call cpu_setup() to enable
1010 * instruction and data caches and other chip-specific features.
1015 * Only after the SOC registers block is mapped we can perform device
1016 * tree fixups, as they may attempt to read parameters from hardware.
1018 OF_interpret("perform-fixup", 0);
1020 platform_gpio_init();
1024 debugf("initarm: console initialized\n");
1025 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp);
1026 debugf(" boothowto = 0x%08x\n", boothowto);
1027 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
1030 env = kern_getenv("kernelname");
1032 strlcpy(kernelname, env, sizeof(kernelname));
1036 if (err_devmap != 0)
1037 printf("WARNING: could not fully configure devmap, error=%d\n",
1040 platform_late_init();
1043 * Pages were allocated during the secondary bootstrap for the
1044 * stacks for different CPU modes.
1045 * We must now set the r13 registers in the different CPU modes to
1046 * point to these stacks.
1047 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
1048 * of the stack memory.
1050 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE);
1055 * We must now clean the cache again....
1056 * Cleaning may be done by reading new data to displace any
1057 * dirty data in the cache. This will have happened in cpu_setttb()
1058 * but since we are boot strapping the addresses used for the read
1059 * may have just been remapped and thus the cache could be out
1060 * of sync. A re-clean after the switch will cure this.
1061 * After booting there are no gross relocations of the kernel thus
1062 * this problem will not occur after initarm().
1064 cpu_idcache_wbinv_all();
1068 init_proc0(kernelstack.pv_va);
1070 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
1071 pmap_bootstrap(freemempos, &kernel_l1pt);
1072 msgbufp = (void *)msgbufpv.pv_va;
1073 msgbufinit(msgbufp, msgbufsize);
1077 * Exclude the kernel (and all the things we allocated which immediately
1078 * follow the kernel) from the VM allocation pool but not from crash
1079 * dumps. virtual_avail is a global variable which tracks the kva we've
1080 * "allocated" while setting up pmaps.
1082 * Prepare the list of physical memory available to the vm subsystem.
1084 arm_physmem_exclude_region(abp->abp_physaddr,
1085 (virtual_avail - KERNVIRTADDR), EXFLAG_NOALLOC);
1086 arm_physmem_init_kernel_globals();
1088 init_param2(physmem);
1092 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
1093 sizeof(struct pcb)));
1095 #else /* __ARM_ARCH < 6 */
1097 initarm(struct arm_boot_params *abp)
1099 struct mem_region mem_regions[FDT_MEM_REGIONS];
1100 vm_paddr_t lastaddr;
1101 vm_offset_t dtbp, kernelstack, dpcpu;
1104 int err_devmap, mem_regions_sz;
1106 struct efi_map_header *efihdr;
1109 /* get last allocated physical address */
1110 arm_physmem_kernaddr = abp->abp_physaddr;
1111 lastaddr = parse_boot_param(abp) - KERNVIRTADDR + arm_physmem_kernaddr;
1117 * Find the dtb passed in by the boot loader.
1119 kmdp = preload_search_by_type("elf kernel");
1120 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
1121 #if defined(FDT_DTB_STATIC)
1123 * In case the device tree blob was not retrieved (from metadata) try
1124 * to use the statically embedded one.
1126 if (dtbp == (vm_offset_t)NULL)
1127 dtbp = (vm_offset_t)&fdt_static_dtb;
1130 if (OF_install(OFW_FDT, 0) == FALSE)
1131 panic("Cannot install FDT");
1133 if (OF_init((void *)dtbp) != 0)
1134 panic("OF_init failed with the found device tree");
1136 #if defined(LINUX_BOOT_ABI)
1137 arm_parse_fdt_bootargs();
1141 efihdr = (struct efi_map_header *)preload_search_info(kmdp,
1142 MODINFO_METADATA | MODINFOMD_EFI_MAP);
1143 if (efihdr != NULL) {
1144 arm_add_efi_map_entries(efihdr, mem_regions, &mem_regions_sz);
1148 /* Grab physical memory regions information from device tree. */
1149 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz,NULL) != 0)
1150 panic("Cannot get physical memory regions");
1152 arm_physmem_hardware_regions(mem_regions, mem_regions_sz);
1154 /* Grab reserved memory regions information from device tree. */
1155 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0)
1156 arm_physmem_exclude_regions(mem_regions, mem_regions_sz,
1157 EXFLAG_NODUMP | EXFLAG_NOALLOC);
1160 * Set TEX remapping registers.
1161 * Setup kernel page tables and switch to kernel L1 page table.
1164 pmap_bootstrap_prepare(lastaddr);
1167 * If EARLY_PRINTF support is enabled, we need to re-establish the
1168 * mapping after pmap_bootstrap_prepare() switches to new page tables.
1169 * Note that we can only do the remapping if the VA is outside the
1170 * kernel, now that we have real virtual (not VA=PA) mappings in effect.
1171 * Early printf does not work between the time pmap_set_tex() does
1172 * cp15_prrr_set() and this code remaps the VA.
1174 #if defined(EARLY_PRINTF) && defined(SOCDEV_PA) && defined(SOCDEV_VA) && SOCDEV_VA < KERNBASE
1175 pmap_preboot_map_attr(SOCDEV_PA, SOCDEV_VA, 1024 * 1024,
1176 VM_PROT_READ | VM_PROT_WRITE, VM_MEMATTR_DEVICE);
1180 * Now that proper page tables are installed, call cpu_setup() to enable
1181 * instruction and data caches and other chip-specific features.
1185 /* Platform-specific initialisation */
1186 platform_probe_and_attach();
1189 /* Do basic tuning, hz etc */
1193 * Allocate a page for the system page mapped to 0xffff0000
1194 * This page will just contain the system vectors and can be
1195 * shared by all processes.
1197 systempage = pmap_preboot_get_pages(1);
1199 /* Map the vector page. */
1200 pmap_preboot_map_pages(systempage, ARM_VECTORS_HIGH, 1);
1201 if (virtual_end >= ARM_VECTORS_HIGH)
1202 virtual_end = ARM_VECTORS_HIGH - 1;
1204 /* Allocate dynamic per-cpu area. */
1205 dpcpu = pmap_preboot_get_vpages(DPCPU_SIZE / PAGE_SIZE);
1206 dpcpu_init((void *)dpcpu, 0);
1208 /* Allocate stacks for all modes */
1209 irqstack = pmap_preboot_get_vpages(IRQ_STACK_SIZE * MAXCPU);
1210 abtstack = pmap_preboot_get_vpages(ABT_STACK_SIZE * MAXCPU);
1211 undstack = pmap_preboot_get_vpages(UND_STACK_SIZE * MAXCPU );
1212 kernelstack = pmap_preboot_get_vpages(kstack_pages);
1214 /* Allocate message buffer. */
1215 msgbufp = (void *)pmap_preboot_get_vpages(
1216 round_page(msgbufsize) / PAGE_SIZE);
1219 * Pages were allocated during the secondary bootstrap for the
1220 * stacks for different CPU modes.
1221 * We must now set the r13 registers in the different CPU modes to
1222 * point to these stacks.
1223 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
1224 * of the stack memory.
1229 /* Establish static device mappings. */
1230 err_devmap = platform_devmap_init();
1231 devmap_bootstrap(0, NULL);
1232 vm_max_kernel_address = platform_lastaddr();
1235 * Only after the SOC registers block is mapped we can perform device
1236 * tree fixups, as they may attempt to read parameters from hardware.
1238 OF_interpret("perform-fixup", 0);
1239 platform_gpio_init();
1243 * If we made a mapping for EARLY_PRINTF after pmap_bootstrap_prepare(),
1244 * undo it now that the normal console printf works.
1246 #if defined(EARLY_PRINTF) && defined(SOCDEV_PA) && defined(SOCDEV_VA) && SOCDEV_VA < KERNBASE
1247 pmap_kremove(SOCDEV_VA);
1250 debugf("initarm: console initialized\n");
1251 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp);
1252 debugf(" boothowto = 0x%08x\n", boothowto);
1253 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
1254 debugf(" lastaddr1: 0x%08x\n", lastaddr);
1257 env = kern_getenv("kernelname");
1259 strlcpy(kernelname, env, sizeof(kernelname));
1261 if (err_devmap != 0)
1262 printf("WARNING: could not fully configure devmap, error=%d\n",
1265 platform_late_init();
1268 * We must now clean the cache again....
1269 * Cleaning may be done by reading new data to displace any
1270 * dirty data in the cache. This will have happened in cpu_setttb()
1271 * but since we are boot strapping the addresses used for the read
1272 * may have just been remapped and thus the cache could be out
1273 * of sync. A re-clean after the switch will cure this.
1274 * After booting there are no gross relocations of the kernel thus
1275 * this problem will not occur after initarm().
1277 /* Set stack for exception handlers */
1279 init_proc0(kernelstack);
1280 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
1281 enable_interrupts(PSR_A);
1284 /* Exclude the kernel (and all the things we allocated which immediately
1285 * follow the kernel) from the VM allocation pool but not from crash
1286 * dumps. virtual_avail is a global variable which tracks the kva we've
1287 * "allocated" while setting up pmaps.
1289 * Prepare the list of physical memory available to the vm subsystem.
1291 arm_physmem_exclude_region(abp->abp_physaddr,
1292 pmap_preboot_get_pages(0) - abp->abp_physaddr, EXFLAG_NOALLOC);
1293 arm_physmem_init_kernel_globals();
1295 init_param2(physmem);
1296 /* Init message buffer. */
1297 msgbufinit(msgbufp, msgbufsize);
1300 /* Apply possible BP hardening. */
1301 cpuinfo_init_bp_hardening();
1302 return ((void *)STACKALIGN(thread0.td_pcb));
1306 #endif /* __ARM_ARCH < 6 */