1 /* $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $ */
4 * SPDX-License-Identifier: BSD-4-Clause
6 * Copyright (c) 2004 Olivier Houchard
7 * Copyright (c) 1994-1998 Mark Brinicombe.
8 * Copyright (c) 1994 Brini.
11 * This code is derived from software written for Brini by Mark Brinicombe
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
21 * 3. All advertising materials mentioning features or use of this software
22 * must display the following acknowledgement:
23 * This product includes software developed by Mark Brinicombe
24 * for the NetBSD Project.
25 * 4. The name of the company nor the name of the author may be used to
26 * endorse or promote products derived from this software without specific
27 * prior written permission.
29 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
31 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
32 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
41 * Machine dependent functions for kernel setup
44 * Updated : 18/04/01 updated for new wscons
48 #include "opt_kstack_pages.h"
49 #include "opt_platform.h"
50 #include "opt_sched.h"
51 #include "opt_timer.h"
53 #include <sys/cdefs.h>
54 __FBSDID("$FreeBSD$");
56 #include <sys/param.h>
61 #include <sys/devmap.h>
63 #include <sys/imgact.h>
65 #include <sys/kernel.h>
66 #include <sys/linker.h>
67 #include <sys/msgbuf.h>
68 #include <sys/reboot.h>
69 #include <sys/rwlock.h>
70 #include <sys/sched.h>
71 #include <sys/syscallsubr.h>
72 #include <sys/sysent.h>
73 #include <sys/sysproto.h>
74 #include <sys/vmmeter.h>
76 #include <vm/vm_object.h>
77 #include <vm/vm_page.h>
78 #include <vm/vm_pager.h>
80 #include <machine/debug_monitor.h>
81 #include <machine/machdep.h>
82 #include <machine/metadata.h>
83 #include <machine/pcb.h>
84 #include <machine/physmem.h>
85 #include <machine/platform.h>
86 #include <machine/sysarch.h>
87 #include <machine/undefined.h>
88 #include <machine/vfp.h>
89 #include <machine/vmparam.h>
92 #include <dev/fdt/fdt_common.h>
93 #include <machine/ofw_machdep.h>
97 #define debugf(fmt, args...) printf(fmt, ##args)
99 #define debugf(fmt, args...)
102 #if defined(COMPAT_FREEBSD4) || defined(COMPAT_FREEBSD5) || \
103 defined(COMPAT_FREEBSD6) || defined(COMPAT_FREEBSD7) || \
104 defined(COMPAT_FREEBSD9)
105 #error FreeBSD/arm doesn't provide compatibility with releases prior to 10
108 #if __ARM_ARCH >= 6 && !defined(INTRNG)
109 #error armv6 requires INTRNG
112 struct pcpu __pcpu[MAXCPU];
113 struct pcpu *pcpup = &__pcpu[0];
115 static struct trapframe proc0_tf;
116 uint32_t cpu_reset_address = 0;
118 vm_offset_t vector_page;
120 int (*_arm_memcpy)(void *, void *, int, int) = NULL;
121 int (*_arm_bzero)(void *, int, int) = NULL;
122 int _min_memcpy_size = 0;
123 int _min_bzero_size = 0;
130 vm_offset_t systempage;
131 vm_offset_t irqstack;
132 vm_offset_t undstack;
133 vm_offset_t abtstack;
136 * This is the number of L2 page tables required for covering max
137 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf,
138 * stacks etc.), uprounded to be divisible by 4.
140 #define KERNEL_PT_MAX 78
141 static struct pv_addr kernel_pt_table[KERNEL_PT_MAX];
142 struct pv_addr systempage;
143 static struct pv_addr msgbufpv;
144 struct pv_addr irqstack;
145 struct pv_addr undstack;
146 struct pv_addr abtstack;
147 static struct pv_addr kernelstack;
148 #endif /* __ARM_ARCH >= 6 */
152 static delay_func *delay_impl;
153 static void *delay_arg;
156 struct kva_md_info kmi;
161 * Initialize the vector page, and select whether or not to
162 * relocate the vectors.
164 * NOTE: We expect the vector page to be mapped at its expected
168 extern unsigned int page0[], page0_data[];
170 arm_vector_init(vm_offset_t va, int which)
172 unsigned int *vectors = (int *) va;
173 unsigned int *vectors_data = vectors + (page0_data - page0);
177 * Loop through the vectors we're taking over, and copy the
178 * vector's insn and data word.
180 for (vec = 0; vec < ARM_NVEC; vec++) {
181 if ((which & (1 << vec)) == 0) {
182 /* Don't want to take over this vector. */
185 vectors[vec] = page0[vec];
186 vectors_data[vec] = page0_data[vec];
189 /* Now sync the vectors. */
190 icache_sync(va, (ARM_NVEC * 2) * sizeof(u_int));
194 if (va == ARM_VECTORS_HIGH) {
196 * Enable high vectors in the system control reg (SCTLR).
198 * Assume the MD caller knows what it's doing here, and really
199 * does want the vector page relocated.
201 * Note: This has to be done here (and not just in
202 * cpu_setup()) because the vector page needs to be
203 * accessible *before* cpu_startup() is called.
206 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC);
212 cpu_startup(void *dummy)
214 struct pcb *pcb = thread0.td_pcb;
215 const unsigned int mbyte = 1024 * 1024;
216 #if __ARM_ARCH < 6 && !defined(ARM_CACHE_LOCK_ENABLE)
222 vm_ksubmap_init(&kmi);
225 * Display the RAM layout.
227 printf("real memory = %ju (%ju MB)\n",
228 (uintmax_t)arm32_ptob(realmem),
229 (uintmax_t)arm32_ptob(realmem) / mbyte);
230 printf("avail memory = %ju (%ju MB)\n",
231 (uintmax_t)arm32_ptob(vm_free_count()),
232 (uintmax_t)arm32_ptob(vm_free_count()) / mbyte);
234 arm_physmem_print_tables();
235 devmap_print_table();
239 vm_pager_bufferinit();
240 pcb->pcb_regs.sf_sp = (u_int)thread0.td_kstack +
241 USPACE_SVC_STACK_TOP;
242 pmap_set_pcb_pagedir(kernel_pmap, pcb);
244 vector_page_setprot(VM_PROT_READ);
246 #ifdef ARM_CACHE_LOCK_ENABLE
247 pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS);
248 arm_lock_cache_line(ARM_TP_ADDRESS);
250 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO);
251 pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m));
253 *(uint32_t *)ARM_RAS_START = 0;
254 *(uint32_t *)ARM_RAS_END = 0xffffffff;
258 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
261 * Flush the D-cache for non-DMA I/O so that the I-cache can
262 * be made coherent later.
265 cpu_flush_dcache(void *ptr, size_t len)
268 dcache_wb_poc((vm_offset_t)ptr, (vm_paddr_t)vtophys(ptr), len);
271 /* Get current clock frequency for the given cpu id. */
273 cpu_est_clockrate(int cpu_id, uint64_t *rate)
278 pc = pcpu_find(cpu_id);
279 if (pc == NULL || rate == NULL)
282 if (pc->pc_clock == 0)
285 *rate = pc->pc_clock;
297 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", busy, curcpu);
299 #ifndef NO_EVENTTIMERS
303 if (!sched_runnable())
305 #ifndef NO_EVENTTIMERS
310 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", busy, curcpu);
314 cpu_idle_wakeup(int cpu)
320 #ifdef NO_EVENTTIMERS
322 * Most ARM platforms don't need to do anything special to init their clocks
323 * (they get intialized during normal device attachment), and by not defining a
324 * cpu_initclocks() function they get this generic one. Any platform that needs
325 * to do something special can just provide their own implementation, which will
326 * override this one due to the weak linkage.
329 arm_generic_initclocks(void)
332 __weak_reference(arm_generic_initclocks, cpu_initclocks);
340 if (PCPU_GET(cpuid) == 0)
341 cpu_initclocks_bsp();
345 cpu_initclocks_bsp();
352 arm_set_delay(delay_func *impl, void *arg)
355 KASSERT(impl != NULL, ("No DELAY implementation"));
365 delay_impl(usec, delay_arg);
371 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
382 if (td->td_md.md_spinlock_count == 0) {
383 cspr = disable_interrupts(PSR_I | PSR_F);
384 td->td_md.md_spinlock_count = 1;
385 td->td_md.md_saved_cspr = cspr;
387 td->td_md.md_spinlock_count++;
399 cspr = td->td_md.md_saved_cspr;
400 td->td_md.md_spinlock_count--;
401 if (td->td_md.md_spinlock_count == 0)
402 restore_interrupts(cspr);
406 * Clear registers on exec
409 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
411 struct trapframe *tf = td->td_frame;
413 memset(tf, 0, sizeof(*tf));
414 tf->tf_usr_sp = stack;
415 tf->tf_usr_lr = imgp->entry_addr;
416 tf->tf_svc_lr = 0x77777777;
417 tf->tf_pc = imgp->entry_addr;
418 tf->tf_spsr = PSR_USR32_MODE;
424 * Get machine VFP context.
427 get_vfpcontext(struct thread *td, mcontext_vfp_t *vfp)
432 if (td == curthread) {
434 vfp_store(&pcb->pcb_vfpstate, false);
437 MPASS(TD_IS_SUSPENDED(td));
438 memcpy(vfp->mcv_reg, pcb->pcb_vfpstate.reg,
439 sizeof(vfp->mcv_reg));
440 vfp->mcv_fpscr = pcb->pcb_vfpstate.fpscr;
444 * Set machine VFP context.
447 set_vfpcontext(struct thread *td, mcontext_vfp_t *vfp)
452 if (td == curthread) {
457 MPASS(TD_IS_SUSPENDED(td));
458 memcpy(pcb->pcb_vfpstate.reg, vfp->mcv_reg,
459 sizeof(pcb->pcb_vfpstate.reg));
460 pcb->pcb_vfpstate.fpscr = vfp->mcv_fpscr;
465 arm_get_vfpstate(struct thread *td, void *args)
468 struct arm_get_vfpstate_args ua;
469 mcontext_vfp_t mcontext_vfp;
471 rv = copyin(args, &ua, sizeof(ua));
474 if (ua.mc_vfp_size != sizeof(mcontext_vfp_t))
477 get_vfpcontext(td, &mcontext_vfp);
479 bzero(&mcontext_vfp, sizeof(mcontext_vfp));
482 rv = copyout(&mcontext_vfp, ua.mc_vfp, sizeof(mcontext_vfp));
489 * Get machine context.
492 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret)
494 struct trapframe *tf = td->td_frame;
495 __greg_t *gr = mcp->__gregs;
497 if (clear_ret & GET_MC_CLEAR_RET) {
499 gr[_REG_CPSR] = tf->tf_spsr & ~PSR_C;
501 gr[_REG_R0] = tf->tf_r0;
502 gr[_REG_CPSR] = tf->tf_spsr;
504 gr[_REG_R1] = tf->tf_r1;
505 gr[_REG_R2] = tf->tf_r2;
506 gr[_REG_R3] = tf->tf_r3;
507 gr[_REG_R4] = tf->tf_r4;
508 gr[_REG_R5] = tf->tf_r5;
509 gr[_REG_R6] = tf->tf_r6;
510 gr[_REG_R7] = tf->tf_r7;
511 gr[_REG_R8] = tf->tf_r8;
512 gr[_REG_R9] = tf->tf_r9;
513 gr[_REG_R10] = tf->tf_r10;
514 gr[_REG_R11] = tf->tf_r11;
515 gr[_REG_R12] = tf->tf_r12;
516 gr[_REG_SP] = tf->tf_usr_sp;
517 gr[_REG_LR] = tf->tf_usr_lr;
518 gr[_REG_PC] = tf->tf_pc;
520 mcp->mc_vfp_size = 0;
521 mcp->mc_vfp_ptr = NULL;
522 memset(&mcp->mc_spare, 0, sizeof(mcp->mc_spare));
528 * Set machine context.
530 * However, we don't set any but the user modifiable flags, and we won't
531 * touch the cs selector.
534 set_mcontext(struct thread *td, mcontext_t *mcp)
536 mcontext_vfp_t mc_vfp, *vfp;
537 struct trapframe *tf = td->td_frame;
538 const __greg_t *gr = mcp->__gregs;
542 * Make sure the processor mode has not been tampered with and
543 * interrupts have not been disabled.
545 spsr = gr[_REG_CPSR];
546 if ((spsr & PSR_MODE) != PSR_USR32_MODE ||
547 (spsr & (PSR_I | PSR_F)) != 0)
551 if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_size != sizeof(mc_vfp)) {
552 printf("%s: %s: Malformed mc_vfp_size: %d (0x%08X)\n",
553 td->td_proc->p_comm, __func__,
554 mcp->mc_vfp_size, mcp->mc_vfp_size);
555 } else if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_ptr == NULL) {
556 printf("%s: %s: c_vfp_size != 0 but mc_vfp_ptr == NULL\n",
557 td->td_proc->p_comm, __func__);
561 if (mcp->mc_vfp_size == sizeof(mc_vfp) && mcp->mc_vfp_ptr != NULL) {
562 if (copyin(mcp->mc_vfp_ptr, &mc_vfp, sizeof(mc_vfp)) != 0)
569 tf->tf_r0 = gr[_REG_R0];
570 tf->tf_r1 = gr[_REG_R1];
571 tf->tf_r2 = gr[_REG_R2];
572 tf->tf_r3 = gr[_REG_R3];
573 tf->tf_r4 = gr[_REG_R4];
574 tf->tf_r5 = gr[_REG_R5];
575 tf->tf_r6 = gr[_REG_R6];
576 tf->tf_r7 = gr[_REG_R7];
577 tf->tf_r8 = gr[_REG_R8];
578 tf->tf_r9 = gr[_REG_R9];
579 tf->tf_r10 = gr[_REG_R10];
580 tf->tf_r11 = gr[_REG_R11];
581 tf->tf_r12 = gr[_REG_R12];
582 tf->tf_usr_sp = gr[_REG_SP];
583 tf->tf_usr_lr = gr[_REG_LR];
584 tf->tf_pc = gr[_REG_PC];
585 tf->tf_spsr = gr[_REG_CPSR];
588 set_vfpcontext(td, vfp);
594 sendsig(catcher, ksi, mask)
601 struct trapframe *tf;
602 struct sigframe *fp, frame;
604 struct sysentvec *sysent;
611 PROC_LOCK_ASSERT(p, MA_OWNED);
612 sig = ksi->ksi_signo;
613 code = ksi->ksi_code;
615 mtx_assert(&psp->ps_mtx, MA_OWNED);
617 onstack = sigonstack(tf->tf_usr_sp);
619 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm,
622 /* Allocate and validate space for the signal handler context. */
623 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !(onstack) &&
624 SIGISMEMBER(psp->ps_sigonstack, sig)) {
625 fp = (struct sigframe *)((uintptr_t)td->td_sigstk.ss_sp +
626 td->td_sigstk.ss_size);
627 #if defined(COMPAT_43)
628 td->td_sigstk.ss_flags |= SS_ONSTACK;
631 fp = (struct sigframe *)td->td_frame->tf_usr_sp;
633 /* make room on the stack */
636 /* make the stack aligned */
637 fp = (struct sigframe *)STACKALIGN(fp);
638 /* Populate the siginfo frame. */
639 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0);
641 get_vfpcontext(td, &frame.sf_vfp);
642 frame.sf_uc.uc_mcontext.mc_vfp_size = sizeof(fp->sf_vfp);
643 frame.sf_uc.uc_mcontext.mc_vfp_ptr = &fp->sf_vfp;
645 frame.sf_uc.uc_mcontext.mc_vfp_size = 0;
646 frame.sf_uc.uc_mcontext.mc_vfp_ptr = NULL;
648 frame.sf_si = ksi->ksi_info;
649 frame.sf_uc.uc_sigmask = *mask;
650 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK )
651 ? ((onstack) ? SS_ONSTACK : 0) : SS_DISABLE;
652 frame.sf_uc.uc_stack = td->td_sigstk;
653 mtx_unlock(&psp->ps_mtx);
654 PROC_UNLOCK(td->td_proc);
656 /* Copy the sigframe out to the user's stack. */
657 if (copyout(&frame, fp, sizeof(*fp)) != 0) {
658 /* Process has trashed its stack. Kill it. */
659 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp);
665 * Build context to run handler in. We invoke the handler
666 * directly, only returning via the trampoline. Note the
667 * trampoline version numbers are coordinated with machine-
668 * dependent code in libc.
672 tf->tf_r1 = (register_t)&fp->sf_si;
673 tf->tf_r2 = (register_t)&fp->sf_uc;
675 /* the trampoline uses r5 as the uc address */
676 tf->tf_r5 = (register_t)&fp->sf_uc;
677 tf->tf_pc = (register_t)catcher;
678 tf->tf_usr_sp = (register_t)fp;
679 sysent = p->p_sysent;
680 if (sysent->sv_sigcode_base != 0)
681 tf->tf_usr_lr = (register_t)sysent->sv_sigcode_base;
683 tf->tf_usr_lr = (register_t)(sysent->sv_psstrings -
684 *(sysent->sv_szsigcode));
685 /* Set the mode to enter in the signal handler */
687 if ((register_t)catcher & 1)
688 tf->tf_spsr |= PSR_T;
690 tf->tf_spsr &= ~PSR_T;
693 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr,
697 mtx_lock(&psp->ps_mtx);
701 sys_sigreturn(td, uap)
703 struct sigreturn_args /* {
704 const struct __ucontext *sigcntxp;
712 if (copyin(uap->sigcntxp, &uc, sizeof(uc)))
714 /* Restore register context. */
715 error = set_mcontext(td, &uc.uc_mcontext);
719 /* Restore signal mask. */
720 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
722 return (EJUSTRETURN);
726 * Construct a PCB from a trapframe. This is called from kdb_trap() where
727 * we want to start a backtrace from the function that caused us to enter
728 * the debugger. We have the context in the trapframe, but base the trace
729 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
730 * enough for a backtrace.
733 makectx(struct trapframe *tf, struct pcb *pcb)
735 pcb->pcb_regs.sf_r4 = tf->tf_r4;
736 pcb->pcb_regs.sf_r5 = tf->tf_r5;
737 pcb->pcb_regs.sf_r6 = tf->tf_r6;
738 pcb->pcb_regs.sf_r7 = tf->tf_r7;
739 pcb->pcb_regs.sf_r8 = tf->tf_r8;
740 pcb->pcb_regs.sf_r9 = tf->tf_r9;
741 pcb->pcb_regs.sf_r10 = tf->tf_r10;
742 pcb->pcb_regs.sf_r11 = tf->tf_r11;
743 pcb->pcb_regs.sf_r12 = tf->tf_r12;
744 pcb->pcb_regs.sf_pc = tf->tf_pc;
745 pcb->pcb_regs.sf_lr = tf->tf_usr_lr;
746 pcb->pcb_regs.sf_sp = tf->tf_usr_sp;
753 set_curthread(&thread0);
755 pcpu_init(pcpup, 0, sizeof(struct pcpu));
756 PCPU_SET(curthread, &thread0);
763 init_proc0(vm_offset_t kstack)
765 proc_linkup0(&proc0, &thread0);
766 thread0.td_kstack = kstack;
767 thread0.td_pcb = (struct pcb *)
768 (thread0.td_kstack + kstack_pages * PAGE_SIZE) - 1;
769 thread0.td_pcb->pcb_flags = 0;
770 thread0.td_pcb->pcb_vfpcpu = -1;
771 thread0.td_pcb->pcb_vfpstate.fpscr = VFPSCR_DN;
772 thread0.td_frame = &proc0_tf;
773 pcpup->pc_curpcb = thread0.td_pcb;
778 set_stackptrs(int cpu)
781 set_stackptr(PSR_IRQ32_MODE,
782 irqstack + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
783 set_stackptr(PSR_ABT32_MODE,
784 abtstack + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
785 set_stackptr(PSR_UND32_MODE,
786 undstack + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
790 set_stackptrs(int cpu)
793 set_stackptr(PSR_IRQ32_MODE,
794 irqstack.pv_va + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
795 set_stackptr(PSR_ABT32_MODE,
796 abtstack.pv_va + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
797 set_stackptr(PSR_UND32_MODE,
798 undstack.pv_va + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
808 if (boothowto & RB_KDB)
809 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
816 initarm(struct arm_boot_params *abp)
818 struct mem_region mem_regions[FDT_MEM_REGIONS];
819 struct pv_addr kernel_l1pt;
820 struct pv_addr dpcpu;
821 vm_offset_t dtbp, freemempos, l2_start, lastaddr;
827 int i, j, err_devmap, mem_regions_sz;
829 lastaddr = parse_boot_param(abp);
830 arm_physmem_kernaddr = abp->abp_physaddr;
838 * Find the dtb passed in by the boot loader.
840 kmdp = preload_search_by_type("elf kernel");
842 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
844 dtbp = (vm_offset_t)NULL;
846 #if defined(FDT_DTB_STATIC)
848 * In case the device tree blob was not retrieved (from metadata) try
849 * to use the statically embedded one.
851 if (dtbp == (vm_offset_t)NULL)
852 dtbp = (vm_offset_t)&fdt_static_dtb;
855 if (OF_install(OFW_FDT, 0) == FALSE)
856 panic("Cannot install FDT");
858 if (OF_init((void *)dtbp) != 0)
859 panic("OF_init failed with the found device tree");
861 /* Grab physical memory regions information from device tree. */
862 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz, &memsize) != 0)
863 panic("Cannot get physical memory regions");
864 arm_physmem_hardware_regions(mem_regions, mem_regions_sz);
866 /* Grab reserved memory regions information from device tree. */
867 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0)
868 arm_physmem_exclude_regions(mem_regions, mem_regions_sz,
869 EXFLAG_NODUMP | EXFLAG_NOALLOC);
871 /* Platform-specific initialisation */
872 platform_probe_and_attach();
876 /* Do basic tuning, hz etc */
879 /* Calculate number of L2 tables needed for mapping vm_page_array */
880 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page);
881 l2size = (l2size >> L1_S_SHIFT) + 1;
884 * Add one table for end of kernel map, one for stacks, msgbuf and
885 * L1 and L2 tables map, one for vectors map and two for
886 * l2 structures from pmap_bootstrap.
890 /* Make it divisible by 4 */
891 l2size = (l2size + 3) & ~3;
893 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK;
895 /* Define a macro to simplify memory allocation */
896 #define valloc_pages(var, np) \
897 alloc_pages((var).pv_va, (np)); \
898 (var).pv_pa = (var).pv_va + (abp->abp_physaddr - KERNVIRTADDR);
900 #define alloc_pages(var, np) \
901 (var) = freemempos; \
902 freemempos += (np * PAGE_SIZE); \
903 memset((char *)(var), 0, ((np) * PAGE_SIZE));
905 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
906 freemempos += PAGE_SIZE;
907 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
909 for (i = 0, j = 0; i < l2size; ++i) {
910 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
911 valloc_pages(kernel_pt_table[i],
912 L2_TABLE_SIZE / PAGE_SIZE);
915 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va +
916 L2_TABLE_SIZE_REAL * (i - j);
917 kernel_pt_table[i].pv_pa =
918 kernel_pt_table[i].pv_va - KERNVIRTADDR +
924 * Allocate a page for the system page mapped to 0x00000000
925 * or 0xffff0000. This page will just contain the system vectors
926 * and can be shared by all processes.
928 valloc_pages(systempage, 1);
930 /* Allocate dynamic per-cpu area. */
931 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
932 dpcpu_init((void *)dpcpu.pv_va, 0);
934 /* Allocate stacks for all modes */
935 valloc_pages(irqstack, IRQ_STACK_SIZE * MAXCPU);
936 valloc_pages(abtstack, ABT_STACK_SIZE * MAXCPU);
937 valloc_pages(undstack, UND_STACK_SIZE * MAXCPU);
938 valloc_pages(kernelstack, kstack_pages * MAXCPU);
939 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
942 * Now we start construction of the L1 page table
943 * We start by mapping the L2 page tables into the L1.
944 * This means that we can replace L1 mappings later on if necessary
946 l1pagetable = kernel_l1pt.pv_va;
949 * Try to map as much as possible of kernel text and data using
950 * 1MB section mapping and for the rest of initial kernel address
951 * space use L2 coarse tables.
953 * Link L2 tables for mapping remainder of kernel (modulo 1MB)
954 * and kernel structures
956 l2_start = lastaddr & ~(L1_S_OFFSET);
957 for (i = 0 ; i < l2size - 1; i++)
958 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE,
959 &kernel_pt_table[i]);
961 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE;
963 /* Map kernel code and data */
964 pmap_map_chunk(l1pagetable, KERNVIRTADDR, abp->abp_physaddr,
965 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK,
966 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
968 /* Map L1 directory and allocated L2 page tables */
969 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
970 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
972 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va,
973 kernel_pt_table[0].pv_pa,
974 L2_TABLE_SIZE_REAL * l2size,
975 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
977 /* Map allocated DPCPU, stacks and msgbuf */
978 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa,
979 freemempos - dpcpu.pv_va,
980 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
982 /* Link and map the vector page */
983 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH,
984 &kernel_pt_table[l2size - 1]);
985 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
986 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE);
988 /* Establish static device mappings. */
989 err_devmap = platform_devmap_init();
990 devmap_bootstrap(l1pagetable, NULL);
991 vm_max_kernel_address = platform_lastaddr();
993 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT);
994 pmap_pa = kernel_l1pt.pv_pa;
995 cpu_setttb(kernel_l1pt.pv_pa);
997 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2));
1000 * Now that proper page tables are installed, call cpu_setup() to enable
1001 * instruction and data caches and other chip-specific features.
1006 * Only after the SOC registers block is mapped we can perform device
1007 * tree fixups, as they may attempt to read parameters from hardware.
1009 OF_interpret("perform-fixup", 0);
1011 platform_gpio_init();
1015 debugf("initarm: console initialized\n");
1016 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp);
1017 debugf(" boothowto = 0x%08x\n", boothowto);
1018 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
1021 env = kern_getenv("kernelname");
1023 strlcpy(kernelname, env, sizeof(kernelname));
1027 if (err_devmap != 0)
1028 printf("WARNING: could not fully configure devmap, error=%d\n",
1031 platform_late_init();
1034 * Pages were allocated during the secondary bootstrap for the
1035 * stacks for different CPU modes.
1036 * We must now set the r13 registers in the different CPU modes to
1037 * point to these stacks.
1038 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
1039 * of the stack memory.
1041 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE);
1046 * We must now clean the cache again....
1047 * Cleaning may be done by reading new data to displace any
1048 * dirty data in the cache. This will have happened in cpu_setttb()
1049 * but since we are boot strapping the addresses used for the read
1050 * may have just been remapped and thus the cache could be out
1051 * of sync. A re-clean after the switch will cure this.
1052 * After booting there are no gross relocations of the kernel thus
1053 * this problem will not occur after initarm().
1055 cpu_idcache_wbinv_all();
1059 init_proc0(kernelstack.pv_va);
1061 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
1062 pmap_bootstrap(freemempos, &kernel_l1pt);
1063 msgbufp = (void *)msgbufpv.pv_va;
1064 msgbufinit(msgbufp, msgbufsize);
1068 * Exclude the kernel (and all the things we allocated which immediately
1069 * follow the kernel) from the VM allocation pool but not from crash
1070 * dumps. virtual_avail is a global variable which tracks the kva we've
1071 * "allocated" while setting up pmaps.
1073 * Prepare the list of physical memory available to the vm subsystem.
1075 arm_physmem_exclude_region(abp->abp_physaddr,
1076 (virtual_avail - KERNVIRTADDR), EXFLAG_NOALLOC);
1077 arm_physmem_init_kernel_globals();
1079 init_param2(physmem);
1083 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
1084 sizeof(struct pcb)));
1086 #else /* __ARM_ARCH < 6 */
1088 initarm(struct arm_boot_params *abp)
1090 struct mem_region mem_regions[FDT_MEM_REGIONS];
1091 vm_paddr_t lastaddr;
1092 vm_offset_t dtbp, kernelstack, dpcpu;
1095 int err_devmap, mem_regions_sz;
1097 struct efi_map_header *efihdr;
1100 /* get last allocated physical address */
1101 arm_physmem_kernaddr = abp->abp_physaddr;
1102 lastaddr = parse_boot_param(abp) - KERNVIRTADDR + arm_physmem_kernaddr;
1108 * Find the dtb passed in by the boot loader.
1110 kmdp = preload_search_by_type("elf kernel");
1111 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
1112 #if defined(FDT_DTB_STATIC)
1114 * In case the device tree blob was not retrieved (from metadata) try
1115 * to use the statically embedded one.
1117 if (dtbp == (vm_offset_t)NULL)
1118 dtbp = (vm_offset_t)&fdt_static_dtb;
1121 if (OF_install(OFW_FDT, 0) == FALSE)
1122 panic("Cannot install FDT");
1124 if (OF_init((void *)dtbp) != 0)
1125 panic("OF_init failed with the found device tree");
1127 #if defined(LINUX_BOOT_ABI)
1128 arm_parse_fdt_bootargs();
1132 efihdr = (struct efi_map_header *)preload_search_info(kmdp,
1133 MODINFO_METADATA | MODINFOMD_EFI_MAP);
1134 if (efihdr != NULL) {
1135 arm_add_efi_map_entries(efihdr, mem_regions, &mem_regions_sz);
1139 /* Grab physical memory regions information from device tree. */
1140 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz,NULL) != 0)
1141 panic("Cannot get physical memory regions");
1143 arm_physmem_hardware_regions(mem_regions, mem_regions_sz);
1145 /* Grab reserved memory regions information from device tree. */
1146 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0)
1147 arm_physmem_exclude_regions(mem_regions, mem_regions_sz,
1148 EXFLAG_NODUMP | EXFLAG_NOALLOC);
1151 * Set TEX remapping registers.
1152 * Setup kernel page tables and switch to kernel L1 page table.
1155 pmap_bootstrap_prepare(lastaddr);
1158 * If EARLY_PRINTF support is enabled, we need to re-establish the
1159 * mapping after pmap_bootstrap_prepare() switches to new page tables.
1160 * Note that we can only do the remapping if the VA is outside the
1161 * kernel, now that we have real virtual (not VA=PA) mappings in effect.
1162 * Early printf does not work between the time pmap_set_tex() does
1163 * cp15_prrr_set() and this code remaps the VA.
1165 #if defined(EARLY_PRINTF) && defined(SOCDEV_PA) && defined(SOCDEV_VA) && SOCDEV_VA < KERNBASE
1166 pmap_preboot_map_attr(SOCDEV_PA, SOCDEV_VA, 1024 * 1024,
1167 VM_PROT_READ | VM_PROT_WRITE, VM_MEMATTR_DEVICE);
1171 * Now that proper page tables are installed, call cpu_setup() to enable
1172 * instruction and data caches and other chip-specific features.
1176 /* Platform-specific initialisation */
1177 platform_probe_and_attach();
1180 /* Do basic tuning, hz etc */
1184 * Allocate a page for the system page mapped to 0xffff0000
1185 * This page will just contain the system vectors and can be
1186 * shared by all processes.
1188 systempage = pmap_preboot_get_pages(1);
1190 /* Map the vector page. */
1191 pmap_preboot_map_pages(systempage, ARM_VECTORS_HIGH, 1);
1192 if (virtual_end >= ARM_VECTORS_HIGH)
1193 virtual_end = ARM_VECTORS_HIGH - 1;
1195 /* Allocate dynamic per-cpu area. */
1196 dpcpu = pmap_preboot_get_vpages(DPCPU_SIZE / PAGE_SIZE);
1197 dpcpu_init((void *)dpcpu, 0);
1199 /* Allocate stacks for all modes */
1200 irqstack = pmap_preboot_get_vpages(IRQ_STACK_SIZE * MAXCPU);
1201 abtstack = pmap_preboot_get_vpages(ABT_STACK_SIZE * MAXCPU);
1202 undstack = pmap_preboot_get_vpages(UND_STACK_SIZE * MAXCPU );
1203 kernelstack = pmap_preboot_get_vpages(kstack_pages * MAXCPU);
1205 /* Allocate message buffer. */
1206 msgbufp = (void *)pmap_preboot_get_vpages(
1207 round_page(msgbufsize) / PAGE_SIZE);
1210 * Pages were allocated during the secondary bootstrap for the
1211 * stacks for different CPU modes.
1212 * We must now set the r13 registers in the different CPU modes to
1213 * point to these stacks.
1214 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
1215 * of the stack memory.
1220 /* Establish static device mappings. */
1221 err_devmap = platform_devmap_init();
1222 devmap_bootstrap(0, NULL);
1223 vm_max_kernel_address = platform_lastaddr();
1226 * Only after the SOC registers block is mapped we can perform device
1227 * tree fixups, as they may attempt to read parameters from hardware.
1229 OF_interpret("perform-fixup", 0);
1230 platform_gpio_init();
1234 * If we made a mapping for EARLY_PRINTF after pmap_bootstrap_prepare(),
1235 * undo it now that the normal console printf works.
1237 #if defined(EARLY_PRINTF) && defined(SOCDEV_PA) && defined(SOCDEV_VA) && SOCDEV_VA < KERNBASE
1238 pmap_kremove(SOCDEV_VA);
1241 debugf("initarm: console initialized\n");
1242 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp);
1243 debugf(" boothowto = 0x%08x\n", boothowto);
1244 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
1245 debugf(" lastaddr1: 0x%08x\n", lastaddr);
1248 env = kern_getenv("kernelname");
1250 strlcpy(kernelname, env, sizeof(kernelname));
1252 if (err_devmap != 0)
1253 printf("WARNING: could not fully configure devmap, error=%d\n",
1256 platform_late_init();
1259 * We must now clean the cache again....
1260 * Cleaning may be done by reading new data to displace any
1261 * dirty data in the cache. This will have happened in cpu_setttb()
1262 * but since we are boot strapping the addresses used for the read
1263 * may have just been remapped and thus the cache could be out
1264 * of sync. A re-clean after the switch will cure this.
1265 * After booting there are no gross relocations of the kernel thus
1266 * this problem will not occur after initarm().
1268 /* Set stack for exception handlers */
1270 init_proc0(kernelstack);
1271 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
1272 enable_interrupts(PSR_A);
1275 /* Exclude the kernel (and all the things we allocated which immediately
1276 * follow the kernel) from the VM allocation pool but not from crash
1277 * dumps. virtual_avail is a global variable which tracks the kva we've
1278 * "allocated" while setting up pmaps.
1280 * Prepare the list of physical memory available to the vm subsystem.
1282 arm_physmem_exclude_region(abp->abp_physaddr,
1283 pmap_preboot_get_pages(0) - abp->abp_physaddr, EXFLAG_NOALLOC);
1284 arm_physmem_init_kernel_globals();
1286 init_param2(physmem);
1287 /* Init message buffer. */
1288 msgbufinit(msgbufp, msgbufsize);
1291 /* Apply possible BP hardening. */
1292 cpuinfo_init_bp_hardening();
1293 return ((void *)STACKALIGN(thread0.td_pcb));
1297 #endif /* __ARM_ARCH < 6 */