1 /* $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $ */
4 * SPDX-License-Identifier: BSD-4-Clause
6 * Copyright (c) 2004 Olivier Houchard
7 * Copyright (c) 1994-1998 Mark Brinicombe.
8 * Copyright (c) 1994 Brini.
11 * This code is derived from software written for Brini by Mark Brinicombe
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
21 * 3. All advertising materials mentioning features or use of this software
22 * must display the following acknowledgement:
23 * This product includes software developed by Mark Brinicombe
24 * for the NetBSD Project.
25 * 4. The name of the company nor the name of the author may be used to
26 * endorse or promote products derived from this software without specific
27 * prior written permission.
29 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
31 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
32 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
41 * Machine dependent functions for kernel setup
44 * Updated : 18/04/01 updated for new wscons
48 #include "opt_kstack_pages.h"
49 #include "opt_platform.h"
50 #include "opt_sched.h"
51 #include "opt_timer.h"
53 #include <sys/cdefs.h>
54 __FBSDID("$FreeBSD$");
56 #include <sys/param.h>
61 #include <sys/devmap.h>
63 #include <sys/imgact.h>
65 #include <sys/kernel.h>
66 #include <sys/linker.h>
67 #include <sys/msgbuf.h>
68 #include <sys/reboot.h>
69 #include <sys/rwlock.h>
70 #include <sys/sched.h>
71 #include <sys/syscallsubr.h>
72 #include <sys/sysent.h>
73 #include <sys/sysproto.h>
74 #include <sys/vmmeter.h>
76 #include <vm/vm_object.h>
77 #include <vm/vm_page.h>
78 #include <vm/vm_pager.h>
80 #include <machine/asm.h>
81 #include <machine/debug_monitor.h>
82 #include <machine/machdep.h>
83 #include <machine/metadata.h>
84 #include <machine/pcb.h>
85 #include <machine/physmem.h>
86 #include <machine/platform.h>
87 #include <machine/sysarch.h>
88 #include <machine/undefined.h>
89 #include <machine/vfp.h>
90 #include <machine/vmparam.h>
93 #include <dev/fdt/fdt_common.h>
94 #include <machine/ofw_machdep.h>
98 #define debugf(fmt, args...) printf(fmt, ##args)
100 #define debugf(fmt, args...)
103 #if defined(COMPAT_FREEBSD4) || defined(COMPAT_FREEBSD5) || \
104 defined(COMPAT_FREEBSD6) || defined(COMPAT_FREEBSD7) || \
105 defined(COMPAT_FREEBSD9)
106 #error FreeBSD/arm doesn't provide compatibility with releases prior to 10
109 #if __ARM_ARCH >= 6 && !defined(INTRNG)
110 #error armv6 requires INTRNG
114 #error FreeBSD requires ARMv5 or later
117 struct pcpu __pcpu[MAXCPU];
118 struct pcpu *pcpup = &__pcpu[0];
120 static struct trapframe proc0_tf;
121 uint32_t cpu_reset_address = 0;
123 vm_offset_t vector_page;
125 int (*_arm_memcpy)(void *, void *, int, int) = NULL;
126 int (*_arm_bzero)(void *, int, int) = NULL;
127 int _min_memcpy_size = 0;
128 int _min_bzero_size = 0;
135 vm_offset_t systempage;
136 vm_offset_t irqstack;
137 vm_offset_t undstack;
138 vm_offset_t abtstack;
141 * This is the number of L2 page tables required for covering max
142 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf,
143 * stacks etc.), uprounded to be divisible by 4.
145 #define KERNEL_PT_MAX 78
146 static struct pv_addr kernel_pt_table[KERNEL_PT_MAX];
147 struct pv_addr systempage;
148 static struct pv_addr msgbufpv;
149 struct pv_addr irqstack;
150 struct pv_addr undstack;
151 struct pv_addr abtstack;
152 static struct pv_addr kernelstack;
153 #endif /* __ARM_ARCH >= 6 */
157 static delay_func *delay_impl;
158 static void *delay_arg;
161 struct kva_md_info kmi;
166 * Initialize the vector page, and select whether or not to
167 * relocate the vectors.
169 * NOTE: We expect the vector page to be mapped at its expected
173 extern unsigned int page0[], page0_data[];
175 arm_vector_init(vm_offset_t va, int which)
177 unsigned int *vectors = (int *) va;
178 unsigned int *vectors_data = vectors + (page0_data - page0);
182 * Loop through the vectors we're taking over, and copy the
183 * vector's insn and data word.
185 for (vec = 0; vec < ARM_NVEC; vec++) {
186 if ((which & (1 << vec)) == 0) {
187 /* Don't want to take over this vector. */
190 vectors[vec] = page0[vec];
191 vectors_data[vec] = page0_data[vec];
194 /* Now sync the vectors. */
195 icache_sync(va, (ARM_NVEC * 2) * sizeof(u_int));
199 if (va == ARM_VECTORS_HIGH) {
201 * Enable high vectors in the system control reg (SCTLR).
203 * Assume the MD caller knows what it's doing here, and really
204 * does want the vector page relocated.
206 * Note: This has to be done here (and not just in
207 * cpu_setup()) because the vector page needs to be
208 * accessible *before* cpu_startup() is called.
211 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC);
217 cpu_startup(void *dummy)
219 struct pcb *pcb = thread0.td_pcb;
220 const unsigned int mbyte = 1024 * 1024;
221 #if __ARM_ARCH < 6 && !defined(ARM_CACHE_LOCK_ENABLE)
227 vm_ksubmap_init(&kmi);
230 * Display the RAM layout.
232 printf("real memory = %ju (%ju MB)\n",
233 (uintmax_t)arm32_ptob(realmem),
234 (uintmax_t)arm32_ptob(realmem) / mbyte);
235 printf("avail memory = %ju (%ju MB)\n",
236 (uintmax_t)arm32_ptob(vm_free_count()),
237 (uintmax_t)arm32_ptob(vm_free_count()) / mbyte);
239 arm_physmem_print_tables();
240 devmap_print_table();
244 vm_pager_bufferinit();
245 pcb->pcb_regs.sf_sp = (u_int)thread0.td_kstack +
246 USPACE_SVC_STACK_TOP;
247 pmap_set_pcb_pagedir(kernel_pmap, pcb);
249 vector_page_setprot(VM_PROT_READ);
251 #ifdef ARM_CACHE_LOCK_ENABLE
252 pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS);
253 arm_lock_cache_line(ARM_TP_ADDRESS);
255 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO);
256 pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m));
258 *(uint32_t *)ARM_RAS_START = 0;
259 *(uint32_t *)ARM_RAS_END = 0xffffffff;
263 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
266 * Flush the D-cache for non-DMA I/O so that the I-cache can
267 * be made coherent later.
270 cpu_flush_dcache(void *ptr, size_t len)
273 dcache_wb_poc((vm_offset_t)ptr, (vm_paddr_t)vtophys(ptr), len);
276 /* Get current clock frequency for the given cpu id. */
278 cpu_est_clockrate(int cpu_id, uint64_t *rate)
283 pc = pcpu_find(cpu_id);
284 if (pc == NULL || rate == NULL)
287 if (pc->pc_clock == 0)
290 *rate = pc->pc_clock;
302 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", busy, curcpu);
304 #ifndef NO_EVENTTIMERS
308 if (!sched_runnable())
310 #ifndef NO_EVENTTIMERS
315 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", busy, curcpu);
319 cpu_idle_wakeup(int cpu)
325 #ifdef NO_EVENTTIMERS
327 * Most ARM platforms don't need to do anything special to init their clocks
328 * (they get intialized during normal device attachment), and by not defining a
329 * cpu_initclocks() function they get this generic one. Any platform that needs
330 * to do something special can just provide their own implementation, which will
331 * override this one due to the weak linkage.
334 arm_generic_initclocks(void)
337 __weak_reference(arm_generic_initclocks, cpu_initclocks);
345 if (PCPU_GET(cpuid) == 0)
346 cpu_initclocks_bsp();
350 cpu_initclocks_bsp();
357 arm_set_delay(delay_func *impl, void *arg)
360 KASSERT(impl != NULL, ("No DELAY implementation"));
370 delay_impl(usec, delay_arg);
376 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
387 if (td->td_md.md_spinlock_count == 0) {
388 cspr = disable_interrupts(PSR_I | PSR_F);
389 td->td_md.md_spinlock_count = 1;
390 td->td_md.md_saved_cspr = cspr;
392 td->td_md.md_spinlock_count++;
404 cspr = td->td_md.md_saved_cspr;
405 td->td_md.md_spinlock_count--;
406 if (td->td_md.md_spinlock_count == 0)
407 restore_interrupts(cspr);
411 * Clear registers on exec
414 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
416 struct trapframe *tf = td->td_frame;
418 memset(tf, 0, sizeof(*tf));
419 tf->tf_usr_sp = stack;
420 tf->tf_usr_lr = imgp->entry_addr;
421 tf->tf_svc_lr = 0x77777777;
422 tf->tf_pc = imgp->entry_addr;
423 tf->tf_spsr = PSR_USR32_MODE;
429 * Get machine VFP context.
432 get_vfpcontext(struct thread *td, mcontext_vfp_t *vfp)
437 if (td == curthread) {
439 vfp_store(&pcb->pcb_vfpstate, false);
442 MPASS(TD_IS_SUSPENDED(td));
443 memcpy(vfp->mcv_reg, pcb->pcb_vfpstate.reg,
444 sizeof(vfp->mcv_reg));
445 vfp->mcv_fpscr = pcb->pcb_vfpstate.fpscr;
449 * Set machine VFP context.
452 set_vfpcontext(struct thread *td, mcontext_vfp_t *vfp)
457 if (td == curthread) {
462 MPASS(TD_IS_SUSPENDED(td));
463 memcpy(pcb->pcb_vfpstate.reg, vfp->mcv_reg,
464 sizeof(pcb->pcb_vfpstate.reg));
465 pcb->pcb_vfpstate.fpscr = vfp->mcv_fpscr;
470 arm_get_vfpstate(struct thread *td, void *args)
473 struct arm_get_vfpstate_args ua;
474 mcontext_vfp_t mcontext_vfp;
476 rv = copyin(args, &ua, sizeof(ua));
479 if (ua.mc_vfp_size != sizeof(mcontext_vfp_t))
482 get_vfpcontext(td, &mcontext_vfp);
484 bzero(&mcontext_vfp, sizeof(mcontext_vfp));
487 rv = copyout(&mcontext_vfp, ua.mc_vfp, sizeof(mcontext_vfp));
494 * Get machine context.
497 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret)
499 struct trapframe *tf = td->td_frame;
500 __greg_t *gr = mcp->__gregs;
502 if (clear_ret & GET_MC_CLEAR_RET) {
504 gr[_REG_CPSR] = tf->tf_spsr & ~PSR_C;
506 gr[_REG_R0] = tf->tf_r0;
507 gr[_REG_CPSR] = tf->tf_spsr;
509 gr[_REG_R1] = tf->tf_r1;
510 gr[_REG_R2] = tf->tf_r2;
511 gr[_REG_R3] = tf->tf_r3;
512 gr[_REG_R4] = tf->tf_r4;
513 gr[_REG_R5] = tf->tf_r5;
514 gr[_REG_R6] = tf->tf_r6;
515 gr[_REG_R7] = tf->tf_r7;
516 gr[_REG_R8] = tf->tf_r8;
517 gr[_REG_R9] = tf->tf_r9;
518 gr[_REG_R10] = tf->tf_r10;
519 gr[_REG_R11] = tf->tf_r11;
520 gr[_REG_R12] = tf->tf_r12;
521 gr[_REG_SP] = tf->tf_usr_sp;
522 gr[_REG_LR] = tf->tf_usr_lr;
523 gr[_REG_PC] = tf->tf_pc;
525 mcp->mc_vfp_size = 0;
526 mcp->mc_vfp_ptr = NULL;
527 memset(&mcp->mc_spare, 0, sizeof(mcp->mc_spare));
533 * Set machine context.
535 * However, we don't set any but the user modifiable flags, and we won't
536 * touch the cs selector.
539 set_mcontext(struct thread *td, mcontext_t *mcp)
541 mcontext_vfp_t mc_vfp, *vfp;
542 struct trapframe *tf = td->td_frame;
543 const __greg_t *gr = mcp->__gregs;
547 * Make sure the processor mode has not been tampered with and
548 * interrupts have not been disabled.
550 spsr = gr[_REG_CPSR];
551 if ((spsr & PSR_MODE) != PSR_USR32_MODE ||
552 (spsr & (PSR_I | PSR_F)) != 0)
556 if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_size != sizeof(mc_vfp)) {
557 printf("%s: %s: Malformed mc_vfp_size: %d (0x%08X)\n",
558 td->td_proc->p_comm, __func__,
559 mcp->mc_vfp_size, mcp->mc_vfp_size);
560 } else if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_ptr == NULL) {
561 printf("%s: %s: c_vfp_size != 0 but mc_vfp_ptr == NULL\n",
562 td->td_proc->p_comm, __func__);
566 if (mcp->mc_vfp_size == sizeof(mc_vfp) && mcp->mc_vfp_ptr != NULL) {
567 if (copyin(mcp->mc_vfp_ptr, &mc_vfp, sizeof(mc_vfp)) != 0)
574 tf->tf_r0 = gr[_REG_R0];
575 tf->tf_r1 = gr[_REG_R1];
576 tf->tf_r2 = gr[_REG_R2];
577 tf->tf_r3 = gr[_REG_R3];
578 tf->tf_r4 = gr[_REG_R4];
579 tf->tf_r5 = gr[_REG_R5];
580 tf->tf_r6 = gr[_REG_R6];
581 tf->tf_r7 = gr[_REG_R7];
582 tf->tf_r8 = gr[_REG_R8];
583 tf->tf_r9 = gr[_REG_R9];
584 tf->tf_r10 = gr[_REG_R10];
585 tf->tf_r11 = gr[_REG_R11];
586 tf->tf_r12 = gr[_REG_R12];
587 tf->tf_usr_sp = gr[_REG_SP];
588 tf->tf_usr_lr = gr[_REG_LR];
589 tf->tf_pc = gr[_REG_PC];
590 tf->tf_spsr = gr[_REG_CPSR];
593 set_vfpcontext(td, vfp);
599 sendsig(catcher, ksi, mask)
606 struct trapframe *tf;
607 struct sigframe *fp, frame;
609 struct sysentvec *sysent;
616 PROC_LOCK_ASSERT(p, MA_OWNED);
617 sig = ksi->ksi_signo;
618 code = ksi->ksi_code;
620 mtx_assert(&psp->ps_mtx, MA_OWNED);
622 onstack = sigonstack(tf->tf_usr_sp);
624 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm,
627 /* Allocate and validate space for the signal handler context. */
628 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !(onstack) &&
629 SIGISMEMBER(psp->ps_sigonstack, sig)) {
630 fp = (struct sigframe *)((uintptr_t)td->td_sigstk.ss_sp +
631 td->td_sigstk.ss_size);
632 #if defined(COMPAT_43)
633 td->td_sigstk.ss_flags |= SS_ONSTACK;
636 fp = (struct sigframe *)td->td_frame->tf_usr_sp;
638 /* make room on the stack */
641 /* make the stack aligned */
642 fp = (struct sigframe *)STACKALIGN(fp);
643 /* Populate the siginfo frame. */
644 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0);
646 get_vfpcontext(td, &frame.sf_vfp);
647 frame.sf_uc.uc_mcontext.mc_vfp_size = sizeof(fp->sf_vfp);
648 frame.sf_uc.uc_mcontext.mc_vfp_ptr = &fp->sf_vfp;
650 frame.sf_uc.uc_mcontext.mc_vfp_size = 0;
651 frame.sf_uc.uc_mcontext.mc_vfp_ptr = NULL;
653 frame.sf_si = ksi->ksi_info;
654 frame.sf_uc.uc_sigmask = *mask;
655 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK )
656 ? ((onstack) ? SS_ONSTACK : 0) : SS_DISABLE;
657 frame.sf_uc.uc_stack = td->td_sigstk;
658 mtx_unlock(&psp->ps_mtx);
659 PROC_UNLOCK(td->td_proc);
661 /* Copy the sigframe out to the user's stack. */
662 if (copyout(&frame, fp, sizeof(*fp)) != 0) {
663 /* Process has trashed its stack. Kill it. */
664 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp);
670 * Build context to run handler in. We invoke the handler
671 * directly, only returning via the trampoline. Note the
672 * trampoline version numbers are coordinated with machine-
673 * dependent code in libc.
677 tf->tf_r1 = (register_t)&fp->sf_si;
678 tf->tf_r2 = (register_t)&fp->sf_uc;
680 /* the trampoline uses r5 as the uc address */
681 tf->tf_r5 = (register_t)&fp->sf_uc;
682 tf->tf_pc = (register_t)catcher;
683 tf->tf_usr_sp = (register_t)fp;
684 sysent = p->p_sysent;
685 if (sysent->sv_sigcode_base != 0)
686 tf->tf_usr_lr = (register_t)sysent->sv_sigcode_base;
688 tf->tf_usr_lr = (register_t)(sysent->sv_psstrings -
689 *(sysent->sv_szsigcode));
690 /* Set the mode to enter in the signal handler */
692 if ((register_t)catcher & 1)
693 tf->tf_spsr |= PSR_T;
695 tf->tf_spsr &= ~PSR_T;
698 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr,
702 mtx_lock(&psp->ps_mtx);
706 sys_sigreturn(td, uap)
708 struct sigreturn_args /* {
709 const struct __ucontext *sigcntxp;
717 if (copyin(uap->sigcntxp, &uc, sizeof(uc)))
719 /* Restore register context. */
720 error = set_mcontext(td, &uc.uc_mcontext);
724 /* Restore signal mask. */
725 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
727 return (EJUSTRETURN);
731 * Construct a PCB from a trapframe. This is called from kdb_trap() where
732 * we want to start a backtrace from the function that caused us to enter
733 * the debugger. We have the context in the trapframe, but base the trace
734 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
735 * enough for a backtrace.
738 makectx(struct trapframe *tf, struct pcb *pcb)
740 pcb->pcb_regs.sf_r4 = tf->tf_r4;
741 pcb->pcb_regs.sf_r5 = tf->tf_r5;
742 pcb->pcb_regs.sf_r6 = tf->tf_r6;
743 pcb->pcb_regs.sf_r7 = tf->tf_r7;
744 pcb->pcb_regs.sf_r8 = tf->tf_r8;
745 pcb->pcb_regs.sf_r9 = tf->tf_r9;
746 pcb->pcb_regs.sf_r10 = tf->tf_r10;
747 pcb->pcb_regs.sf_r11 = tf->tf_r11;
748 pcb->pcb_regs.sf_r12 = tf->tf_r12;
749 pcb->pcb_regs.sf_pc = tf->tf_pc;
750 pcb->pcb_regs.sf_lr = tf->tf_usr_lr;
751 pcb->pcb_regs.sf_sp = tf->tf_usr_sp;
758 set_curthread(&thread0);
760 pcpu_init(pcpup, 0, sizeof(struct pcpu));
761 PCPU_SET(curthread, &thread0);
768 init_proc0(vm_offset_t kstack)
770 proc_linkup0(&proc0, &thread0);
771 thread0.td_kstack = kstack;
772 thread0.td_pcb = (struct pcb *)
773 (thread0.td_kstack + kstack_pages * PAGE_SIZE) - 1;
774 thread0.td_pcb->pcb_flags = 0;
775 thread0.td_pcb->pcb_vfpcpu = -1;
776 thread0.td_pcb->pcb_vfpstate.fpscr = VFPSCR_DN;
777 thread0.td_frame = &proc0_tf;
778 pcpup->pc_curpcb = thread0.td_pcb;
783 set_stackptrs(int cpu)
786 set_stackptr(PSR_IRQ32_MODE,
787 irqstack + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
788 set_stackptr(PSR_ABT32_MODE,
789 abtstack + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
790 set_stackptr(PSR_UND32_MODE,
791 undstack + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
795 set_stackptrs(int cpu)
798 set_stackptr(PSR_IRQ32_MODE,
799 irqstack.pv_va + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
800 set_stackptr(PSR_ABT32_MODE,
801 abtstack.pv_va + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
802 set_stackptr(PSR_UND32_MODE,
803 undstack.pv_va + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
813 if (boothowto & RB_KDB)
814 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
821 initarm(struct arm_boot_params *abp)
823 struct mem_region mem_regions[FDT_MEM_REGIONS];
824 struct pv_addr kernel_l1pt;
825 struct pv_addr dpcpu;
826 vm_offset_t dtbp, freemempos, l2_start, lastaddr;
832 int i, j, err_devmap, mem_regions_sz;
834 lastaddr = parse_boot_param(abp);
835 arm_physmem_kernaddr = abp->abp_physaddr;
843 * Find the dtb passed in by the boot loader.
845 kmdp = preload_search_by_type("elf kernel");
847 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
849 dtbp = (vm_offset_t)NULL;
851 #if defined(FDT_DTB_STATIC)
853 * In case the device tree blob was not retrieved (from metadata) try
854 * to use the statically embedded one.
856 if (dtbp == (vm_offset_t)NULL)
857 dtbp = (vm_offset_t)&fdt_static_dtb;
860 if (OF_install(OFW_FDT, 0) == FALSE)
861 panic("Cannot install FDT");
863 if (OF_init((void *)dtbp) != 0)
864 panic("OF_init failed with the found device tree");
866 /* Grab physical memory regions information from device tree. */
867 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz, &memsize) != 0)
868 panic("Cannot get physical memory regions");
869 arm_physmem_hardware_regions(mem_regions, mem_regions_sz);
871 /* Grab reserved memory regions information from device tree. */
872 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0)
873 arm_physmem_exclude_regions(mem_regions, mem_regions_sz,
874 EXFLAG_NODUMP | EXFLAG_NOALLOC);
876 /* Platform-specific initialisation */
877 platform_probe_and_attach();
881 /* Do basic tuning, hz etc */
884 /* Calculate number of L2 tables needed for mapping vm_page_array */
885 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page);
886 l2size = (l2size >> L1_S_SHIFT) + 1;
889 * Add one table for end of kernel map, one for stacks, msgbuf and
890 * L1 and L2 tables map, one for vectors map and two for
891 * l2 structures from pmap_bootstrap.
895 /* Make it divisible by 4 */
896 l2size = (l2size + 3) & ~3;
898 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK;
900 /* Define a macro to simplify memory allocation */
901 #define valloc_pages(var, np) \
902 alloc_pages((var).pv_va, (np)); \
903 (var).pv_pa = (var).pv_va + (abp->abp_physaddr - KERNVIRTADDR);
905 #define alloc_pages(var, np) \
906 (var) = freemempos; \
907 freemempos += (np * PAGE_SIZE); \
908 memset((char *)(var), 0, ((np) * PAGE_SIZE));
910 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
911 freemempos += PAGE_SIZE;
912 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
914 for (i = 0, j = 0; i < l2size; ++i) {
915 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
916 valloc_pages(kernel_pt_table[i],
917 L2_TABLE_SIZE / PAGE_SIZE);
920 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va +
921 L2_TABLE_SIZE_REAL * (i - j);
922 kernel_pt_table[i].pv_pa =
923 kernel_pt_table[i].pv_va - KERNVIRTADDR +
929 * Allocate a page for the system page mapped to 0x00000000
930 * or 0xffff0000. This page will just contain the system vectors
931 * and can be shared by all processes.
933 valloc_pages(systempage, 1);
935 /* Allocate dynamic per-cpu area. */
936 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
937 dpcpu_init((void *)dpcpu.pv_va, 0);
939 /* Allocate stacks for all modes */
940 valloc_pages(irqstack, IRQ_STACK_SIZE * MAXCPU);
941 valloc_pages(abtstack, ABT_STACK_SIZE * MAXCPU);
942 valloc_pages(undstack, UND_STACK_SIZE * MAXCPU);
943 valloc_pages(kernelstack, kstack_pages * MAXCPU);
944 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
947 * Now we start construction of the L1 page table
948 * We start by mapping the L2 page tables into the L1.
949 * This means that we can replace L1 mappings later on if necessary
951 l1pagetable = kernel_l1pt.pv_va;
954 * Try to map as much as possible of kernel text and data using
955 * 1MB section mapping and for the rest of initial kernel address
956 * space use L2 coarse tables.
958 * Link L2 tables for mapping remainder of kernel (modulo 1MB)
959 * and kernel structures
961 l2_start = lastaddr & ~(L1_S_OFFSET);
962 for (i = 0 ; i < l2size - 1; i++)
963 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE,
964 &kernel_pt_table[i]);
966 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE;
968 /* Map kernel code and data */
969 pmap_map_chunk(l1pagetable, KERNVIRTADDR, abp->abp_physaddr,
970 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK,
971 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
973 /* Map L1 directory and allocated L2 page tables */
974 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
975 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
977 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va,
978 kernel_pt_table[0].pv_pa,
979 L2_TABLE_SIZE_REAL * l2size,
980 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
982 /* Map allocated DPCPU, stacks and msgbuf */
983 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa,
984 freemempos - dpcpu.pv_va,
985 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
987 /* Link and map the vector page */
988 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH,
989 &kernel_pt_table[l2size - 1]);
990 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
991 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE);
993 /* Establish static device mappings. */
994 err_devmap = platform_devmap_init();
995 devmap_bootstrap(l1pagetable, NULL);
996 vm_max_kernel_address = platform_lastaddr();
998 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT);
999 pmap_pa = kernel_l1pt.pv_pa;
1000 cpu_setttb(kernel_l1pt.pv_pa);
1002 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2));
1005 * Now that proper page tables are installed, call cpu_setup() to enable
1006 * instruction and data caches and other chip-specific features.
1011 * Only after the SOC registers block is mapped we can perform device
1012 * tree fixups, as they may attempt to read parameters from hardware.
1014 OF_interpret("perform-fixup", 0);
1016 platform_gpio_init();
1020 debugf("initarm: console initialized\n");
1021 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp);
1022 debugf(" boothowto = 0x%08x\n", boothowto);
1023 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
1026 env = kern_getenv("kernelname");
1028 strlcpy(kernelname, env, sizeof(kernelname));
1032 if (err_devmap != 0)
1033 printf("WARNING: could not fully configure devmap, error=%d\n",
1036 platform_late_init();
1039 * Pages were allocated during the secondary bootstrap for the
1040 * stacks for different CPU modes.
1041 * We must now set the r13 registers in the different CPU modes to
1042 * point to these stacks.
1043 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
1044 * of the stack memory.
1046 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE);
1051 * We must now clean the cache again....
1052 * Cleaning may be done by reading new data to displace any
1053 * dirty data in the cache. This will have happened in cpu_setttb()
1054 * but since we are boot strapping the addresses used for the read
1055 * may have just been remapped and thus the cache could be out
1056 * of sync. A re-clean after the switch will cure this.
1057 * After booting there are no gross relocations of the kernel thus
1058 * this problem will not occur after initarm().
1060 cpu_idcache_wbinv_all();
1064 init_proc0(kernelstack.pv_va);
1066 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
1067 pmap_bootstrap(freemempos, &kernel_l1pt);
1068 msgbufp = (void *)msgbufpv.pv_va;
1069 msgbufinit(msgbufp, msgbufsize);
1073 * Exclude the kernel (and all the things we allocated which immediately
1074 * follow the kernel) from the VM allocation pool but not from crash
1075 * dumps. virtual_avail is a global variable which tracks the kva we've
1076 * "allocated" while setting up pmaps.
1078 * Prepare the list of physical memory available to the vm subsystem.
1080 arm_physmem_exclude_region(abp->abp_physaddr,
1081 (virtual_avail - KERNVIRTADDR), EXFLAG_NOALLOC);
1082 arm_physmem_init_kernel_globals();
1084 init_param2(physmem);
1088 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
1089 sizeof(struct pcb)));
1091 #else /* __ARM_ARCH < 6 */
1093 initarm(struct arm_boot_params *abp)
1095 struct mem_region mem_regions[FDT_MEM_REGIONS];
1096 vm_paddr_t lastaddr;
1097 vm_offset_t dtbp, kernelstack, dpcpu;
1100 int err_devmap, mem_regions_sz;
1102 struct efi_map_header *efihdr;
1105 /* get last allocated physical address */
1106 arm_physmem_kernaddr = abp->abp_physaddr;
1107 lastaddr = parse_boot_param(abp) - KERNVIRTADDR + arm_physmem_kernaddr;
1113 * Find the dtb passed in by the boot loader.
1115 kmdp = preload_search_by_type("elf kernel");
1116 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
1117 #if defined(FDT_DTB_STATIC)
1119 * In case the device tree blob was not retrieved (from metadata) try
1120 * to use the statically embedded one.
1122 if (dtbp == (vm_offset_t)NULL)
1123 dtbp = (vm_offset_t)&fdt_static_dtb;
1126 if (OF_install(OFW_FDT, 0) == FALSE)
1127 panic("Cannot install FDT");
1129 if (OF_init((void *)dtbp) != 0)
1130 panic("OF_init failed with the found device tree");
1132 #if defined(LINUX_BOOT_ABI)
1133 arm_parse_fdt_bootargs();
1137 efihdr = (struct efi_map_header *)preload_search_info(kmdp,
1138 MODINFO_METADATA | MODINFOMD_EFI_MAP);
1139 if (efihdr != NULL) {
1140 arm_add_efi_map_entries(efihdr, mem_regions, &mem_regions_sz);
1144 /* Grab physical memory regions information from device tree. */
1145 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz,NULL) != 0)
1146 panic("Cannot get physical memory regions");
1148 arm_physmem_hardware_regions(mem_regions, mem_regions_sz);
1150 /* Grab reserved memory regions information from device tree. */
1151 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0)
1152 arm_physmem_exclude_regions(mem_regions, mem_regions_sz,
1153 EXFLAG_NODUMP | EXFLAG_NOALLOC);
1156 * Set TEX remapping registers.
1157 * Setup kernel page tables and switch to kernel L1 page table.
1160 pmap_bootstrap_prepare(lastaddr);
1163 * If EARLY_PRINTF support is enabled, we need to re-establish the
1164 * mapping after pmap_bootstrap_prepare() switches to new page tables.
1165 * Note that we can only do the remapping if the VA is outside the
1166 * kernel, now that we have real virtual (not VA=PA) mappings in effect.
1167 * Early printf does not work between the time pmap_set_tex() does
1168 * cp15_prrr_set() and this code remaps the VA.
1170 #if defined(EARLY_PRINTF) && defined(SOCDEV_PA) && defined(SOCDEV_VA) && SOCDEV_VA < KERNBASE
1171 pmap_preboot_map_attr(SOCDEV_PA, SOCDEV_VA, 1024 * 1024,
1172 VM_PROT_READ | VM_PROT_WRITE, VM_MEMATTR_DEVICE);
1176 * Now that proper page tables are installed, call cpu_setup() to enable
1177 * instruction and data caches and other chip-specific features.
1181 /* Platform-specific initialisation */
1182 platform_probe_and_attach();
1185 /* Do basic tuning, hz etc */
1189 * Allocate a page for the system page mapped to 0xffff0000
1190 * This page will just contain the system vectors and can be
1191 * shared by all processes.
1193 systempage = pmap_preboot_get_pages(1);
1195 /* Map the vector page. */
1196 pmap_preboot_map_pages(systempage, ARM_VECTORS_HIGH, 1);
1197 if (virtual_end >= ARM_VECTORS_HIGH)
1198 virtual_end = ARM_VECTORS_HIGH - 1;
1200 /* Allocate dynamic per-cpu area. */
1201 dpcpu = pmap_preboot_get_vpages(DPCPU_SIZE / PAGE_SIZE);
1202 dpcpu_init((void *)dpcpu, 0);
1204 /* Allocate stacks for all modes */
1205 irqstack = pmap_preboot_get_vpages(IRQ_STACK_SIZE * MAXCPU);
1206 abtstack = pmap_preboot_get_vpages(ABT_STACK_SIZE * MAXCPU);
1207 undstack = pmap_preboot_get_vpages(UND_STACK_SIZE * MAXCPU );
1208 kernelstack = pmap_preboot_get_vpages(kstack_pages * MAXCPU);
1210 /* Allocate message buffer. */
1211 msgbufp = (void *)pmap_preboot_get_vpages(
1212 round_page(msgbufsize) / PAGE_SIZE);
1215 * Pages were allocated during the secondary bootstrap for the
1216 * stacks for different CPU modes.
1217 * We must now set the r13 registers in the different CPU modes to
1218 * point to these stacks.
1219 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
1220 * of the stack memory.
1225 /* Establish static device mappings. */
1226 err_devmap = platform_devmap_init();
1227 devmap_bootstrap(0, NULL);
1228 vm_max_kernel_address = platform_lastaddr();
1231 * Only after the SOC registers block is mapped we can perform device
1232 * tree fixups, as they may attempt to read parameters from hardware.
1234 OF_interpret("perform-fixup", 0);
1235 platform_gpio_init();
1239 * If we made a mapping for EARLY_PRINTF after pmap_bootstrap_prepare(),
1240 * undo it now that the normal console printf works.
1242 #if defined(EARLY_PRINTF) && defined(SOCDEV_PA) && defined(SOCDEV_VA) && SOCDEV_VA < KERNBASE
1243 pmap_kremove(SOCDEV_VA);
1246 debugf("initarm: console initialized\n");
1247 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp);
1248 debugf(" boothowto = 0x%08x\n", boothowto);
1249 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
1250 debugf(" lastaddr1: 0x%08x\n", lastaddr);
1253 env = kern_getenv("kernelname");
1255 strlcpy(kernelname, env, sizeof(kernelname));
1257 if (err_devmap != 0)
1258 printf("WARNING: could not fully configure devmap, error=%d\n",
1261 platform_late_init();
1264 * We must now clean the cache again....
1265 * Cleaning may be done by reading new data to displace any
1266 * dirty data in the cache. This will have happened in cpu_setttb()
1267 * but since we are boot strapping the addresses used for the read
1268 * may have just been remapped and thus the cache could be out
1269 * of sync. A re-clean after the switch will cure this.
1270 * After booting there are no gross relocations of the kernel thus
1271 * this problem will not occur after initarm().
1273 /* Set stack for exception handlers */
1275 init_proc0(kernelstack);
1276 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
1277 enable_interrupts(PSR_A);
1280 /* Exclude the kernel (and all the things we allocated which immediately
1281 * follow the kernel) from the VM allocation pool but not from crash
1282 * dumps. virtual_avail is a global variable which tracks the kva we've
1283 * "allocated" while setting up pmaps.
1285 * Prepare the list of physical memory available to the vm subsystem.
1287 arm_physmem_exclude_region(abp->abp_physaddr,
1288 pmap_preboot_get_pages(0) - abp->abp_physaddr, EXFLAG_NOALLOC);
1289 arm_physmem_init_kernel_globals();
1291 init_param2(physmem);
1292 /* Init message buffer. */
1293 msgbufinit(msgbufp, msgbufsize);
1296 /* Apply possible BP hardening. */
1297 cpuinfo_init_bp_hardening();
1298 return ((void *)STACKALIGN(thread0.td_pcb));
1302 #endif /* __ARM_ARCH < 6 */