2 * Copyright (c) 2012-2017 Oleksandr Tymoshenko <gonzo@bluezbox.com>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include <sys/param.h>
31 #include <sys/systm.h>
33 #include <sys/kernel.h>
35 #include <sys/module.h>
38 #include <machine/bus.h>
39 #include <machine/intr.h>
41 #include <dev/ofw/openfirm.h>
42 #include <dev/ofw/ofw_bus.h>
43 #include <dev/ofw/ofw_bus_subr.h>
48 #define dprintf(fmt, args...) printf(fmt, ##args)
50 #define dprintf(fmt, args...)
53 #define VICIRQSTATUS 0x000
54 #define VICFIQSTATUS 0x004
55 #define VICRAWINTR 0x008
56 #define VICINTSELECT 0x00C
57 #define VICINTENABLE 0x010
58 #define VICINTENCLEAR 0x014
59 #define VICSOFTINT 0x018
60 #define VICSOFTINTCLEAR 0x01C
61 #define VICPROTECTION 0x020
62 #define VICPERIPHID 0xFE0
63 #define VICPRIMECELLID 0xFF0
67 struct pl190_intc_irqsrc {
68 struct intr_irqsrc isrc;
72 struct pl190_intc_softc {
75 struct resource * intc_res;
76 struct pl190_intc_irqsrc isrcs[VIC_NIRQS];
79 #define INTC_VIC_READ_4(sc, reg) \
80 bus_read_4(sc->intc_res, (reg))
81 #define INTC_VIC_WRITE_4(sc, reg, val) \
82 bus_write_4(sc->intc_res, (reg), (val))
84 #define VIC_LOCK(_sc) mtx_lock_spin(&(_sc)->mtx)
85 #define VIC_UNLOCK(_sc) mtx_unlock_spin(&(_sc)->mtx)
88 pl190_intc_irq_dispatch(struct pl190_intc_softc *sc, u_int irq,
91 struct pl190_intc_irqsrc *src;
93 src = &sc->isrcs[irq];
94 if (intr_isrc_dispatch(&src->isrc, tf) != 0)
95 device_printf(sc->dev, "Stray irq %u detected\n", irq);
99 pl190_intc_intr(void *arg)
101 struct pl190_intc_softc *sc;
103 uint32_t num, pending;
104 struct trapframe *tf;
107 cpu = PCPU_GET(cpuid);
108 tf = curthread->td_intr_frame;
111 pending = INTC_VIC_READ_4(sc, VICIRQSTATUS);
113 for (num = 0 ; num < VIC_NIRQS; num++) {
114 if (pending & (1 << num))
115 pl190_intc_irq_dispatch(sc, num, tf);
118 return (FILTER_HANDLED);
122 pl190_intc_disable_intr(device_t dev, struct intr_irqsrc *isrc)
124 struct pl190_intc_softc *sc;
125 struct pl190_intc_irqsrc *src;
127 sc = device_get_softc(dev);
128 src = (struct pl190_intc_irqsrc *)isrc;
131 INTC_VIC_WRITE_4(sc, VICINTENCLEAR, (1 << src->irq));
136 pl190_intc_enable_intr(device_t dev, struct intr_irqsrc *isrc)
138 struct pl190_intc_softc *sc;
139 struct pl190_intc_irqsrc *src;
141 sc = device_get_softc(dev);
142 src = (struct pl190_intc_irqsrc *)isrc;
145 INTC_VIC_WRITE_4(sc, VICINTENABLE, (1 << src->irq));
150 pl190_intc_map_intr(device_t dev, struct intr_map_data *data,
151 struct intr_irqsrc **isrcp)
153 struct intr_map_data_fdt *daf;
154 struct pl190_intc_softc *sc;
156 if (data->type != INTR_MAP_DATA_FDT)
159 daf = (struct intr_map_data_fdt *)data;
160 if (daf->ncells != 1 || daf->cells[0] >= VIC_NIRQS)
163 sc = device_get_softc(dev);
164 *isrcp = &sc->isrcs[daf->cells[0]].isrc;
169 pl190_intc_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
171 pl190_intc_disable_intr(dev, isrc);
175 pl190_intc_post_ithread(device_t dev, struct intr_irqsrc *isrc)
177 struct pl190_intc_irqsrc *src;
179 src = (struct pl190_intc_irqsrc *)isrc;
180 pl190_intc_enable_intr(dev, isrc);
181 arm_irq_memory_barrier(src->irq);
185 pl190_intc_post_filter(device_t dev, struct intr_irqsrc *isrc)
187 struct pl190_intc_irqsrc *src;
189 src = (struct pl190_intc_irqsrc *)isrc;
190 arm_irq_memory_barrier(src->irq);
194 pl190_intc_setup_intr(device_t dev, struct intr_irqsrc *isrc,
195 struct resource *res, struct intr_map_data *data)
202 pl190_intc_probe(device_t dev)
205 if (!ofw_bus_status_okay(dev))
208 if (!ofw_bus_is_compatible(dev, "arm,versatile-vic"))
210 device_set_desc(dev, "ARM PL190 VIC");
211 return (BUS_PROBE_DEFAULT);
215 pl190_intc_attach(device_t dev)
217 struct pl190_intc_softc *sc;
220 struct pl190_intc_irqsrc *isrcs;
221 struct intr_pic *pic;
227 sc = device_get_softc(dev);
229 mtx_init(&sc->mtx, device_get_nameunit(dev), "pl190",
232 /* Request memory resources */
234 sc->intc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
236 if (sc->intc_res == NULL) {
237 device_printf(dev, "Error: could not allocate memory resources\n");
242 * All interrupts should use IRQ line
244 INTC_VIC_WRITE_4(sc, VICINTSELECT, 0x00000000);
245 /* Disable all interrupts */
246 INTC_VIC_WRITE_4(sc, VICINTENCLEAR, 0xffffffff);
249 for (i = 3; i >= 0; i--) {
251 (INTC_VIC_READ_4(sc, VICPERIPHID + i*4) & 0xff);
254 device_printf(dev, "Peripheral ID: %08x\n", id);
257 for (i = 3; i >= 0; i--) {
259 (INTC_VIC_READ_4(sc, VICPRIMECELLID + i*4) & 0xff);
262 device_printf(dev, "PrimeCell ID: %08x\n", id);
266 name = device_get_nameunit(sc->dev);
267 for (irq = 0; irq < VIC_NIRQS; irq++) {
268 isrcs[irq].irq = irq;
269 error = intr_isrc_register(&isrcs[irq].isrc, sc->dev,
270 0, "%s,%u", name, irq);
275 xref = OF_xref_from_node(ofw_bus_get_node(sc->dev));
276 pic = intr_pic_register(sc->dev, xref);
280 return (intr_pic_claim_root(sc->dev, xref, pl190_intc_intr, sc, 0));
283 static device_method_t pl190_intc_methods[] = {
284 DEVMETHOD(device_probe, pl190_intc_probe),
285 DEVMETHOD(device_attach, pl190_intc_attach),
287 DEVMETHOD(pic_disable_intr, pl190_intc_disable_intr),
288 DEVMETHOD(pic_enable_intr, pl190_intc_enable_intr),
289 DEVMETHOD(pic_map_intr, pl190_intc_map_intr),
290 DEVMETHOD(pic_post_filter, pl190_intc_post_filter),
291 DEVMETHOD(pic_post_ithread, pl190_intc_post_ithread),
292 DEVMETHOD(pic_pre_ithread, pl190_intc_pre_ithread),
293 DEVMETHOD(pic_setup_intr, pl190_intc_setup_intr),
298 static driver_t pl190_intc_driver = {
301 sizeof(struct pl190_intc_softc),
304 static devclass_t pl190_intc_devclass;
306 EARLY_DRIVER_MODULE(intc, simplebus, pl190_intc_driver, pl190_intc_devclass,
307 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);