2 * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
5 * This software was developed by SRI International and the University of
6 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
7 * ("CTSRD"), as part of the DARPA CRASH research programme.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
34 #include <sys/param.h>
35 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 #include <sys/module.h>
41 #include <dev/ofw/openfirm.h>
42 #include <dev/ofw/ofw_bus.h>
43 #include <dev/ofw/ofw_bus_subr.h>
47 static struct ofw_compat_data compat_data[] = {
48 {"arm,armv8-pmuv3", 1},
49 {"arm,cortex-a77-pmu", 1},
50 {"arm,cortex-a76-pmu", 1},
51 {"arm,cortex-a75-pmu", 1},
52 {"arm,cortex-a73-pmu", 1},
53 {"arm,cortex-a72-pmu", 1},
54 {"arm,cortex-a65-pmu", 1},
55 {"arm,cortex-a57-pmu", 1},
56 {"arm,cortex-a55-pmu", 1},
57 {"arm,cortex-a53-pmu", 1},
58 {"arm,cortex-a34-pmu", 1},
60 {"arm,cortex-a17-pmu", 1},
61 {"arm,cortex-a15-pmu", 1},
62 {"arm,cortex-a12-pmu", 1},
63 {"arm,cortex-a9-pmu", 1},
64 {"arm,cortex-a8-pmu", 1},
65 {"arm,cortex-a7-pmu", 1},
66 {"arm,cortex-a5-pmu", 1},
67 {"arm,arm11mpcore-pmu", 1},
68 {"arm,arm1176-pmu", 1},
69 {"arm,arm1136-pmu", 1},
70 {"qcom,krait-pmu", 1},
75 pmu_fdt_probe(device_t dev)
78 if (!ofw_bus_status_okay(dev))
81 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data != 0) {
82 device_set_desc(dev, "Performance Monitoring Unit");
83 return (BUS_PROBE_DEFAULT);
90 pmu_parse_affinity(device_t dev, struct pmu_softc *sc, struct pmu_intr *irq,
91 phandle_t xref, uint32_t mpidr)
98 err = OF_getencprop(OF_node_from_xref(xref), "reg", &mpidr,
101 device_printf(dev, "missing 'reg' property\n");
106 for (i = 0; i < MAXCPU; i++) {
108 if (pcpu != NULL && PCPU_GET_MPIDR(pcpu) == mpidr) {
114 device_printf(dev, "Cannot find CPU with MPIDR: 0x%08X\n", mpidr);
119 pmu_parse_intr(device_t dev, struct pmu_softc *sc)
122 phandle_t node, *cpus;
123 int rid, err, ncpus, i;
126 node = ofw_bus_get_node(dev);
127 has_affinity = OF_hasprop(node, "interrupt-affinity");
129 for (i = 0; i < MAX_RLEN; i++)
130 sc->irq[i].cpuid = -1;
134 ncpus = OF_getencprop_alloc_multi(node, "interrupt-affinity",
135 sizeof(*cpus), (void **)&cpus);
138 "Cannot read interrupt affinity property\n");
143 /* Process first interrupt */
145 sc->irq[0].res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
146 RF_ACTIVE | RF_SHAREABLE);
148 if (sc->irq[0].res == NULL) {
149 device_printf(dev, "Cannot get interrupt\n");
154 /* Check if PMU have one per-CPU interrupt */
155 if (intr_is_per_cpu(sc->irq[0].res)) {
158 "Per CPU interupt have declared affinity\n");
166 * PMU with set of generic interrupts (one per core)
167 * Each one must be binded to exact core.
169 err = pmu_parse_affinity(dev, sc, sc->irq + 0,
170 has_affinity ? cpus[0] : 0, 0);
172 device_printf(dev, "Cannot parse affinity for CPUid: 0\n");
176 for (i = 1; i < MAX_RLEN; i++) {
178 sc->irq[i].res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
179 &rid, RF_ACTIVE | RF_SHAREABLE);
180 if (sc->irq[i].res == NULL)
183 if (intr_is_per_cpu(sc->irq[i].res))
185 device_printf(dev, "Unexpected per CPU interupt\n");
190 if (has_affinity && i >= ncpus) {
191 device_printf(dev, "Missing value in interrupt "
192 "affinity property\n");
197 err = pmu_parse_affinity(dev, sc, sc->irq + i,
198 has_affinity ? cpus[i] : 0, i);
201 "Cannot parse affinity for CPUid: %d.\n", i);
212 pmu_fdt_attach(device_t dev)
214 struct pmu_softc *sc;
217 sc = device_get_softc(dev);
218 err = pmu_parse_intr(dev, sc);
222 return (pmu_attach(dev));
225 static device_method_t pmu_fdt_methods[] = {
226 DEVMETHOD(device_probe, pmu_fdt_probe),
227 DEVMETHOD(device_attach, pmu_fdt_attach),
231 static driver_t pmu_fdt_driver = {
234 sizeof(struct pmu_softc),
237 DRIVER_MODULE(pmu, simplebus, pmu_fdt_driver, 0, 0);