2 * Copyright (c) 1990 The Regents of the University of California.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. Neither the name of the University nor the names of its contributors
14 * may be used to endorse or promote products derived from this software
15 * without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * from: @(#)sys_machdep.c 5.5 (Berkeley) 1/19/91
32 #include <sys/cdefs.h>
33 __FBSDID("$FreeBSD$");
35 #include "opt_capsicum.h"
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/capsicum.h>
41 #include <sys/sysproto.h>
42 #include <sys/syscall.h>
43 #include <sys/sysent.h>
45 #include <vm/vm_extern.h>
47 #include <machine/acle-compat.h>
48 #include <machine/cpu.h>
49 #include <machine/sysarch.h>
50 #include <machine/vmparam.h>
52 #ifndef _SYS_SYSPROTO_H_
60 static int arm32_sync_icache (struct thread *, void *);
61 static int arm32_drain_writebuf(struct thread *, void *);
65 sync_icache(uintptr_t addr, size_t len)
71 * Align starting address to even number because value of "1"
72 * is used as return value for success.
77 /* Break whole range to pages. */
79 size = PAGE_SIZE - (addr & PAGE_MASK);
80 size = min(size, len);
81 rv = dcache_wb_pou_checked(addr, size);
82 if (rv == 1) /* see dcache_wb_pou_checked() */
83 rv = icache_inv_pou_checked(addr, size);
85 if (!useracc((void *)addr, size, VM_PROT_READ)) {
89 /* Valid but unmapped page - skip it. */
95 /* Invalidate branch predictor buffer. */
102 arm32_sync_icache(struct thread *td, void *args)
104 struct arm_sync_icache_args ua;
111 if ((error = copyin(args, &ua, sizeof(ua))) != 0)
115 td->td_retval[0] = 0;
120 * Validate arguments. Address and length are unsigned,
121 * so we can use wrapped overflow check.
123 if (((ua.addr + ua.len) < ua.addr) ||
124 ((ua.addr + ua.len) > VM_MAXUSER_ADDRESS)) {
125 ksiginfo_init_trap(&ksi);
126 ksi.ksi_signo = SIGSEGV;
127 ksi.ksi_code = SEGV_ACCERR;
128 ksi.ksi_addr = (void *)max(ua.addr, VM_MAXUSER_ADDRESS);
129 trapsignal(td, &ksi);
134 rv = sync_icache(ua.addr, ua.len);
136 ksiginfo_init_trap(&ksi);
137 ksi.ksi_signo = SIGSEGV;
138 ksi.ksi_code = SEGV_MAPERR;
139 ksi.ksi_addr = (void *)rv;
140 trapsignal(td, &ksi);
144 cpu_icache_sync_range(ua.addr, ua.len);
147 td->td_retval[0] = 0;
152 arm32_drain_writebuf(struct thread *td, void *args)
157 cpu_drain_writebuf();
160 cpu_l2cache_drain_writebuf();
162 td->td_retval[0] = 0;
167 arm32_set_tp(struct thread *td, void *args)
170 td->td_md.md_tp = (register_t)args;
174 *(register_t *)ARM_TP_ADDRESS = (register_t)args;
180 arm32_get_tp(struct thread *td, void *args)
184 td->td_retval[0] = td->td_md.md_tp;
186 td->td_retval[0] = *(register_t *)ARM_TP_ADDRESS;
194 register struct sysarch_args *uap;
198 #ifdef CAPABILITY_MODE
200 * When adding new operations, add a new case statement here to
201 * explicitly indicate whether or not the operation is safe to
202 * perform in capability mode.
204 if (IN_CAPABILITY_MODE(td)) {
206 case ARM_SYNC_ICACHE:
207 case ARM_DRAIN_WRITEBUF:
214 if (KTRPOINT(td, KTR_CAPFAIL))
215 ktrcapfail(CAPFAIL_SYSCALL, NULL, NULL);
223 case ARM_SYNC_ICACHE:
224 error = arm32_sync_icache(td, uap->parms);
226 case ARM_DRAIN_WRITEBUF:
227 error = arm32_drain_writebuf(td, uap->parms);
230 error = arm32_set_tp(td, uap->parms);
233 error = arm32_get_tp(td, uap->parms);