2 * Copyright (c) 2014 Warner Losh. All rights reserved.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 #include "opt_platform.h"
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
33 #include <sys/kernel.h>
34 #include <sys/module.h>
35 #include <sys/resource.h>
36 #include <sys/systm.h>
39 #include <machine/armreg.h>
40 #include <machine/bus.h>
41 #include <machine/cpu.h>
42 #include <machine/cpufunc.h>
43 #include <machine/frame.h>
44 #include <machine/intr.h>
45 #include <machine/resource.h>
47 #include <arm/at91/at91var.h>
48 #include <arm/at91/at91_aicreg.h>
51 #include <dev/fdt/fdt_common.h>
52 #include <dev/ofw/ofw_bus.h>
53 #include <dev/ofw/ofw_bus_subr.h>
56 static struct aic_softc {
57 struct resource *mem_res; /* Memory resource */
58 void *intrhand; /* Interrupt handle */
62 static inline uint32_t
63 RD4(struct aic_softc *sc, bus_size_t off)
66 return (bus_read_4(sc->mem_res, off));
70 WR4(struct aic_softc *sc, bus_size_t off, uint32_t val)
73 bus_write_4(sc->mem_res, off, val);
77 arm_mask_irq(uintptr_t nb)
80 WR4(sc, IC_IDCR, 1 << nb);
84 arm_get_next_irq(int last __unused)
89 irq = RD4(sc, IC_IVR);
90 status = RD4(sc, IC_ISR);
99 arm_unmask_irq(uintptr_t nb)
102 WR4(sc, IC_IECR, 1 << nb);
103 WR4(sc, IC_EOICR, 0);
107 at91_aic_probe(device_t dev)
110 if (!ofw_bus_is_compatible(dev, "atmel,at91rm9200-aic"))
113 device_set_desc(dev, "AIC");
118 at91_aic_attach(device_t dev)
122 device_printf(dev, "Attach %d\n", bus_current_pass);
124 sc = device_get_softc(dev);
128 sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
131 if (sc->mem_res == NULL)
132 panic("couldn't allocate register resources");
135 * Setup the interrupt table.
137 if (soc_info.soc_data == NULL || soc_info.soc_data->soc_irq_prio == NULL)
138 panic("Interrupt priority table missing\n");
139 for (i = 0; i < 32; i++) {
140 WR4(sc, IC_SVR + i * 4, i);
142 WR4(sc, IC_SMR + i * 4, soc_info.soc_data->soc_irq_prio[i]);
144 WR4(sc, IC_EOICR, 1);
150 /* Disable and clear all interrupts. */
151 WR4(sc, IC_IDCR, 0xffffffff);
152 WR4(sc, IC_ICCR, 0xffffffff);
153 enable_interrupts(PSR_I | PSR_F);
159 at91_aic_new_pass(device_t dev)
161 device_printf(dev, "Pass %d\n", bus_current_pass);
164 static device_method_t at91_aic_methods[] = {
165 DEVMETHOD(device_probe, at91_aic_probe),
166 DEVMETHOD(device_attach, at91_aic_attach),
167 DEVMETHOD(bus_new_pass, at91_aic_new_pass),
171 static driver_t at91_aic_driver = {
174 sizeof(struct aic_softc),
177 static devclass_t at91_aic_devclass;
180 EARLY_DRIVER_MODULE(at91_aic, simplebus, at91_aic_driver, at91_aic_devclass,
181 NULL, NULL, BUS_PASS_INTERRUPT);
183 EARLY_DRIVER_MODULE(at91_aic, atmelarm, at91_aic_driver, at91_aic_devclass,
184 NULL, NULL, BUS_PASS_INTERRUPT);