2 * Copyright (c) 2006 M. Warner Losh. All rights reserved.
3 * Copyright (C) 2012 Ian Lepore. All rights reserved.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include "opt_platform.h"
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
33 #include <sys/systm.h>
36 #include <sys/kernel.h>
39 #include <sys/malloc.h>
40 #include <sys/module.h>
43 #include <sys/selinfo.h>
46 #include <machine/at91_gpio.h>
47 #include <machine/bus.h>
49 #include <arm/at91/at91reg.h>
50 #include <arm/at91/at91_pioreg.h>
51 #include <arm/at91/at91_piovar.h>
54 #include <dev/ofw/ofw_bus.h>
55 #include <dev/ofw/ofw_bus_subr.h>
62 device_t dev; /* Myself */
63 void *intrhand; /* Interrupt handle */
64 struct resource *irq_res; /* IRQ resource */
65 struct resource *mem_res; /* Memory resource */
66 struct sx sc_mtx; /* basically a perimeter lock */
70 uint8_t buf[MAX_CHANGE];
75 static inline uint32_t
76 RD4(struct at91_pio_softc *sc, bus_size_t off)
79 return (bus_read_4(sc->mem_res, off));
83 WR4(struct at91_pio_softc *sc, bus_size_t off, uint32_t val)
86 bus_write_4(sc->mem_res, off, val);
89 #define AT91_PIO_LOCK(_sc) sx_xlock(&(_sc)->sc_mtx)
90 #define AT91_PIO_UNLOCK(_sc) sx_xunlock(&(_sc)->sc_mtx)
91 #define AT91_PIO_LOCK_INIT(_sc) \
92 sx_init(&_sc->sc_mtx, device_get_nameunit(_sc->dev))
93 #define AT91_PIO_LOCK_DESTROY(_sc) sx_destroy(&_sc->sc_mtx);
94 #define AT91_PIO_ASSERT_LOCKED(_sc) sx_assert(&_sc->sc_mtx, SA_XLOCKED);
95 #define AT91_PIO_ASSERT_UNLOCKED(_sc) sx_assert(&_sc->sc_mtx, SA_UNLOCKED);
96 #define CDEV2SOFTC(dev) ((dev)->si_drv1)
98 static devclass_t at91_pio_devclass;
100 /* bus entry points */
102 static int at91_pio_probe(device_t dev);
103 static int at91_pio_attach(device_t dev);
104 static int at91_pio_detach(device_t dev);
105 static void at91_pio_intr(void *);
107 /* helper routines */
108 static int at91_pio_activate(device_t dev);
109 static void at91_pio_deactivate(device_t dev);
112 static d_open_t at91_pio_open;
113 static d_close_t at91_pio_close;
114 static d_read_t at91_pio_read;
115 static d_poll_t at91_pio_poll;
116 static d_ioctl_t at91_pio_ioctl;
118 static struct cdevsw at91_pio_cdevsw =
120 .d_version = D_VERSION,
121 .d_open = at91_pio_open,
122 .d_close = at91_pio_close,
123 .d_read = at91_pio_read,
124 .d_poll = at91_pio_poll,
125 .d_ioctl = at91_pio_ioctl
129 at91_pio_probe(device_t dev)
133 if (!ofw_bus_is_compatible(dev, "atmel,at91rm9200-gpio"))
136 switch (device_get_unit(dev)) {
159 device_set_desc(dev, name);
164 at91_pio_attach(device_t dev)
166 struct at91_pio_softc *sc;
169 sc = device_get_softc(dev);
171 err = at91_pio_activate(dev);
176 device_printf(dev, "ABSR: %#x OSR: %#x PSR:%#x ODSR: %#x\n",
177 RD4(sc, PIO_ABSR), RD4(sc, PIO_OSR), RD4(sc, PIO_PSR),
179 AT91_PIO_LOCK_INIT(sc);
182 * Activate the interrupt, but disable all interrupts in the hardware.
184 WR4(sc, PIO_IDR, 0xffffffff);
185 err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC,
186 NULL, at91_pio_intr, sc, &sc->intrhand);
188 AT91_PIO_LOCK_DESTROY(sc);
191 sc->cdev = make_dev(&at91_pio_cdevsw, device_get_unit(dev), UID_ROOT,
192 GID_WHEEL, 0600, "pio%d", device_get_unit(dev));
193 if (sc->cdev == NULL) {
197 sc->cdev->si_drv1 = sc;
200 at91_pio_deactivate(dev);
205 at91_pio_detach(device_t dev)
208 return (EBUSY); /* XXX */
212 at91_pio_activate(device_t dev)
214 struct at91_pio_softc *sc;
217 sc = device_get_softc(dev);
219 sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
221 if (sc->mem_res == NULL)
224 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
225 RF_ACTIVE | RF_SHAREABLE);
226 if (sc->irq_res == NULL)
230 at91_pio_deactivate(dev);
235 at91_pio_deactivate(device_t dev)
237 struct at91_pio_softc *sc;
239 sc = device_get_softc(dev);
241 bus_teardown_intr(dev, sc->irq_res, sc->intrhand);
243 bus_generic_detach(sc->dev);
245 bus_release_resource(dev, SYS_RES_MEMORY,
246 rman_get_rid(sc->mem_res), sc->mem_res);
249 bus_release_resource(dev, SYS_RES_IRQ,
250 rman_get_rid(sc->irq_res), sc->irq_res);
255 at91_pio_intr(void *xsc)
257 struct at91_pio_softc *sc = xsc;
261 /* Reading the status also clears the interrupt. */
262 status = RD4(sc, PIO_ISR) & RD4(sc, PIO_IMR);
265 for (i = 0; status != 0 && sc->buflen < MAX_CHANGE; ++i) {
267 sc->buf[sc->buflen++] = (uint8_t)i;
272 selwakeup(&sc->selp);
277 at91_pio_open(struct cdev *dev, int oflags, int devtype, struct thread *td)
279 struct at91_pio_softc *sc;
281 sc = CDEV2SOFTC(dev);
283 if (!(sc->flags & OPENED)) {
291 at91_pio_close(struct cdev *dev, int fflag, int devtype, struct thread *td)
293 struct at91_pio_softc *sc;
295 sc = CDEV2SOFTC(dev);
297 sc->flags &= ~OPENED;
303 at91_pio_poll(struct cdev *dev, int events, struct thread *td)
305 struct at91_pio_softc *sc;
308 sc = CDEV2SOFTC(dev);
310 if (events & (POLLIN | POLLRDNORM)) {
312 revents |= events & (POLLIN | POLLRDNORM);
314 selrecord(td, &sc->selp);
322 at91_pio_read(struct cdev *dev, struct uio *uio, int flag)
324 struct at91_pio_softc *sc;
327 sc = CDEV2SOFTC(dev);
331 while (uio->uio_resid) {
332 while (sc->buflen == 0 && err == 0)
333 err = msleep(sc, &sc->sc_mtx, PCATCH | PZERO, "prd", 0);
336 len = MIN(sc->buflen, uio->uio_resid);
337 err = uiomove(sc->buf, len, uio);
341 * If we read the whole thing no datacopy is needed,
342 * otherwise we move the data down.
345 if (sc->buflen == len)
348 bcopy(sc->buf + len, sc->buf, sc->buflen - len);
351 /* If there's no data left, end the read. */
360 at91_pio_bang32(struct at91_pio_softc *sc, uint32_t bits, uint32_t datapin,
365 for (i = 0; i < 32; i++) {
366 if (bits & 0x80000000)
367 WR4(sc, PIO_SODR, datapin);
369 WR4(sc, PIO_CODR, datapin);
371 WR4(sc, PIO_CODR, clockpin);
372 WR4(sc, PIO_SODR, clockpin);
377 at91_pio_bang(struct at91_pio_softc *sc, uint8_t bits, uint32_t bitcount,
378 uint32_t datapin, uint32_t clockpin)
382 for (i = 0; i < bitcount; i++) {
384 WR4(sc, PIO_SODR, datapin);
386 WR4(sc, PIO_CODR, datapin);
388 WR4(sc, PIO_CODR, clockpin);
389 WR4(sc, PIO_SODR, clockpin);
394 at91_pio_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag,
397 struct at91_pio_softc *sc;
398 struct at91_gpio_cfg *cfg;
399 struct at91_gpio_info *info;
400 struct at91_gpio_bang *bang;
401 struct at91_gpio_bang_many *bangmany;
403 uint8_t many[1024], *walker;
407 sc = CDEV2SOFTC(dev);
409 case AT91_GPIO_SET: /* turn bits on */
410 WR4(sc, PIO_SODR, *(uint32_t *)data);
412 case AT91_GPIO_CLR: /* turn bits off */
413 WR4(sc, PIO_CODR, *(uint32_t *)data);
415 case AT91_GPIO_READ: /* Get the status of input bits */
416 *(uint32_t *)data = RD4(sc, PIO_PDSR);
418 case AT91_GPIO_CFG: /* Configure AT91_GPIO pins */
419 cfg = (struct at91_gpio_cfg *)data;
420 if (cfg->cfgmask & AT91_GPIO_CFG_INPUT) {
421 WR4(sc, PIO_OER, cfg->iomask & ~cfg->input);
422 WR4(sc, PIO_ODR, cfg->iomask & cfg->input);
424 if (cfg->cfgmask & AT91_GPIO_CFG_HI_Z) {
425 WR4(sc, PIO_MDDR, cfg->iomask & ~cfg->hi_z);
426 WR4(sc, PIO_MDER, cfg->iomask & cfg->hi_z);
428 if (cfg->cfgmask & AT91_GPIO_CFG_PULLUP) {
429 WR4(sc, PIO_PUDR, cfg->iomask & ~cfg->pullup);
430 WR4(sc, PIO_PUER, cfg->iomask & cfg->pullup);
432 if (cfg->cfgmask & AT91_GPIO_CFG_GLITCH) {
433 WR4(sc, PIO_IFDR, cfg->iomask & ~cfg->glitch);
434 WR4(sc, PIO_IFER, cfg->iomask & cfg->glitch);
436 if (cfg->cfgmask & AT91_GPIO_CFG_GPIO) {
437 WR4(sc, PIO_PDR, cfg->iomask & ~cfg->gpio);
438 WR4(sc, PIO_PER, cfg->iomask & cfg->gpio);
440 if (cfg->cfgmask & AT91_GPIO_CFG_PERIPH) {
441 WR4(sc, PIO_ASR, cfg->iomask & ~cfg->periph);
442 WR4(sc, PIO_BSR, cfg->iomask & cfg->periph);
444 if (cfg->cfgmask & AT91_GPIO_CFG_INTR) {
445 WR4(sc, PIO_IDR, cfg->iomask & ~cfg->intr);
446 WR4(sc, PIO_IER, cfg->iomask & cfg->intr);
450 bang = (struct at91_gpio_bang *)data;
451 at91_pio_bang32(sc, bang->bits, bang->datapin, bang->clockpin);
453 case AT91_GPIO_BANG_MANY:
454 bangmany = (struct at91_gpio_bang_many *)data;
455 walker = (uint8_t *)bangmany->bits;
456 bitcount = bangmany->numbits;
457 while (bitcount > 0) {
458 num = MIN((bitcount + 7) / 8, sizeof(many));
459 err = copyin(walker, many, num);
462 for (i = 0; i < num && bitcount > 0; i++, bitcount -= 8)
464 at91_pio_bang(sc, many[i], 8, bangmany->datapin, bangmany->clockpin);
466 at91_pio_bang(sc, many[i], bitcount, bangmany->datapin, bangmany->clockpin);
470 case AT91_GPIO_INFO: /* Learn about this device's AT91_GPIO bits */
471 info = (struct at91_gpio_info *)data;
472 info->output_status = RD4(sc, PIO_ODSR);
473 info->input_status = RD4(sc, PIO_OSR);
474 info->highz_status = RD4(sc, PIO_MDSR);
475 info->pullup_status = RD4(sc, PIO_PUSR);
476 info->glitch_status = RD4(sc, PIO_IFSR);
477 info->enabled_status = RD4(sc, PIO_PSR);
478 info->periph_status = RD4(sc, PIO_ABSR);
479 info->intr_status = RD4(sc, PIO_IMR);
480 memset(info->extra_status, 0, sizeof(info->extra_status));
487 * The following functions are called early in the boot process, so
488 * don't use bus_space, as that isn't yet available when we need to use
493 at91_pio_use_periph_a(uint32_t pio, uint32_t periph_a_mask, int use_pullup)
495 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
497 PIO[PIO_ASR / 4] = periph_a_mask;
498 PIO[PIO_PDR / 4] = periph_a_mask;
500 PIO[PIO_PUER / 4] = periph_a_mask;
502 PIO[PIO_PUDR / 4] = periph_a_mask;
506 at91_pio_use_periph_b(uint32_t pio, uint32_t periph_b_mask, int use_pullup)
508 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
510 PIO[PIO_BSR / 4] = periph_b_mask;
511 PIO[PIO_PDR / 4] = periph_b_mask;
513 PIO[PIO_PUER / 4] = periph_b_mask;
515 PIO[PIO_PUDR / 4] = periph_b_mask;
519 at91_pio_use_gpio(uint32_t pio, uint32_t gpio_mask)
521 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
523 PIO[PIO_PER / 4] = gpio_mask;
527 at91_pio_gpio_input(uint32_t pio, uint32_t input_enable_mask)
529 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
531 PIO[PIO_ODR / 4] = input_enable_mask;
535 at91_pio_gpio_output(uint32_t pio, uint32_t output_enable_mask, int use_pullup)
537 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
539 PIO[PIO_OER / 4] = output_enable_mask;
541 PIO[PIO_PUER / 4] = output_enable_mask;
543 PIO[PIO_PUDR / 4] = output_enable_mask;
547 at91_pio_gpio_high_z(uint32_t pio, uint32_t high_z_mask, int enable)
549 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
552 PIO[PIO_MDER / 4] = high_z_mask;
554 PIO[PIO_MDDR / 4] = high_z_mask;
558 at91_pio_gpio_set(uint32_t pio, uint32_t data_mask)
560 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
562 PIO[PIO_SODR / 4] = data_mask;
566 at91_pio_gpio_clear(uint32_t pio, uint32_t data_mask)
568 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
570 PIO[PIO_CODR / 4] = data_mask;
574 at91_pio_gpio_get(uint32_t pio, uint32_t data_mask)
576 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
578 return (PIO[PIO_PDSR / 4] & data_mask);
582 at91_pio_gpio_set_deglitch(uint32_t pio, uint32_t data_mask, int use_deglitch)
584 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
587 PIO[PIO_IFER / 4] = data_mask;
589 PIO[PIO_IFDR / 4] = data_mask;
593 at91_pio_gpio_pullup(uint32_t pio, uint32_t data_mask, int do_pullup)
595 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
598 PIO[PIO_PUER / 4] = data_mask;
600 PIO[PIO_PUDR / 4] = data_mask;
604 at91_pio_gpio_set_interrupt(uint32_t pio, uint32_t data_mask,
605 int enable_interrupt)
607 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
609 if (enable_interrupt)
610 PIO[PIO_IER / 4] = data_mask;
612 PIO[PIO_IDR / 4] = data_mask;
616 at91_pio_gpio_clear_interrupt(uint32_t pio)
618 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
620 /* Reading this register will clear the interrupts. */
621 return (PIO[PIO_ISR / 4]);
625 at91_pio_new_pass(device_t dev)
628 device_printf(dev, "Pass %d\n", bus_current_pass);
631 static device_method_t at91_pio_methods[] = {
632 /* Device interface */
633 DEVMETHOD(device_probe, at91_pio_probe),
634 DEVMETHOD(device_attach, at91_pio_attach),
635 DEVMETHOD(device_detach, at91_pio_detach),
637 DEVMETHOD(bus_new_pass, at91_pio_new_pass),
642 static driver_t at91_pio_driver = {
645 sizeof(struct at91_pio_softc),
649 EARLY_DRIVER_MODULE(at91_pio, at91_pinctrl, at91_pio_driver, at91_pio_devclass,
650 NULL, NULL, BUS_PASS_INTERRUPT);
652 DRIVER_MODULE(at91_pio, atmelarm, at91_pio_driver, at91_pio_devclass, NULL, NULL);