2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2006 M. Warner Losh.
5 * Copyright (C) 2012 Ian Lepore. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include "opt_platform.h"
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
34 #include <sys/param.h>
35 #include <sys/systm.h>
38 #include <sys/kernel.h>
41 #include <sys/malloc.h>
42 #include <sys/module.h>
45 #include <sys/selinfo.h>
48 #include <machine/at91_gpio.h>
49 #include <machine/bus.h>
51 #include <arm/at91/at91reg.h>
52 #include <arm/at91/at91_pioreg.h>
53 #include <arm/at91/at91_piovar.h>
56 #include <dev/ofw/ofw_bus.h>
57 #include <dev/ofw/ofw_bus_subr.h>
64 device_t dev; /* Myself */
65 void *intrhand; /* Interrupt handle */
66 struct resource *irq_res; /* IRQ resource */
67 struct resource *mem_res; /* Memory resource */
68 struct sx sc_mtx; /* basically a perimeter lock */
72 uint8_t buf[MAX_CHANGE];
77 static inline uint32_t
78 RD4(struct at91_pio_softc *sc, bus_size_t off)
81 return (bus_read_4(sc->mem_res, off));
85 WR4(struct at91_pio_softc *sc, bus_size_t off, uint32_t val)
88 bus_write_4(sc->mem_res, off, val);
91 #define AT91_PIO_LOCK(_sc) sx_xlock(&(_sc)->sc_mtx)
92 #define AT91_PIO_UNLOCK(_sc) sx_xunlock(&(_sc)->sc_mtx)
93 #define AT91_PIO_LOCK_INIT(_sc) \
94 sx_init(&_sc->sc_mtx, device_get_nameunit(_sc->dev))
95 #define AT91_PIO_LOCK_DESTROY(_sc) sx_destroy(&_sc->sc_mtx);
96 #define AT91_PIO_ASSERT_LOCKED(_sc) sx_assert(&_sc->sc_mtx, SA_XLOCKED);
97 #define AT91_PIO_ASSERT_UNLOCKED(_sc) sx_assert(&_sc->sc_mtx, SA_UNLOCKED);
98 #define CDEV2SOFTC(dev) ((dev)->si_drv1)
100 static devclass_t at91_pio_devclass;
102 /* bus entry points */
104 static int at91_pio_probe(device_t dev);
105 static int at91_pio_attach(device_t dev);
106 static int at91_pio_detach(device_t dev);
107 static void at91_pio_intr(void *);
109 /* helper routines */
110 static int at91_pio_activate(device_t dev);
111 static void at91_pio_deactivate(device_t dev);
114 static d_open_t at91_pio_open;
115 static d_close_t at91_pio_close;
116 static d_read_t at91_pio_read;
117 static d_poll_t at91_pio_poll;
118 static d_ioctl_t at91_pio_ioctl;
120 static struct cdevsw at91_pio_cdevsw =
122 .d_version = D_VERSION,
123 .d_open = at91_pio_open,
124 .d_close = at91_pio_close,
125 .d_read = at91_pio_read,
126 .d_poll = at91_pio_poll,
127 .d_ioctl = at91_pio_ioctl
131 at91_pio_probe(device_t dev)
135 if (!ofw_bus_is_compatible(dev, "atmel,at91rm9200-gpio"))
138 switch (device_get_unit(dev)) {
161 device_set_desc(dev, name);
166 at91_pio_attach(device_t dev)
168 struct at91_pio_softc *sc;
171 sc = device_get_softc(dev);
173 err = at91_pio_activate(dev);
178 device_printf(dev, "ABSR: %#x OSR: %#x PSR:%#x ODSR: %#x\n",
179 RD4(sc, PIO_ABSR), RD4(sc, PIO_OSR), RD4(sc, PIO_PSR),
181 AT91_PIO_LOCK_INIT(sc);
184 * Activate the interrupt, but disable all interrupts in the hardware.
186 WR4(sc, PIO_IDR, 0xffffffff);
187 err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC,
188 NULL, at91_pio_intr, sc, &sc->intrhand);
190 AT91_PIO_LOCK_DESTROY(sc);
193 sc->cdev = make_dev(&at91_pio_cdevsw, device_get_unit(dev), UID_ROOT,
194 GID_WHEEL, 0600, "pio%d", device_get_unit(dev));
195 if (sc->cdev == NULL) {
199 sc->cdev->si_drv1 = sc;
202 at91_pio_deactivate(dev);
207 at91_pio_detach(device_t dev)
210 return (EBUSY); /* XXX */
214 at91_pio_activate(device_t dev)
216 struct at91_pio_softc *sc;
219 sc = device_get_softc(dev);
221 sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
223 if (sc->mem_res == NULL)
226 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
227 RF_ACTIVE | RF_SHAREABLE);
228 if (sc->irq_res == NULL)
232 at91_pio_deactivate(dev);
237 at91_pio_deactivate(device_t dev)
239 struct at91_pio_softc *sc;
241 sc = device_get_softc(dev);
243 bus_teardown_intr(dev, sc->irq_res, sc->intrhand);
245 bus_generic_detach(sc->dev);
247 bus_release_resource(dev, SYS_RES_MEMORY,
248 rman_get_rid(sc->mem_res), sc->mem_res);
251 bus_release_resource(dev, SYS_RES_IRQ,
252 rman_get_rid(sc->irq_res), sc->irq_res);
257 at91_pio_intr(void *xsc)
259 struct at91_pio_softc *sc = xsc;
263 /* Reading the status also clears the interrupt. */
264 status = RD4(sc, PIO_ISR) & RD4(sc, PIO_IMR);
267 for (i = 0; status != 0 && sc->buflen < MAX_CHANGE; ++i) {
269 sc->buf[sc->buflen++] = (uint8_t)i;
274 selwakeup(&sc->selp);
279 at91_pio_open(struct cdev *dev, int oflags, int devtype, struct thread *td)
281 struct at91_pio_softc *sc;
283 sc = CDEV2SOFTC(dev);
285 if (!(sc->flags & OPENED)) {
293 at91_pio_close(struct cdev *dev, int fflag, int devtype, struct thread *td)
295 struct at91_pio_softc *sc;
297 sc = CDEV2SOFTC(dev);
299 sc->flags &= ~OPENED;
305 at91_pio_poll(struct cdev *dev, int events, struct thread *td)
307 struct at91_pio_softc *sc;
310 sc = CDEV2SOFTC(dev);
312 if (events & (POLLIN | POLLRDNORM)) {
314 revents |= events & (POLLIN | POLLRDNORM);
316 selrecord(td, &sc->selp);
324 at91_pio_read(struct cdev *dev, struct uio *uio, int flag)
326 struct at91_pio_softc *sc;
329 sc = CDEV2SOFTC(dev);
333 while (uio->uio_resid) {
334 while (sc->buflen == 0 && err == 0)
335 err = msleep(sc, &sc->sc_mtx, PCATCH | PZERO, "prd", 0);
338 len = MIN(sc->buflen, uio->uio_resid);
339 err = uiomove(sc->buf, len, uio);
343 * If we read the whole thing no datacopy is needed,
344 * otherwise we move the data down.
347 if (sc->buflen == len)
350 bcopy(sc->buf + len, sc->buf, sc->buflen - len);
353 /* If there's no data left, end the read. */
362 at91_pio_bang32(struct at91_pio_softc *sc, uint32_t bits, uint32_t datapin,
367 for (i = 0; i < 32; i++) {
368 if (bits & 0x80000000)
369 WR4(sc, PIO_SODR, datapin);
371 WR4(sc, PIO_CODR, datapin);
373 WR4(sc, PIO_CODR, clockpin);
374 WR4(sc, PIO_SODR, clockpin);
379 at91_pio_bang(struct at91_pio_softc *sc, uint8_t bits, uint32_t bitcount,
380 uint32_t datapin, uint32_t clockpin)
384 for (i = 0; i < bitcount; i++) {
386 WR4(sc, PIO_SODR, datapin);
388 WR4(sc, PIO_CODR, datapin);
390 WR4(sc, PIO_CODR, clockpin);
391 WR4(sc, PIO_SODR, clockpin);
396 at91_pio_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag,
399 struct at91_pio_softc *sc;
400 struct at91_gpio_cfg *cfg;
401 struct at91_gpio_info *info;
402 struct at91_gpio_bang *bang;
403 struct at91_gpio_bang_many *bangmany;
405 uint8_t many[1024], *walker;
409 sc = CDEV2SOFTC(dev);
411 case AT91_GPIO_SET: /* turn bits on */
412 WR4(sc, PIO_SODR, *(uint32_t *)data);
414 case AT91_GPIO_CLR: /* turn bits off */
415 WR4(sc, PIO_CODR, *(uint32_t *)data);
417 case AT91_GPIO_READ: /* Get the status of input bits */
418 *(uint32_t *)data = RD4(sc, PIO_PDSR);
420 case AT91_GPIO_CFG: /* Configure AT91_GPIO pins */
421 cfg = (struct at91_gpio_cfg *)data;
422 if (cfg->cfgmask & AT91_GPIO_CFG_INPUT) {
423 WR4(sc, PIO_OER, cfg->iomask & ~cfg->input);
424 WR4(sc, PIO_ODR, cfg->iomask & cfg->input);
426 if (cfg->cfgmask & AT91_GPIO_CFG_HI_Z) {
427 WR4(sc, PIO_MDDR, cfg->iomask & ~cfg->hi_z);
428 WR4(sc, PIO_MDER, cfg->iomask & cfg->hi_z);
430 if (cfg->cfgmask & AT91_GPIO_CFG_PULLUP) {
431 WR4(sc, PIO_PUDR, cfg->iomask & ~cfg->pullup);
432 WR4(sc, PIO_PUER, cfg->iomask & cfg->pullup);
434 if (cfg->cfgmask & AT91_GPIO_CFG_GLITCH) {
435 WR4(sc, PIO_IFDR, cfg->iomask & ~cfg->glitch);
436 WR4(sc, PIO_IFER, cfg->iomask & cfg->glitch);
438 if (cfg->cfgmask & AT91_GPIO_CFG_GPIO) {
439 WR4(sc, PIO_PDR, cfg->iomask & ~cfg->gpio);
440 WR4(sc, PIO_PER, cfg->iomask & cfg->gpio);
442 if (cfg->cfgmask & AT91_GPIO_CFG_PERIPH) {
443 WR4(sc, PIO_ASR, cfg->iomask & ~cfg->periph);
444 WR4(sc, PIO_BSR, cfg->iomask & cfg->periph);
446 if (cfg->cfgmask & AT91_GPIO_CFG_INTR) {
447 WR4(sc, PIO_IDR, cfg->iomask & ~cfg->intr);
448 WR4(sc, PIO_IER, cfg->iomask & cfg->intr);
452 bang = (struct at91_gpio_bang *)data;
453 at91_pio_bang32(sc, bang->bits, bang->datapin, bang->clockpin);
455 case AT91_GPIO_BANG_MANY:
456 bangmany = (struct at91_gpio_bang_many *)data;
457 walker = (uint8_t *)bangmany->bits;
458 bitcount = bangmany->numbits;
459 while (bitcount > 0) {
460 num = MIN((bitcount + 7) / 8, sizeof(many));
461 err = copyin(walker, many, num);
464 for (i = 0; i < num && bitcount > 0; i++, bitcount -= 8)
466 at91_pio_bang(sc, many[i], 8, bangmany->datapin, bangmany->clockpin);
468 at91_pio_bang(sc, many[i], bitcount, bangmany->datapin, bangmany->clockpin);
472 case AT91_GPIO_INFO: /* Learn about this device's AT91_GPIO bits */
473 info = (struct at91_gpio_info *)data;
474 info->output_status = RD4(sc, PIO_ODSR);
475 info->input_status = RD4(sc, PIO_OSR);
476 info->highz_status = RD4(sc, PIO_MDSR);
477 info->pullup_status = RD4(sc, PIO_PUSR);
478 info->glitch_status = RD4(sc, PIO_IFSR);
479 info->enabled_status = RD4(sc, PIO_PSR);
480 info->periph_status = RD4(sc, PIO_ABSR);
481 info->intr_status = RD4(sc, PIO_IMR);
482 memset(info->extra_status, 0, sizeof(info->extra_status));
489 * The following functions are called early in the boot process, so
490 * don't use bus_space, as that isn't yet available when we need to use
495 at91_pio_use_periph_a(uint32_t pio, uint32_t periph_a_mask, int use_pullup)
497 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
499 PIO[PIO_ASR / 4] = periph_a_mask;
500 PIO[PIO_PDR / 4] = periph_a_mask;
502 PIO[PIO_PUER / 4] = periph_a_mask;
504 PIO[PIO_PUDR / 4] = periph_a_mask;
508 at91_pio_use_periph_b(uint32_t pio, uint32_t periph_b_mask, int use_pullup)
510 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
512 PIO[PIO_BSR / 4] = periph_b_mask;
513 PIO[PIO_PDR / 4] = periph_b_mask;
515 PIO[PIO_PUER / 4] = periph_b_mask;
517 PIO[PIO_PUDR / 4] = periph_b_mask;
521 at91_pio_use_gpio(uint32_t pio, uint32_t gpio_mask)
523 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
525 PIO[PIO_PER / 4] = gpio_mask;
529 at91_pio_gpio_input(uint32_t pio, uint32_t input_enable_mask)
531 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
533 PIO[PIO_ODR / 4] = input_enable_mask;
537 at91_pio_gpio_output(uint32_t pio, uint32_t output_enable_mask, int use_pullup)
539 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
541 PIO[PIO_OER / 4] = output_enable_mask;
543 PIO[PIO_PUER / 4] = output_enable_mask;
545 PIO[PIO_PUDR / 4] = output_enable_mask;
549 at91_pio_gpio_high_z(uint32_t pio, uint32_t high_z_mask, int enable)
551 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
554 PIO[PIO_MDER / 4] = high_z_mask;
556 PIO[PIO_MDDR / 4] = high_z_mask;
560 at91_pio_gpio_set(uint32_t pio, uint32_t data_mask)
562 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
564 PIO[PIO_SODR / 4] = data_mask;
568 at91_pio_gpio_clear(uint32_t pio, uint32_t data_mask)
570 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
572 PIO[PIO_CODR / 4] = data_mask;
576 at91_pio_gpio_get(uint32_t pio, uint32_t data_mask)
578 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
580 return (PIO[PIO_PDSR / 4] & data_mask);
584 at91_pio_gpio_set_deglitch(uint32_t pio, uint32_t data_mask, int use_deglitch)
586 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
589 PIO[PIO_IFER / 4] = data_mask;
591 PIO[PIO_IFDR / 4] = data_mask;
595 at91_pio_gpio_pullup(uint32_t pio, uint32_t data_mask, int do_pullup)
597 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
600 PIO[PIO_PUER / 4] = data_mask;
602 PIO[PIO_PUDR / 4] = data_mask;
606 at91_pio_gpio_set_interrupt(uint32_t pio, uint32_t data_mask,
607 int enable_interrupt)
609 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
611 if (enable_interrupt)
612 PIO[PIO_IER / 4] = data_mask;
614 PIO[PIO_IDR / 4] = data_mask;
618 at91_pio_gpio_clear_interrupt(uint32_t pio)
620 uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
622 /* Reading this register will clear the interrupts. */
623 return (PIO[PIO_ISR / 4]);
627 at91_pio_new_pass(device_t dev)
630 device_printf(dev, "Pass %d\n", bus_current_pass);
633 static device_method_t at91_pio_methods[] = {
634 /* Device interface */
635 DEVMETHOD(device_probe, at91_pio_probe),
636 DEVMETHOD(device_attach, at91_pio_attach),
637 DEVMETHOD(device_detach, at91_pio_detach),
639 DEVMETHOD(bus_new_pass, at91_pio_new_pass),
644 static driver_t at91_pio_driver = {
647 sizeof(struct at91_pio_softc),
651 EARLY_DRIVER_MODULE(at91_pio, at91_pinctrl, at91_pio_driver, at91_pio_devclass,
652 NULL, NULL, BUS_PASS_INTERRUPT);
654 DRIVER_MODULE(at91_pio, atmelarm, at91_pio_driver, at91_pio_devclass, NULL, NULL);