2 * Copyright (c) 2006 M. Warner Losh. All rights reserved.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 #include <sys/cdefs.h>
27 __FBSDID("$FreeBSD$");
29 #include <sys/param.h>
30 #include <sys/systm.h>
33 #include <sys/kernel.h>
36 #include <sys/malloc.h>
37 #include <sys/module.h>
38 #include <sys/mutex.h>
40 #include <machine/bus.h>
42 #include <arm/at91/at91_twireg.h>
43 #include <arm/at91/at91var.h>
45 #include <dev/iicbus/iiconf.h>
46 #include <dev/iicbus/iicbus.h>
47 #include "iicbus_if.h"
49 #define TWI_SLOW_CLOCK 1500
50 #define TWI_FAST_CLOCK 45000
51 #define TWI_FASTEST_CLOCK 90000
55 device_t dev; /* Myself */
56 void *intrhand; /* Interrupt handle */
57 struct resource *irq_res; /* IRQ resource */
58 struct resource *mem_res; /* Memory resource */
59 struct mtx sc_mtx; /* basically a perimeter lock */
60 volatile uint32_t flags;
67 static inline uint32_t
68 RD4(struct at91_twi_softc *sc, bus_size_t off)
71 return bus_read_4(sc->mem_res, off);
75 WR4(struct at91_twi_softc *sc, bus_size_t off, uint32_t val)
78 bus_write_4(sc->mem_res, off, val);
81 #define AT91_TWI_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
82 #define AT91_TWI_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
83 #define AT91_TWI_LOCK_INIT(_sc) \
84 mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->dev), \
86 #define AT91_TWI_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx);
87 #define AT91_TWI_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED);
88 #define AT91_TWI_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED);
89 #define TWI_DEF_CLK 100000
91 static devclass_t at91_twi_devclass;
93 /* bus entry points */
95 static int at91_twi_probe(device_t dev);
96 static int at91_twi_attach(device_t dev);
97 static int at91_twi_detach(device_t dev);
98 static void at91_twi_intr(void *);
100 /* helper routines */
101 static int at91_twi_activate(device_t dev);
102 static void at91_twi_deactivate(device_t dev);
105 at91_twi_probe(device_t dev)
108 device_set_desc(dev, "TWI");
113 at91_twi_attach(device_t dev)
115 struct at91_twi_softc *sc = device_get_softc(dev);
119 err = at91_twi_activate(dev);
123 AT91_TWI_LOCK_INIT(sc);
126 * Activate the interrupt
128 err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
129 NULL, at91_twi_intr, sc, &sc->intrhand);
131 AT91_TWI_LOCK_DESTROY(sc);
134 sc->cwgr = TWI_CWGR_CKDIV(8 * at91_master_clock / TWI_FASTEST_CLOCK) |
135 TWI_CWGR_CHDIV(TWI_CWGR_DIV(TWI_DEF_CLK)) |
136 TWI_CWGR_CLDIV(TWI_CWGR_DIV(TWI_DEF_CLK));
137 WR4(sc, TWI_CR, TWI_CR_SWRST);
138 WR4(sc, TWI_CR, TWI_CR_MSEN | TWI_CR_SVDIS);
139 WR4(sc, TWI_CWGR, sc->cwgr);
141 if ((sc->iicbus = device_add_child(dev, "iicbus", -1)) == NULL)
142 device_printf(dev, "could not allocate iicbus instance\n");
143 /* probe and attach the iicbus */
144 bus_generic_attach(dev);
147 at91_twi_deactivate(dev);
152 at91_twi_detach(device_t dev)
154 struct at91_twi_softc *sc;
157 sc = device_get_softc(dev);
158 at91_twi_deactivate(dev);
159 if (sc->iicbus && (rv = device_delete_child(dev, sc->iicbus)) != 0)
162 AT91_TWI_LOCK_DESTROY(sc);
168 at91_twi_activate(device_t dev)
170 struct at91_twi_softc *sc;
173 sc = device_get_softc(dev);
175 sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
177 if (sc->mem_res == NULL)
180 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
182 if (sc->irq_res == NULL)
186 at91_twi_deactivate(dev);
191 at91_twi_deactivate(device_t dev)
193 struct at91_twi_softc *sc;
195 sc = device_get_softc(dev);
197 bus_teardown_intr(dev, sc->irq_res, sc->intrhand);
199 bus_generic_detach(sc->dev);
201 bus_release_resource(dev, SYS_RES_MEMORY,
202 rman_get_rid(sc->mem_res), sc->mem_res);
205 bus_release_resource(dev, SYS_RES_IRQ,
206 rman_get_rid(sc->irq_res), sc->irq_res);
212 at91_twi_intr(void *xsc)
214 struct at91_twi_softc *sc = xsc;
217 status = RD4(sc, TWI_SR);
221 sc->flags |= status & (TWI_SR_OVRE | TWI_SR_UNRE | TWI_SR_NACK);
222 if (status & TWI_SR_RXRDY)
223 sc->flags |= TWI_SR_RXRDY;
224 if (status & TWI_SR_TXRDY)
225 sc->flags |= TWI_SR_TXRDY;
226 if (status & TWI_SR_TXCOMP)
227 sc->flags |= TWI_SR_TXCOMP;
228 WR4(sc, TWI_IDR, status);
235 at91_twi_wait(struct at91_twi_softc *sc, uint32_t bit)
238 int counter = 100000;
241 AT91_TWI_ASSERT_LOCKED(sc);
242 while (!((sr = RD4(sc, TWI_SR)) & bit) && counter-- > 0 &&
247 else if (sr & TWI_SR_NACK)
248 err = ENXIO; // iic nack convention
253 at91_twi_rst_card(device_t dev, u_char speed, u_char addr, u_char *oldaddr)
255 struct at91_twi_softc *sc;
258 sc = device_get_softc(dev);
261 *oldaddr = sc->twi_addr;
265 * speeds are for 1.5kb/s, 45kb/s and 90kb/s.
269 clk = TWI_SLOW_CLOCK;
273 clk = TWI_FAST_CLOCK;
279 clk = TWI_FASTEST_CLOCK;
282 sc->cwgr = TWI_CWGR_CKDIV(1) | TWI_CWGR_CHDIV(TWI_CWGR_DIV(clk)) |
283 TWI_CWGR_CLDIV(TWI_CWGR_DIV(clk));
284 WR4(sc, TWI_CR, TWI_CR_SWRST);
285 WR4(sc, TWI_CR, TWI_CR_MSEN | TWI_CR_SVDIS);
286 WR4(sc, TWI_CWGR, sc->cwgr);
293 at91_twi_callback(device_t dev, int index, caddr_t data)
298 case IIC_REQUEST_BUS:
301 case IIC_RELEASE_BUS:
312 at91_twi_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs)
314 struct at91_twi_softc *sc;
320 sc = device_get_softc(dev);
323 for (i = 0; i < nmsgs; i++) {
325 * The linux atmel driver doesn't use the internal device
326 * address feature of twi. A separate i2c message needs to
327 * be written to use this.
328 * See http://lists.arm.linux.org.uk/pipermail/linux-arm-kernel/2004-September/024411.html
329 * for details. Upon reflection, we could use this as an
330 * optimization, but it is unclear the code bloat will
331 * result in faster/better operations.
333 rdwr = (msgs[i].flags & IIC_M_RD) ? TWI_MMR_MREAD : 0;
334 WR4(sc, TWI_MMR, TWI_MMR_DADR(msgs[i].slave) | rdwr);
337 /* zero byte transfers aren't allowed */
338 if (len == 0 || buf == NULL) {
342 if (len == 1 && msgs[i].flags & IIC_M_RD)
343 WR4(sc, TWI_CR, TWI_CR_START | TWI_CR_STOP);
345 WR4(sc, TWI_CR, TWI_CR_START);
346 if (msgs[i].flags & IIC_M_RD) {
347 sr = RD4(sc, TWI_SR);
348 while (!(sr & TWI_SR_TXCOMP)) {
349 if ((sr = RD4(sc, TWI_SR)) & TWI_SR_RXRDY) {
351 *buf++ = RD4(sc, TWI_RHR) & 0xff;
353 WR4(sc, TWI_CR, TWI_CR_STOP);
356 if (len > 0 || (sr & TWI_SR_NACK)) {
357 err = ENXIO; // iic nack convention
362 if ((err = at91_twi_wait(sc, TWI_SR_TXRDY)))
364 WR4(sc, TWI_THR, *buf++);
366 WR4(sc, TWI_CR, TWI_CR_STOP);
368 if ((err = at91_twi_wait(sc, TWI_SR_TXCOMP)))
373 WR4(sc, TWI_CR, TWI_CR_SWRST);
374 WR4(sc, TWI_CR, TWI_CR_MSEN | TWI_CR_SVDIS);
375 WR4(sc, TWI_CWGR, sc->cwgr);
381 static device_method_t at91_twi_methods[] = {
382 /* Device interface */
383 DEVMETHOD(device_probe, at91_twi_probe),
384 DEVMETHOD(device_attach, at91_twi_attach),
385 DEVMETHOD(device_detach, at91_twi_detach),
387 /* iicbus interface */
388 DEVMETHOD(iicbus_callback, at91_twi_callback),
389 DEVMETHOD(iicbus_reset, at91_twi_rst_card),
390 DEVMETHOD(iicbus_transfer, at91_twi_transfer),
394 static driver_t at91_twi_driver = {
397 sizeof(struct at91_twi_softc),
400 DRIVER_MODULE(at91_twi, atmelarm, at91_twi_driver, at91_twi_devclass, NULL,
402 DRIVER_MODULE(iicbus, at91_twi, iicbus_driver, iicbus_devclass, NULL, NULL);
403 MODULE_DEPEND(at91_twi, iicbus, 1, 1, 1);