2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2005 Olivier Houchard. All rights reserved.
5 * Copyright (c) 2010 Greg Ansley. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
33 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/malloc.h>
37 #include <sys/module.h>
39 #define _ARM32_BUS_DMA_PRIVATE
40 #include <machine/bus.h>
42 #include <arm/at91/at91var.h>
43 #include <arm/at91/at91reg.h>
44 #include <arm/at91/at91rm92reg.h>
45 #include <arm/at91/at91_aicreg.h>
46 #include <arm/at91/at91_pmcreg.h>
47 #include <arm/at91/at91_streg.h>
48 #include <arm/at91/at91_pmcvar.h>
49 #include <arm/at91/at91soc.h>
52 * Standard priority levels for the system. 0 is lowest and 7 is highest.
53 * These values are the ones Atmel uses for its Linux port, which differ
54 * a little form the ones that are in the standard distribution. Also,
55 * the ones marked with 'TWEEK' are different based on experience.
57 static const int at91_irq_prio[32] =
59 7, /* Advanced Interrupt Controller (FIQ) */
60 7, /* System Peripherals */
61 1, /* Parallel IO Controller A */
62 1, /* Parallel IO Controller B */
63 1, /* Parallel IO Controller C */
64 1, /* Parallel IO Controller D */
69 0, /* Multimedia Card Interface */
70 2, /* USB Device Port */
71 4, /* Two-Wire Interface */ /* TWEEK */
72 5, /* Serial Peripheral Interface */
73 4, /* Serial Synchronous Controller 0 */
74 6, /* Serial Synchronous Controller 1 */ /* TWEEK */
75 4, /* Serial Synchronous Controller 2 */
76 0, /* Timer Counter 0 */
77 6, /* Timer Counter 1 */ /* TWEEK */
78 0, /* Timer Counter 2 */
79 0, /* Timer Counter 3 */
80 0, /* Timer Counter 4 */
81 0, /* Timer Counter 5 */
82 2, /* USB Host port */
84 0, /* Advanced Interrupt Controller (IRQ0) */
85 0, /* Advanced Interrupt Controller (IRQ1) */
86 0, /* Advanced Interrupt Controller (IRQ2) */
87 0, /* Advanced Interrupt Controller (IRQ3) */
88 0, /* Advanced Interrupt Controller (IRQ4) */
89 0, /* Advanced Interrupt Controller (IRQ5) */
90 0 /* Advanced Interrupt Controller (IRQ6) */
93 static const uint32_t at91_pio_base[] = {
100 #define DEVICE(_name, _id, _unit) \
103 AT91RM92_ ## _id ##_BASE, \
104 AT91RM92_ ## _id ## _SIZE, \
105 AT91RM92_IRQ_ ## _id \
108 static const struct cpu_devs at91_devs[] =
110 DEVICE("at91_aic", AIC, 0),
111 DEVICE("at91_pmc", PMC, 0),
112 DEVICE("at91_st", ST, 0),
113 DEVICE("at91_pio", PIOA, 0),
114 DEVICE("at91_pio", PIOB, 1),
115 DEVICE("at91_pio", PIOC, 2),
116 DEVICE("at91_pio", PIOD, 3),
117 DEVICE("at91_rtc", RTC, 0),
119 DEVICE("at91_mci", MCI, 0),
120 DEVICE("at91_twi", TWI, 0),
121 DEVICE("at91_udp", UDP, 0),
122 DEVICE("ate", EMAC, 0),
123 DEVICE("at91_ssc", SSC0, 0),
124 DEVICE("at91_ssc", SSC1, 1),
125 DEVICE("at91_ssc", SSC2, 2),
126 DEVICE("spi", SPI, 0),
128 DEVICE("uart", DBGU, 0),
129 DEVICE("uart", USART0, 1),
130 DEVICE("uart", USART1, 2),
131 DEVICE("uart", USART2, 3),
132 DEVICE("uart", USART3, 4),
133 DEVICE("at91_mc", MC, 0),
134 DEVICE("at91_tc", TC0, 0),
135 DEVICE("at91_tc", TC1, 1),
136 DEVICE("ohci", OHCI, 0),
137 DEVICE("at91_cfata", CF, 0),
142 at91_pll_outb(int freq)
145 if (freq > 155000000)
152 /* -- XXX are these needed? */
153 /* Disable all interrupts for RTC (0xe24 == RTC_IDR) */
154 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xe24, 0xffffffff);
156 /* Disable all interrupts for the SDRAM controller */
157 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xfa8, 0xffffffff);
161 at91_clock_init(void)
163 struct at91_pmc_clock *clk;
165 /* Update USB device port clock info */
166 clk = at91_pmc_clock_ref("udpck");
167 clk->pmc_mask = PMC_SCER_UDP;
168 at91_pmc_clock_deref(clk);
170 /* Update USB host port clock info */
171 clk = at91_pmc_clock_ref("uhpck");
172 clk->pmc_mask = PMC_SCER_UHP;
173 at91_pmc_clock_deref(clk);
175 /* Each SOC has different PLL contraints */
176 clk = at91_pmc_clock_ref("plla");
177 clk->pll_min_in = RM9200_PLL_A_MIN_IN_FREQ; /* 1 MHz */
178 clk->pll_max_in = RM9200_PLL_A_MAX_IN_FREQ; /* 32 MHz */
179 clk->pll_min_out = RM9200_PLL_A_MIN_OUT_FREQ; /* 80 MHz */
180 clk->pll_max_out = RM9200_PLL_A_MAX_OUT_FREQ; /* 180 MHz */
181 clk->pll_mul_shift = RM9200_PLL_A_MUL_SHIFT;
182 clk->pll_mul_mask = RM9200_PLL_A_MUL_MASK;
183 clk->pll_div_shift = RM9200_PLL_A_DIV_SHIFT;
184 clk->pll_div_mask = RM9200_PLL_A_DIV_MASK;
185 clk->set_outb = at91_pll_outb;
186 at91_pmc_clock_deref(clk);
188 clk = at91_pmc_clock_ref("pllb");
189 clk->pll_min_in = RM9200_PLL_B_MIN_IN_FREQ; /* 100 KHz */
190 clk->pll_max_in = RM9200_PLL_B_MAX_IN_FREQ; /* 32 MHz */
191 clk->pll_min_out = RM9200_PLL_B_MIN_OUT_FREQ; /* 30 MHz */
192 clk->pll_max_out = RM9200_PLL_B_MAX_OUT_FREQ; /* 240 MHz */
193 clk->pll_mul_shift = RM9200_PLL_B_MUL_SHIFT;
194 clk->pll_mul_mask = RM9200_PLL_B_MUL_MASK;
195 clk->pll_div_shift = RM9200_PLL_B_DIV_SHIFT;
196 clk->pll_div_mask = RM9200_PLL_B_DIV_MASK;
197 clk->set_outb = at91_pll_outb;
198 at91_pmc_clock_deref(clk);
201 static struct at91_soc_data soc_data = {
202 .soc_delay = at91_st_delay,
203 .soc_reset = at91_st_cpu_reset,
204 .soc_clock_init = at91_clock_init,
205 .soc_irq_prio = at91_irq_prio,
206 .soc_children = at91_devs,
207 .soc_pio_base = at91_pio_base,
208 .soc_pio_count = nitems(at91_pio_base),
211 AT91_SOC(AT91_T_RM9200, &soc_data);