2 * Copyright (c) 2005 Olivier Houchard. All rights reserved.
3 * Copyright (c) 2010 Greg Ansley. All rights reserved.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include <sys/param.h>
31 #include <sys/systm.h>
33 #include <sys/kernel.h>
34 #include <sys/malloc.h>
35 #include <sys/module.h>
37 #define _ARM32_BUS_DMA_PRIVATE
38 #include <machine/bus.h>
40 #include <arm/at91/at91var.h>
41 #include <arm/at91/at91reg.h>
42 #include <arm/at91/at91rm92reg.h>
43 #include <arm/at91/at91_aicreg.h>
44 #include <arm/at91/at91_pmcreg.h>
45 #include <arm/at91/at91_streg.h>
46 #include <arm/at91/at91_pmcvar.h>
47 #include <arm/at91/at91soc.h>
50 * Standard priority levels for the system. 0 is lowest and 7 is highest.
51 * These values are the ones Atmel uses for its Linux port, which differ
52 * a little form the ones that are in the standard distribution. Also,
53 * the ones marked with 'TWEEK' are different based on experience.
55 static const int at91_irq_prio[32] =
57 7, /* Advanced Interrupt Controller (FIQ) */
58 7, /* System Peripherals */
59 1, /* Parallel IO Controller A */
60 1, /* Parallel IO Controller B */
61 1, /* Parallel IO Controller C */
62 1, /* Parallel IO Controller D */
67 0, /* Multimedia Card Interface */
68 2, /* USB Device Port */
69 4, /* Two-Wire Interface */ /* TWEEK */
70 5, /* Serial Peripheral Interface */
71 4, /* Serial Synchronous Controller 0 */
72 6, /* Serial Synchronous Controller 1 */ /* TWEEK */
73 4, /* Serial Synchronous Controller 2 */
74 0, /* Timer Counter 0 */
75 6, /* Timer Counter 1 */ /* TWEEK */
76 0, /* Timer Counter 2 */
77 0, /* Timer Counter 3 */
78 0, /* Timer Counter 4 */
79 0, /* Timer Counter 5 */
80 2, /* USB Host port */
82 0, /* Advanced Interrupt Controller (IRQ0) */
83 0, /* Advanced Interrupt Controller (IRQ1) */
84 0, /* Advanced Interrupt Controller (IRQ2) */
85 0, /* Advanced Interrupt Controller (IRQ3) */
86 0, /* Advanced Interrupt Controller (IRQ4) */
87 0, /* Advanced Interrupt Controller (IRQ5) */
88 0 /* Advanced Interrupt Controller (IRQ6) */
91 static const uint32_t at91_pio_base[] = {
98 #define DEVICE(_name, _id, _unit) \
101 AT91RM92_ ## _id ##_BASE, \
102 AT91RM92_ ## _id ## _SIZE, \
103 AT91RM92_IRQ_ ## _id \
106 static const struct cpu_devs at91_devs[] =
108 DEVICE("at91_aic", AIC, 0),
109 DEVICE("at91_pmc", PMC, 0),
110 DEVICE("at91_st", ST, 0),
111 DEVICE("at91_pio", PIOA, 0),
112 DEVICE("at91_pio", PIOB, 1),
113 DEVICE("at91_pio", PIOC, 2),
114 DEVICE("at91_pio", PIOD, 3),
115 DEVICE("at91_rtc", RTC, 0),
117 DEVICE("at91_mci", MCI, 0),
118 DEVICE("at91_twi", TWI, 0),
119 DEVICE("at91_udp", UDP, 0),
120 DEVICE("ate", EMAC, 0),
121 DEVICE("at91_ssc", SSC0, 0),
122 DEVICE("at91_ssc", SSC1, 1),
123 DEVICE("at91_ssc", SSC2, 2),
124 DEVICE("spi", SPI, 0),
126 DEVICE("uart", DBGU, 0),
127 DEVICE("uart", USART0, 1),
128 DEVICE("uart", USART1, 2),
129 DEVICE("uart", USART2, 3),
130 DEVICE("uart", USART3, 4),
131 DEVICE("at91_mc", MC, 0),
132 DEVICE("at91_tc", TC0, 0),
133 DEVICE("at91_tc", TC1, 1),
134 DEVICE("ohci", OHCI, 0),
135 DEVICE("at91_cfata", CF, 0),
140 at91_pll_outb(int freq)
143 if (freq > 155000000)
150 /* -- XXX are these needed? */
151 /* Disable all interrupts for RTC (0xe24 == RTC_IDR) */
152 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xe24, 0xffffffff);
154 /* Disable all interrupts for the SDRAM controller */
155 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xfa8, 0xffffffff);
159 at91_clock_init(void)
161 struct at91_pmc_clock *clk;
163 /* Update USB device port clock info */
164 clk = at91_pmc_clock_ref("udpck");
165 clk->pmc_mask = PMC_SCER_UDP;
166 at91_pmc_clock_deref(clk);
168 /* Update USB host port clock info */
169 clk = at91_pmc_clock_ref("uhpck");
170 clk->pmc_mask = PMC_SCER_UHP;
171 at91_pmc_clock_deref(clk);
173 /* Each SOC has different PLL contraints */
174 clk = at91_pmc_clock_ref("plla");
175 clk->pll_min_in = RM9200_PLL_A_MIN_IN_FREQ; /* 1 MHz */
176 clk->pll_max_in = RM9200_PLL_A_MAX_IN_FREQ; /* 32 MHz */
177 clk->pll_min_out = RM9200_PLL_A_MIN_OUT_FREQ; /* 80 MHz */
178 clk->pll_max_out = RM9200_PLL_A_MAX_OUT_FREQ; /* 180 MHz */
179 clk->pll_mul_shift = RM9200_PLL_A_MUL_SHIFT;
180 clk->pll_mul_mask = RM9200_PLL_A_MUL_MASK;
181 clk->pll_div_shift = RM9200_PLL_A_DIV_SHIFT;
182 clk->pll_div_mask = RM9200_PLL_A_DIV_MASK;
183 clk->set_outb = at91_pll_outb;
184 at91_pmc_clock_deref(clk);
186 clk = at91_pmc_clock_ref("pllb");
187 clk->pll_min_in = RM9200_PLL_B_MIN_IN_FREQ; /* 100 KHz */
188 clk->pll_max_in = RM9200_PLL_B_MAX_IN_FREQ; /* 32 MHz */
189 clk->pll_min_out = RM9200_PLL_B_MIN_OUT_FREQ; /* 30 MHz */
190 clk->pll_max_out = RM9200_PLL_B_MAX_OUT_FREQ; /* 240 MHz */
191 clk->pll_mul_shift = RM9200_PLL_B_MUL_SHIFT;
192 clk->pll_mul_mask = RM9200_PLL_B_MUL_MASK;
193 clk->pll_div_shift = RM9200_PLL_B_DIV_SHIFT;
194 clk->pll_div_mask = RM9200_PLL_B_DIV_MASK;
195 clk->set_outb = at91_pll_outb;
196 at91_pmc_clock_deref(clk);
199 static struct at91_soc_data soc_data = {
200 .soc_delay = at91_st_delay,
201 .soc_reset = at91_st_cpu_reset,
202 .soc_clock_init = at91_clock_init,
203 .soc_irq_prio = at91_irq_prio,
204 .soc_children = at91_devs,
205 .soc_pio_base = at91_pio_base,
206 .soc_pio_count = nitems(at91_pio_base),
209 AT91_SOC(AT91_T_RM9200, &soc_data);