3 # Unlike other Atmel SoCs, which have their SDRAM at CS1, the
4 # at91sam9g45 family has it on CS6, so PHYSADDR must be adjusted
5 # accordingly. The at91sam9g45, at91sam9g46, at91sam9m10 and at91sam9m11
6 # SoCs are members of this family.
8 files "../at91/files.at91"
11 makeoptions CONF_CFLAGS=-mcpu=arm9
12 options PHYSADDR=0x70000000
13 options NO_EVENTTIMERS
15 # bring in the sam specific timers and such