2 * Copyright (c) 2005 M. Warner Losh
3 * Copyright (c) 2005 cognet
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
32 #include <sys/systm.h>
37 #include <machine/bus.h>
39 #include <dev/uart/uart.h>
40 #include <dev/uart/uart_cpu.h>
41 #include <dev/uart/uart_bus.h>
42 #include <arm/at91/at91rm92reg.h>
43 #include <arm/at91/at91_usartreg.h>
47 #define DEFAULT_RCLK AT91C_MASTER_CLOCK
49 #define SIGCHG(c, i, s, d) \
52 i |= (i & s) ? s : s | d; \
54 i = (i & s) ? (i & ~s) | d : i; \
59 * Low-level UART interface.
61 static int at91_usart_probe(struct uart_bas *bas);
62 static void at91_usart_init(struct uart_bas *bas, int, int, int, int);
63 static void at91_usart_term(struct uart_bas *bas);
64 static void at91_usart_putc(struct uart_bas *bas, int);
65 static int at91_usart_poll(struct uart_bas *bas);
66 static int at91_usart_getc(struct uart_bas *bas);
68 extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs;
71 at91_usart_param(struct uart_bas *bas, int baudrate, int databits,
72 int stopbits, int parity)
77 * Assume 3-write RS-232 configuration.
78 * XXX Not sure how uart will present the other modes to us, so
79 * XXX they are unimplemented. maybe ioctl?
81 mr = USART_MR_MODE_NORMAL;
82 mr |= USART_MR_USCLKS_MCK; /* Assume MCK */
85 * Or in the databits requested
88 mr &= ~USART_MR_MODE9;
91 mr |= USART_MR_CHRL_5BITS;
94 mr |= USART_MR_CHRL_6BITS;
97 mr |= USART_MR_CHRL_7BITS;
100 mr |= USART_MR_CHRL_8BITS;
103 mr |= USART_MR_CHRL_8BITS | USART_MR_MODE9;
113 case UART_PARITY_NONE:
114 mr |= USART_MR_PAR_NONE;
116 case UART_PARITY_ODD:
117 mr |= USART_MR_PAR_ODD;
119 case UART_PARITY_EVEN:
120 mr |= USART_MR_PAR_EVEN;
122 case UART_PARITY_MARK:
123 mr |= USART_MR_PAR_MARK;
125 case UART_PARITY_SPACE:
126 mr |= USART_MR_PAR_SPACE;
133 * Or in the stop bits. Note: The hardware supports
134 * 1.5 stop bits in async mode, but there's no way to
135 * specify that AFAICT.
138 mr |= USART_MR_NBSTOP_2;
140 mr |= USART_MR_NBSTOP_2;
141 /* else if (stopbits == 1.5)
142 mr |= USART_MR_NBSTOP_1_5; */
145 * We want normal plumbing mode too, none of this fancy
146 * loopback or echo mode.
148 mr |= USART_MR_CHMODE_NORMAL;
150 mr &= ~USART_MR_MSBF; /* lsb first */
151 mr &= ~USART_MR_CKLO_SCK; /* Don't drive SCK */
153 /* XXX Need to take possible synchronous mode into account */
157 struct uart_ops at91_usart_ops = {
158 .probe = at91_usart_probe,
159 .init = at91_usart_init,
160 .term = at91_usart_term,
161 .putc = at91_usart_putc,
162 .poll = at91_usart_poll,
163 .getc = at91_usart_getc,
167 at91_usart_probe(struct uart_bas *bas)
169 /* We know that this is always here */
174 * Initialize this device (I think as the console)
177 at91_usart_init(struct uart_bas *bas, int baudrate, int databits, int stopbits,
180 at91_usart_param(bas, baudrate, databits, stopbits, parity);
182 /* Turn on rx and tx */
183 uart_setreg(bas, USART_CR, USART_CR_RSTRX | USART_CR_RSTTX);
184 uart_setreg(bas, USART_CR, USART_CR_RXEN | USART_CR_TXEN);
185 uart_setreg(bas, USART_IER, USART_CSR_TXRDY | USART_CSR_RXRDY);
189 * Free resources now that we're no longer the console. This appears to
190 * be never called, and I'm unsure quite what to do if I am called.
193 at91_usart_term(struct uart_bas *bas)
199 * Put a character of console output (so we do it here polling rather than
203 at91_usart_putc(struct uart_bas *bas, int c)
206 while (!(uart_getreg(bas, USART_CSR) &
208 uart_setreg(bas, USART_THR, c);
212 * Poll for a character available
215 at91_usart_poll(struct uart_bas *bas)
218 if (!(uart_getreg(bas, USART_CSR) & USART_CSR_RXRDY))
220 return (uart_getreg(bas, USART_RHR) & 0xff);
224 * Block waiting for a character.
227 at91_usart_getc(struct uart_bas *bas)
231 while (!(uart_getreg(bas, USART_CSR) & USART_CSR_RXRDY))
233 c = uart_getreg(bas, USART_RHR);
238 static int at91_usart_bus_probe(struct uart_softc *sc);
239 static int at91_usart_bus_attach(struct uart_softc *sc);
240 static int at91_usart_bus_flush(struct uart_softc *, int);
241 static int at91_usart_bus_getsig(struct uart_softc *);
242 static int at91_usart_bus_ioctl(struct uart_softc *, int, intptr_t);
243 static int at91_usart_bus_ipend(struct uart_softc *);
244 static int at91_usart_bus_param(struct uart_softc *, int, int, int, int);
245 static int at91_usart_bus_receive(struct uart_softc *);
246 static int at91_usart_bus_setsig(struct uart_softc *, int);
247 static int at91_usart_bus_transmit(struct uart_softc *);
249 static kobj_method_t at91_usart_methods[] = {
250 KOBJMETHOD(uart_probe, at91_usart_bus_probe),
251 KOBJMETHOD(uart_attach, at91_usart_bus_attach),
252 KOBJMETHOD(uart_flush, at91_usart_bus_flush),
253 KOBJMETHOD(uart_getsig, at91_usart_bus_getsig),
254 KOBJMETHOD(uart_ioctl, at91_usart_bus_ioctl),
255 KOBJMETHOD(uart_ipend, at91_usart_bus_ipend),
256 KOBJMETHOD(uart_param, at91_usart_bus_param),
257 KOBJMETHOD(uart_receive, at91_usart_bus_receive),
258 KOBJMETHOD(uart_setsig, at91_usart_bus_setsig),
259 KOBJMETHOD(uart_transmit, at91_usart_bus_transmit),
265 at91_usart_bus_probe(struct uart_softc *sc)
271 at91_usart_bus_attach(struct uart_softc *sc)
279 at91_usart_bus_transmit(struct uart_softc *sc)
283 /* XXX VERY sub-optimial */
284 mtx_lock_spin(&sc->sc_hwmtx);
286 for (i = 0; i < sc->sc_txdatasz; i++)
287 at91_usart_putc(&sc->sc_bas, sc->sc_txbuf[i]);
288 mtx_unlock_spin(&sc->sc_hwmtx);
289 #ifdef USART0_CONSOLE
291 * XXX: Gross hack : Skyeye doesn't raise an interrupt once the
292 * transfer is done, so simulate it.
294 uart_setreg(&sc->sc_bas, USART_IER, USART_CSR_TXRDY);
299 at91_usart_bus_setsig(struct uart_softc *sc, int sig)
301 uint32_t new, old, cr;
302 struct uart_bas *bas;
308 SIGCHG(sig & SER_DTR, new, SER_DTR, SER_DDTR);
310 SIGCHG(sig & SER_RTS, new, SER_RTS, SER_DRTS);
311 } while (!atomic_cmpset_32(&sc->sc_hwsig, old, new));
313 mtx_lock_spin(&sc->sc_hwmtx);
314 cr = uart_getreg(bas, USART_CR);
315 cr &= ~(USART_CR_DTREN | USART_CR_DTRDIS | USART_CR_RTSEN |
318 cr |= USART_CR_DTREN;
320 cr |= USART_CR_DTRDIS;
322 cr |= USART_CR_RTSEN;
324 cr |= USART_CR_RTSDIS;
325 uart_setreg(bas, USART_CR, cr);
326 mtx_unlock_spin(&sc->sc_hwmtx);
330 at91_usart_bus_receive(struct uart_softc *sc)
333 mtx_lock_spin(&sc->sc_hwmtx);
334 uart_rx_put(sc, at91_usart_getc(&sc->sc_bas));
335 mtx_unlock_spin(&sc->sc_hwmtx);
339 at91_usart_bus_param(struct uart_softc *sc, int baudrate, int databits,
340 int stopbits, int parity)
342 return (at91_usart_param(&sc->sc_bas, baudrate, databits, stopbits,
346 at91_usart_bus_ipend(struct uart_softc *sc)
348 int csr = uart_getreg(&sc->sc_bas, USART_CSR);
351 #ifdef USART0_CONSOLE
353 * XXX: We have to cheat for skyeye, as it will return 0xff for all
354 * the devices it doesn't emulate.
356 if (sc->sc_bas.chan != 1)
360 mtx_lock_spin(&sc->sc_hwmtx);
361 if (csr & USART_CSR_TXRDY && sc->sc_txbusy)
362 ipend |= SER_INT_TXIDLE;
363 if (csr & USART_CSR_RXRDY)
364 ipend |= SER_INT_RXREADY;
365 mtx_unlock_spin(&sc->sc_hwmtx);
369 at91_usart_bus_flush(struct uart_softc *sc, int what)
375 at91_usart_bus_getsig(struct uart_softc *sc)
380 mtx_lock_spin(&sc->sc_hwmtx);
381 csr = uart_getreg(&sc->sc_bas, USART_CSR);
383 if (csr & USART_CSR_CTS)
385 if (csr & USART_CSR_DCD)
387 if (csr & USART_CSR_DSR)
389 if (csr & USART_CSR_RI)
391 new = sig & ~SER_MASK_DELTA;
393 mtx_unlock_spin(&sc->sc_hwmtx);
398 at91_usart_bus_ioctl(struct uart_softc *sc, int request, intptr_t data)
402 struct uart_class at91_usart_class = {
407 .uc_rclk = DEFAULT_RCLK