2 * Copyright (C) 2013-2015 Daisuke Aoyama <aoyama@peach.ne.jp>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
32 #include <sys/systm.h>
35 #include <sys/kernel.h>
37 #include <sys/malloc.h>
38 #include <sys/module.h>
39 #include <sys/mutex.h>
41 #include <sys/sysctl.h>
43 #include <machine/bus.h>
44 #include <machine/cpu.h>
45 #include <machine/intr.h>
47 #include <dev/ofw/ofw_bus.h>
48 #include <dev/ofw/ofw_bus_subr.h>
50 #include <arm/broadcom/bcm2835/bcm2835_mbox.h>
51 #include <arm/broadcom/bcm2835/bcm2835_mbox_prop.h>
52 #include <arm/broadcom/bcm2835/bcm2835_vcbus.h>
54 #include "cpufreq_if.h"
58 #define DPRINTF(fmt, ...) do { \
59 printf("%s:%u: ", __func__, __LINE__); \
60 printf(fmt, ##__VA_ARGS__); \
63 #define DPRINTF(fmt, ...)
66 #define HZ2MHZ(freq) ((freq) / (1000 * 1000))
67 #define MHZ2HZ(freq) ((freq) * (1000 * 1000))
70 #define OFFSET2MVOLT(val) (1200 + ((val) * 25))
71 #define MVOLT2OFFSET(val) (((val) - 1200) / 25)
72 #define DEFAULT_ARM_FREQUENCY 700
73 #define DEFAULT_LOWEST_FREQ 300
75 #define OFFSET2MVOLT(val) (((val) / 1000))
76 #define MVOLT2OFFSET(val) (((val) * 1000))
77 #define DEFAULT_ARM_FREQUENCY 600
78 #define DEFAULT_LOWEST_FREQ 600
80 #define DEFAULT_CORE_FREQUENCY 250
81 #define DEFAULT_SDRAM_FREQUENCY 400
82 #define TRANSITION_LATENCY 1000
83 #define MIN_OVER_VOLTAGE -16
84 #define MAX_OVER_VOLTAGE 6
85 #define MSG_ERROR -999999999
87 #define HZSTEP (MHZ2HZ(MHZSTEP))
90 #define VC_LOCK(sc) do { \
91 sema_wait(&vc_sema); \
93 #define VC_UNLOCK(sc) do { \
94 sema_post(&vc_sema); \
97 /* ARM->VC mailbox property semaphore */
98 static struct sema vc_sema;
100 static struct sysctl_ctx_list bcm2835_sysctl_ctx;
102 struct bcm2835_cpufreq_softc {
110 int max_voltage_core;
111 int min_voltage_core;
113 /* the values written in mbox */
121 /* initial hook for waiting mbox intr */
122 struct intr_config_hook init_hook;
125 static struct ofw_compat_data compat_data[] = {
126 { "broadcom,bcm2835-vc", 1 },
127 { "broadcom,bcm2708-vc", 1 },
128 { "brcm,bcm2709", 1 },
129 { "brcm,bcm2836", 1 },
130 { "brcm,bcm2837", 1 },
134 static int cpufreq_verbose = 0;
135 TUNABLE_INT("hw.bcm2835.cpufreq.verbose", &cpufreq_verbose);
136 static int cpufreq_lowest_freq = DEFAULT_LOWEST_FREQ;
137 TUNABLE_INT("hw.bcm2835.cpufreq.lowest_freq", &cpufreq_lowest_freq);
141 bcm2835_dump(const void *data, int len)
143 const uint8_t *p = (const uint8_t*)data;
146 printf("dump @ %p:\n", data);
147 for (i = 0; i < len; i++) {
148 printf("%2.2x ", p[i]);
159 bcm2835_cpufreq_get_clock_rate(struct bcm2835_cpufreq_softc *sc,
162 struct msg_get_clock_rate msg;
180 /* setup single tag buffer */
181 memset(&msg, 0, sizeof(msg));
182 msg.hdr.buf_size = sizeof(msg);
183 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
184 msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_CLOCK_RATE;
185 msg.tag_hdr.val_buf_size = sizeof(msg.body);
186 msg.tag_hdr.val_len = sizeof(msg.body.req);
187 msg.body.req.clock_id = clock_id;
190 /* call mailbox property */
191 err = bcm2835_mbox_property(&msg, sizeof(msg));
193 device_printf(sc->dev, "can't get clock rate (id=%u)\n",
199 rate = (int)msg.body.resp.rate_hz;
200 DPRINTF("clock = %d(Hz)\n", rate);
205 bcm2835_cpufreq_get_max_clock_rate(struct bcm2835_cpufreq_softc *sc,
208 struct msg_get_max_clock_rate msg;
226 /* setup single tag buffer */
227 memset(&msg, 0, sizeof(msg));
228 msg.hdr.buf_size = sizeof(msg);
229 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
230 msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MAX_CLOCK_RATE;
231 msg.tag_hdr.val_buf_size = sizeof(msg.body);
232 msg.tag_hdr.val_len = sizeof(msg.body.req);
233 msg.body.req.clock_id = clock_id;
236 /* call mailbox property */
237 err = bcm2835_mbox_property(&msg, sizeof(msg));
239 device_printf(sc->dev, "can't get max clock rate (id=%u)\n",
245 rate = (int)msg.body.resp.rate_hz;
246 DPRINTF("clock = %d(Hz)\n", rate);
251 bcm2835_cpufreq_get_min_clock_rate(struct bcm2835_cpufreq_softc *sc,
254 struct msg_get_min_clock_rate msg;
272 /* setup single tag buffer */
273 memset(&msg, 0, sizeof(msg));
274 msg.hdr.buf_size = sizeof(msg);
275 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
276 msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MIN_CLOCK_RATE;
277 msg.tag_hdr.val_buf_size = sizeof(msg.body);
278 msg.tag_hdr.val_len = sizeof(msg.body.req);
279 msg.body.req.clock_id = clock_id;
282 /* call mailbox property */
283 err = bcm2835_mbox_property(&msg, sizeof(msg));
285 device_printf(sc->dev, "can't get min clock rate (id=%u)\n",
291 rate = (int)msg.body.resp.rate_hz;
292 DPRINTF("clock = %d(Hz)\n", rate);
297 bcm2835_cpufreq_set_clock_rate(struct bcm2835_cpufreq_softc *sc,
298 uint32_t clock_id, uint32_t rate_hz)
300 struct msg_set_clock_rate msg;
319 /* setup single tag buffer */
320 memset(&msg, 0, sizeof(msg));
321 msg.hdr.buf_size = sizeof(msg);
322 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
323 msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_CLOCK_RATE;
324 msg.tag_hdr.val_buf_size = sizeof(msg.body);
325 msg.tag_hdr.val_len = sizeof(msg.body.req);
326 msg.body.req.clock_id = clock_id;
327 msg.body.req.rate_hz = rate_hz;
330 /* call mailbox property */
331 err = bcm2835_mbox_property(&msg, sizeof(msg));
333 device_printf(sc->dev, "can't set clock rate (id=%u)\n",
338 /* workaround for core clock */
339 if (clock_id == BCM2835_MBOX_CLOCK_ID_CORE) {
340 /* for safety (may change voltage without changing clock) */
341 DELAY(TRANSITION_LATENCY);
344 * XXX: the core clock is unable to change at once,
345 * to change certainly, write it twice now.
348 /* setup single tag buffer */
349 memset(&msg, 0, sizeof(msg));
350 msg.hdr.buf_size = sizeof(msg);
351 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
352 msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_CLOCK_RATE;
353 msg.tag_hdr.val_buf_size = sizeof(msg.body);
354 msg.tag_hdr.val_len = sizeof(msg.body.req);
355 msg.body.req.clock_id = clock_id;
356 msg.body.req.rate_hz = rate_hz;
359 /* call mailbox property */
360 err = bcm2835_mbox_property(&msg, sizeof(msg));
362 device_printf(sc->dev,
363 "can't set clock rate (id=%u)\n", clock_id);
369 rate = (int)msg.body.resp.rate_hz;
370 DPRINTF("clock = %d(Hz)\n", rate);
375 bcm2835_cpufreq_get_turbo(struct bcm2835_cpufreq_softc *sc)
377 struct msg_get_turbo msg;
395 /* setup single tag buffer */
396 memset(&msg, 0, sizeof(msg));
397 msg.hdr.buf_size = sizeof(msg);
398 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
399 msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_TURBO;
400 msg.tag_hdr.val_buf_size = sizeof(msg.body);
401 msg.tag_hdr.val_len = sizeof(msg.body.req);
405 /* call mailbox property */
406 err = bcm2835_mbox_property(&msg, sizeof(msg));
408 device_printf(sc->dev, "can't get turbo\n");
412 /* result 0=non-turbo, 1=turbo */
413 level = (int)msg.body.resp.level;
414 DPRINTF("level = %d\n", level);
419 bcm2835_cpufreq_set_turbo(struct bcm2835_cpufreq_softc *sc, uint32_t level)
421 struct msg_set_turbo msg;
440 /* replace unknown value to OFF */
441 if (level != BCM2835_MBOX_TURBO_ON && level != BCM2835_MBOX_TURBO_OFF)
442 level = BCM2835_MBOX_TURBO_OFF;
444 /* setup single tag buffer */
445 memset(&msg, 0, sizeof(msg));
446 msg.hdr.buf_size = sizeof(msg);
447 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
448 msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_TURBO;
449 msg.tag_hdr.val_buf_size = sizeof(msg.body);
450 msg.tag_hdr.val_len = sizeof(msg.body.req);
452 msg.body.req.level = level;
455 /* call mailbox property */
456 err = bcm2835_mbox_property(&msg, sizeof(msg));
458 device_printf(sc->dev, "can't set turbo\n");
462 /* result 0=non-turbo, 1=turbo */
463 value = (int)msg.body.resp.level;
464 DPRINTF("level = %d\n", value);
469 bcm2835_cpufreq_get_voltage(struct bcm2835_cpufreq_softc *sc,
472 struct msg_get_voltage msg;
487 * u32: value (offset from 1.2V in units of 0.025V)
490 /* setup single tag buffer */
491 memset(&msg, 0, sizeof(msg));
492 msg.hdr.buf_size = sizeof(msg);
493 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
494 msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_VOLTAGE;
495 msg.tag_hdr.val_buf_size = sizeof(msg.body);
496 msg.tag_hdr.val_len = sizeof(msg.body.req);
497 msg.body.req.voltage_id = voltage_id;
500 /* call mailbox property */
501 err = bcm2835_mbox_property(&msg, sizeof(msg));
503 device_printf(sc->dev, "can't get voltage\n");
507 /* result (offset from 1.2V) */
508 value = (int)msg.body.resp.value;
509 DPRINTF("value = %d\n", value);
514 bcm2835_cpufreq_get_max_voltage(struct bcm2835_cpufreq_softc *sc,
517 struct msg_get_max_voltage msg;
532 * u32: value (offset from 1.2V in units of 0.025V)
535 /* setup single tag buffer */
536 memset(&msg, 0, sizeof(msg));
537 msg.hdr.buf_size = sizeof(msg);
538 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
539 msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MAX_VOLTAGE;
540 msg.tag_hdr.val_buf_size = sizeof(msg.body);
541 msg.tag_hdr.val_len = sizeof(msg.body.req);
542 msg.body.req.voltage_id = voltage_id;
545 /* call mailbox property */
546 err = bcm2835_mbox_property(&msg, sizeof(msg));
548 device_printf(sc->dev, "can't get max voltage\n");
552 /* result (offset from 1.2V) */
553 value = (int)msg.body.resp.value;
554 DPRINTF("value = %d\n", value);
558 bcm2835_cpufreq_get_min_voltage(struct bcm2835_cpufreq_softc *sc,
561 struct msg_get_min_voltage msg;
576 * u32: value (offset from 1.2V in units of 0.025V)
579 /* setup single tag buffer */
580 memset(&msg, 0, sizeof(msg));
581 msg.hdr.buf_size = sizeof(msg);
582 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
583 msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MIN_VOLTAGE;
584 msg.tag_hdr.val_buf_size = sizeof(msg.body);
585 msg.tag_hdr.val_len = sizeof(msg.body.req);
586 msg.body.req.voltage_id = voltage_id;
589 /* call mailbox property */
590 err = bcm2835_mbox_property(&msg, sizeof(msg));
592 device_printf(sc->dev, "can't get min voltage\n");
596 /* result (offset from 1.2V) */
597 value = (int)msg.body.resp.value;
598 DPRINTF("value = %d\n", value);
603 bcm2835_cpufreq_set_voltage(struct bcm2835_cpufreq_softc *sc,
604 uint32_t voltage_id, int32_t value)
606 struct msg_set_voltage msg;
616 * u32: value (offset from 1.2V in units of 0.025V)
621 * u32: value (offset from 1.2V in units of 0.025V)
626 * 0 (1.2 V). Values above 6 are only allowed when force_turbo or
627 * current_limit_override are specified (which set the warranty bit).
629 if (value > MAX_OVER_VOLTAGE || value < MIN_OVER_VOLTAGE) {
630 /* currently not supported */
631 device_printf(sc->dev, "not supported voltage: %d\n", value);
635 /* setup single tag buffer */
636 memset(&msg, 0, sizeof(msg));
637 msg.hdr.buf_size = sizeof(msg);
638 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
639 msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_VOLTAGE;
640 msg.tag_hdr.val_buf_size = sizeof(msg.body);
641 msg.tag_hdr.val_len = sizeof(msg.body.req);
642 msg.body.req.voltage_id = voltage_id;
643 msg.body.req.value = (uint32_t)value;
646 /* call mailbox property */
647 err = bcm2835_mbox_property(&msg, sizeof(msg));
649 device_printf(sc->dev, "can't set voltage\n");
653 /* result (offset from 1.2V) */
654 value = (int)msg.body.resp.value;
655 DPRINTF("value = %d\n", value);
660 bcm2835_cpufreq_get_temperature(struct bcm2835_cpufreq_softc *sc)
662 struct msg_get_temperature msg;
672 * u32: temperature id
676 * u32: temperature id
680 /* setup single tag buffer */
681 memset(&msg, 0, sizeof(msg));
682 msg.hdr.buf_size = sizeof(msg);
683 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
684 msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_TEMPERATURE;
685 msg.tag_hdr.val_buf_size = sizeof(msg.body);
686 msg.tag_hdr.val_len = sizeof(msg.body.req);
687 msg.body.req.temperature_id = 0;
690 /* call mailbox property */
691 err = bcm2835_mbox_property(&msg, sizeof(msg));
693 device_printf(sc->dev, "can't get temperature\n");
697 /* result (temperature of degree C) */
698 value = (int)msg.body.resp.value;
699 DPRINTF("value = %d\n", value);
706 sysctl_bcm2835_cpufreq_arm_freq(SYSCTL_HANDLER_ARGS)
708 struct bcm2835_cpufreq_softc *sc = arg1;
712 /* get realtime value */
714 val = bcm2835_cpufreq_get_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM);
716 if (val == MSG_ERROR)
719 err = sysctl_handle_int(oidp, &val, 0, req);
720 if (err || !req->newptr) /* error || read request */
725 err = bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM,
728 if (err == MSG_ERROR) {
729 device_printf(sc->dev, "set clock arm_freq error\n");
732 DELAY(TRANSITION_LATENCY);
738 sysctl_bcm2835_cpufreq_core_freq(SYSCTL_HANDLER_ARGS)
740 struct bcm2835_cpufreq_softc *sc = arg1;
744 /* get realtime value */
746 val = bcm2835_cpufreq_get_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE);
748 if (val == MSG_ERROR)
751 err = sysctl_handle_int(oidp, &val, 0, req);
752 if (err || !req->newptr) /* error || read request */
757 err = bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE,
759 if (err == MSG_ERROR) {
761 device_printf(sc->dev, "set clock core_freq error\n");
765 DELAY(TRANSITION_LATENCY);
771 sysctl_bcm2835_cpufreq_sdram_freq(SYSCTL_HANDLER_ARGS)
773 struct bcm2835_cpufreq_softc *sc = arg1;
777 /* get realtime value */
779 val = bcm2835_cpufreq_get_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_SDRAM);
781 if (val == MSG_ERROR)
784 err = sysctl_handle_int(oidp, &val, 0, req);
785 if (err || !req->newptr) /* error || read request */
790 err = bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_SDRAM,
793 if (err == MSG_ERROR) {
794 device_printf(sc->dev, "set clock sdram_freq error\n");
797 DELAY(TRANSITION_LATENCY);
803 sysctl_bcm2835_cpufreq_turbo(SYSCTL_HANDLER_ARGS)
805 struct bcm2835_cpufreq_softc *sc = arg1;
809 /* get realtime value */
811 val = bcm2835_cpufreq_get_turbo(sc);
813 if (val == MSG_ERROR)
816 err = sysctl_handle_int(oidp, &val, 0, req);
817 if (err || !req->newptr) /* error || read request */
822 sc->turbo_mode = BCM2835_MBOX_TURBO_ON;
824 sc->turbo_mode = BCM2835_MBOX_TURBO_OFF;
827 err = bcm2835_cpufreq_set_turbo(sc, sc->turbo_mode);
829 if (err == MSG_ERROR) {
830 device_printf(sc->dev, "set turbo error\n");
833 DELAY(TRANSITION_LATENCY);
839 sysctl_bcm2835_cpufreq_voltage_core(SYSCTL_HANDLER_ARGS)
841 struct bcm2835_cpufreq_softc *sc = arg1;
845 /* get realtime value */
847 val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_CORE);
849 if (val == MSG_ERROR)
852 err = sysctl_handle_int(oidp, &val, 0, req);
853 if (err || !req->newptr) /* error || read request */
857 if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
859 sc->voltage_core = val;
862 err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_CORE,
865 if (err == MSG_ERROR) {
866 device_printf(sc->dev, "set voltage core error\n");
869 DELAY(TRANSITION_LATENCY);
875 sysctl_bcm2835_cpufreq_voltage_sdram_c(SYSCTL_HANDLER_ARGS)
877 struct bcm2835_cpufreq_softc *sc = arg1;
881 /* get realtime value */
883 val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_C);
885 if (val == MSG_ERROR)
888 err = sysctl_handle_int(oidp, &val, 0, req);
889 if (err || !req->newptr) /* error || read request */
893 if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
895 sc->voltage_sdram_c = val;
898 err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_C,
899 sc->voltage_sdram_c);
901 if (err == MSG_ERROR) {
902 device_printf(sc->dev, "set voltage sdram_c error\n");
905 DELAY(TRANSITION_LATENCY);
911 sysctl_bcm2835_cpufreq_voltage_sdram_i(SYSCTL_HANDLER_ARGS)
913 struct bcm2835_cpufreq_softc *sc = arg1;
917 /* get realtime value */
919 val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_I);
921 if (val == MSG_ERROR)
924 err = sysctl_handle_int(oidp, &val, 0, req);
925 if (err || !req->newptr) /* error || read request */
929 if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
931 sc->voltage_sdram_i = val;
934 err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_I,
935 sc->voltage_sdram_i);
937 if (err == MSG_ERROR) {
938 device_printf(sc->dev, "set voltage sdram_i error\n");
941 DELAY(TRANSITION_LATENCY);
947 sysctl_bcm2835_cpufreq_voltage_sdram_p(SYSCTL_HANDLER_ARGS)
949 struct bcm2835_cpufreq_softc *sc = arg1;
953 /* get realtime value */
955 val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_P);
957 if (val == MSG_ERROR)
960 err = sysctl_handle_int(oidp, &val, 0, req);
961 if (err || !req->newptr) /* error || read request */
965 if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
967 sc->voltage_sdram_p = val;
970 err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_P,
971 sc->voltage_sdram_p);
973 if (err == MSG_ERROR) {
974 device_printf(sc->dev, "set voltage sdram_p error\n");
977 DELAY(TRANSITION_LATENCY);
983 sysctl_bcm2835_cpufreq_voltage_sdram(SYSCTL_HANDLER_ARGS)
985 struct bcm2835_cpufreq_softc *sc = arg1;
989 /* multiple write only */
993 err = sysctl_handle_int(oidp, &val, 0, req);
998 if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
1000 sc->voltage_sdram = val;
1003 err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_C,
1005 if (err == MSG_ERROR) {
1007 device_printf(sc->dev, "set voltage sdram_c error\n");
1010 err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_I,
1012 if (err == MSG_ERROR) {
1014 device_printf(sc->dev, "set voltage sdram_i error\n");
1017 err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_P,
1019 if (err == MSG_ERROR) {
1021 device_printf(sc->dev, "set voltage sdram_p error\n");
1025 DELAY(TRANSITION_LATENCY);
1031 sysctl_bcm2835_cpufreq_temperature(SYSCTL_HANDLER_ARGS)
1033 struct bcm2835_cpufreq_softc *sc = arg1;
1037 /* get realtime value */
1039 val = bcm2835_cpufreq_get_temperature(sc);
1041 if (val == MSG_ERROR)
1044 err = sysctl_handle_int(oidp, &val, 0, req);
1045 if (err || !req->newptr) /* error || read request */
1053 sysctl_bcm2835_devcpu_temperature(SYSCTL_HANDLER_ARGS)
1055 struct bcm2835_cpufreq_softc *sc = arg1;
1059 /* get realtime value */
1061 val = bcm2835_cpufreq_get_temperature(sc);
1063 if (val == MSG_ERROR)
1066 /* 1/1000 celsius (raw) to 1/10 kelvin */
1067 val = val / 100 + TZ_ZEROC;
1069 err = sysctl_handle_int(oidp, &val, 0, req);
1070 if (err || !req->newptr) /* error || read request */
1079 bcm2835_cpufreq_init(void *arg)
1081 struct bcm2835_cpufreq_softc *sc = arg;
1082 struct sysctl_ctx_list *ctx;
1084 int arm_freq, core_freq, sdram_freq;
1085 int arm_max_freq, arm_min_freq, core_max_freq, core_min_freq;
1086 int sdram_max_freq, sdram_min_freq;
1087 int voltage_core, voltage_sdram_c, voltage_sdram_i, voltage_sdram_p;
1088 int max_voltage_core, min_voltage_core;
1089 int max_voltage_sdram_c, min_voltage_sdram_c;
1090 int max_voltage_sdram_i, min_voltage_sdram_i;
1091 int max_voltage_sdram_p, min_voltage_sdram_p;
1092 int turbo, temperature;
1097 arm_freq = bcm2835_cpufreq_get_clock_rate(sc,
1098 BCM2835_MBOX_CLOCK_ID_ARM);
1099 core_freq = bcm2835_cpufreq_get_clock_rate(sc,
1100 BCM2835_MBOX_CLOCK_ID_CORE);
1101 sdram_freq = bcm2835_cpufreq_get_clock_rate(sc,
1102 BCM2835_MBOX_CLOCK_ID_SDRAM);
1105 arm_max_freq = bcm2835_cpufreq_get_max_clock_rate(sc,
1106 BCM2835_MBOX_CLOCK_ID_ARM);
1107 arm_min_freq = bcm2835_cpufreq_get_min_clock_rate(sc,
1108 BCM2835_MBOX_CLOCK_ID_ARM);
1109 core_max_freq = bcm2835_cpufreq_get_max_clock_rate(sc,
1110 BCM2835_MBOX_CLOCK_ID_CORE);
1111 core_min_freq = bcm2835_cpufreq_get_min_clock_rate(sc,
1112 BCM2835_MBOX_CLOCK_ID_CORE);
1113 sdram_max_freq = bcm2835_cpufreq_get_max_clock_rate(sc,
1114 BCM2835_MBOX_CLOCK_ID_SDRAM);
1115 sdram_min_freq = bcm2835_cpufreq_get_min_clock_rate(sc,
1116 BCM2835_MBOX_CLOCK_ID_SDRAM);
1119 turbo = bcm2835_cpufreq_get_turbo(sc);
1121 sc->turbo_mode = BCM2835_MBOX_TURBO_ON;
1123 sc->turbo_mode = BCM2835_MBOX_TURBO_OFF;
1126 voltage_core = bcm2835_cpufreq_get_voltage(sc,
1127 BCM2835_MBOX_VOLTAGE_ID_CORE);
1128 voltage_sdram_c = bcm2835_cpufreq_get_voltage(sc,
1129 BCM2835_MBOX_VOLTAGE_ID_SDRAM_C);
1130 voltage_sdram_i = bcm2835_cpufreq_get_voltage(sc,
1131 BCM2835_MBOX_VOLTAGE_ID_SDRAM_I);
1132 voltage_sdram_p = bcm2835_cpufreq_get_voltage(sc,
1133 BCM2835_MBOX_VOLTAGE_ID_SDRAM_P);
1135 /* current values (offset from 1.2V) */
1136 sc->voltage_core = voltage_core;
1137 sc->voltage_sdram = voltage_sdram_c;
1138 sc->voltage_sdram_c = voltage_sdram_c;
1139 sc->voltage_sdram_i = voltage_sdram_i;
1140 sc->voltage_sdram_p = voltage_sdram_p;
1142 /* max/min voltage */
1143 max_voltage_core = bcm2835_cpufreq_get_max_voltage(sc,
1144 BCM2835_MBOX_VOLTAGE_ID_CORE);
1145 min_voltage_core = bcm2835_cpufreq_get_min_voltage(sc,
1146 BCM2835_MBOX_VOLTAGE_ID_CORE);
1147 max_voltage_sdram_c = bcm2835_cpufreq_get_max_voltage(sc,
1148 BCM2835_MBOX_VOLTAGE_ID_SDRAM_C);
1149 max_voltage_sdram_i = bcm2835_cpufreq_get_max_voltage(sc,
1150 BCM2835_MBOX_VOLTAGE_ID_SDRAM_I);
1151 max_voltage_sdram_p = bcm2835_cpufreq_get_max_voltage(sc,
1152 BCM2835_MBOX_VOLTAGE_ID_SDRAM_P);
1153 min_voltage_sdram_c = bcm2835_cpufreq_get_min_voltage(sc,
1154 BCM2835_MBOX_VOLTAGE_ID_SDRAM_C);
1155 min_voltage_sdram_i = bcm2835_cpufreq_get_min_voltage(sc,
1156 BCM2835_MBOX_VOLTAGE_ID_SDRAM_I);
1157 min_voltage_sdram_p = bcm2835_cpufreq_get_min_voltage(sc,
1158 BCM2835_MBOX_VOLTAGE_ID_SDRAM_P);
1161 temperature = bcm2835_cpufreq_get_temperature(sc);
1164 if (cpufreq_verbose || bootverbose) {
1165 device_printf(sc->dev, "Boot settings:\n");
1166 device_printf(sc->dev,
1167 "current ARM %dMHz, Core %dMHz, SDRAM %dMHz, Turbo %s\n",
1168 HZ2MHZ(arm_freq), HZ2MHZ(core_freq), HZ2MHZ(sdram_freq),
1169 (sc->turbo_mode == BCM2835_MBOX_TURBO_ON) ? "ON" : "OFF");
1171 device_printf(sc->dev,
1172 "max/min ARM %d/%dMHz, Core %d/%dMHz, SDRAM %d/%dMHz\n",
1173 HZ2MHZ(arm_max_freq), HZ2MHZ(arm_min_freq),
1174 HZ2MHZ(core_max_freq), HZ2MHZ(core_min_freq),
1175 HZ2MHZ(sdram_max_freq), HZ2MHZ(sdram_min_freq));
1177 device_printf(sc->dev,
1178 "current Core %dmV, SDRAM_C %dmV, SDRAM_I %dmV, "
1180 OFFSET2MVOLT(voltage_core), OFFSET2MVOLT(voltage_sdram_c),
1181 OFFSET2MVOLT(voltage_sdram_i),
1182 OFFSET2MVOLT(voltage_sdram_p));
1184 device_printf(sc->dev,
1185 "max/min Core %d/%dmV, SDRAM_C %d/%dmV, SDRAM_I %d/%dmV, "
1186 "SDRAM_P %d/%dmV\n",
1187 OFFSET2MVOLT(max_voltage_core),
1188 OFFSET2MVOLT(min_voltage_core),
1189 OFFSET2MVOLT(max_voltage_sdram_c),
1190 OFFSET2MVOLT(min_voltage_sdram_c),
1191 OFFSET2MVOLT(max_voltage_sdram_i),
1192 OFFSET2MVOLT(min_voltage_sdram_i),
1193 OFFSET2MVOLT(max_voltage_sdram_p),
1194 OFFSET2MVOLT(min_voltage_sdram_p));
1196 device_printf(sc->dev,
1197 "Temperature %d.%dC\n", (temperature / 1000),
1198 (temperature % 1000) / 100);
1199 } else { /* !cpufreq_verbose && !bootverbose */
1200 device_printf(sc->dev,
1201 "ARM %dMHz, Core %dMHz, SDRAM %dMHz, Turbo %s\n",
1202 HZ2MHZ(arm_freq), HZ2MHZ(core_freq), HZ2MHZ(sdram_freq),
1203 (sc->turbo_mode == BCM2835_MBOX_TURBO_ON) ? "ON" : "OFF");
1206 /* keep in softc (MHz/mV) */
1207 sc->arm_max_freq = HZ2MHZ(arm_max_freq);
1208 sc->arm_min_freq = HZ2MHZ(arm_min_freq);
1209 sc->core_max_freq = HZ2MHZ(core_max_freq);
1210 sc->core_min_freq = HZ2MHZ(core_min_freq);
1211 sc->sdram_max_freq = HZ2MHZ(sdram_max_freq);
1212 sc->sdram_min_freq = HZ2MHZ(sdram_min_freq);
1213 sc->max_voltage_core = OFFSET2MVOLT(max_voltage_core);
1214 sc->min_voltage_core = OFFSET2MVOLT(min_voltage_core);
1216 /* if turbo is on, set to max values */
1217 if (sc->turbo_mode == BCM2835_MBOX_TURBO_ON) {
1218 bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM,
1220 DELAY(TRANSITION_LATENCY);
1221 bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE,
1223 DELAY(TRANSITION_LATENCY);
1224 bcm2835_cpufreq_set_clock_rate(sc,
1225 BCM2835_MBOX_CLOCK_ID_SDRAM, sdram_max_freq);
1226 DELAY(TRANSITION_LATENCY);
1228 bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM,
1230 DELAY(TRANSITION_LATENCY);
1231 bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE,
1233 DELAY(TRANSITION_LATENCY);
1234 bcm2835_cpufreq_set_clock_rate(sc,
1235 BCM2835_MBOX_CLOCK_ID_SDRAM, sdram_min_freq);
1236 DELAY(TRANSITION_LATENCY);
1241 /* add human readable temperature to dev.cpu node */
1242 cpu = device_get_parent(sc->dev);
1244 ctx = device_get_sysctl_ctx(cpu);
1245 SYSCTL_ADD_PROC(ctx,
1246 SYSCTL_CHILDREN(device_get_sysctl_tree(cpu)), OID_AUTO,
1247 "temperature", CTLTYPE_INT | CTLFLAG_RD, sc, 0,
1248 sysctl_bcm2835_devcpu_temperature, "IK",
1249 "Current SoC temperature");
1252 /* release this hook (continue boot) */
1253 config_intrhook_disestablish(&sc->init_hook);
1257 bcm2835_cpufreq_identify(driver_t *driver, device_t parent)
1259 const struct ofw_compat_data *compat;
1262 root = OF_finddevice("/");
1263 for (compat = compat_data; compat->ocd_str != NULL; compat++)
1264 if (ofw_bus_node_is_compatible(root, compat->ocd_str))
1267 if (compat->ocd_data == 0)
1270 DPRINTF("driver=%p, parent=%p\n", driver, parent);
1271 if (device_find_child(parent, "bcm2835_cpufreq", -1) != NULL)
1273 if (BUS_ADD_CHILD(parent, 0, "bcm2835_cpufreq", -1) == NULL)
1274 device_printf(parent, "add child failed\n");
1278 bcm2835_cpufreq_probe(device_t dev)
1281 if (device_get_unit(dev) != 0)
1283 device_set_desc(dev, "CPU Frequency Control");
1289 bcm2835_cpufreq_attach(device_t dev)
1291 struct bcm2835_cpufreq_softc *sc;
1292 struct sysctl_oid *oid;
1295 sc = device_get_softc(dev);
1298 /* initial values */
1299 sc->arm_max_freq = -1;
1300 sc->arm_min_freq = -1;
1301 sc->core_max_freq = -1;
1302 sc->core_min_freq = -1;
1303 sc->sdram_max_freq = -1;
1304 sc->sdram_min_freq = -1;
1305 sc->max_voltage_core = 0;
1306 sc->min_voltage_core = 0;
1308 /* setup sysctl at first device */
1309 if (device_get_unit(dev) == 0) {
1310 sysctl_ctx_init(&bcm2835_sysctl_ctx);
1311 /* create node for hw.cpufreq */
1312 oid = SYSCTL_ADD_NODE(&bcm2835_sysctl_ctx,
1313 SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO, "cpufreq",
1314 CTLFLAG_RD, NULL, "");
1316 /* Frequency (Hz) */
1317 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1318 OID_AUTO, "arm_freq", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
1319 sysctl_bcm2835_cpufreq_arm_freq, "IU",
1320 "ARM frequency (Hz)");
1321 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1322 OID_AUTO, "core_freq", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
1323 sysctl_bcm2835_cpufreq_core_freq, "IU",
1324 "Core frequency (Hz)");
1325 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1326 OID_AUTO, "sdram_freq", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
1327 sysctl_bcm2835_cpufreq_sdram_freq, "IU",
1328 "SDRAM frequency (Hz)");
1331 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1332 OID_AUTO, "turbo", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
1333 sysctl_bcm2835_cpufreq_turbo, "IU",
1334 "Disables dynamic clocking");
1336 /* Voltage (offset from 1.2V in units of 0.025V) */
1337 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1338 OID_AUTO, "voltage_core", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
1339 sysctl_bcm2835_cpufreq_voltage_core, "I",
1340 "ARM/GPU core voltage"
1341 "(offset from 1.2V in units of 0.025V)");
1342 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1343 OID_AUTO, "voltage_sdram", CTLTYPE_INT | CTLFLAG_WR, sc,
1344 0, sysctl_bcm2835_cpufreq_voltage_sdram, "I",
1345 "SDRAM voltage (offset from 1.2V in units of 0.025V)");
1347 /* Voltage individual SDRAM */
1348 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1349 OID_AUTO, "voltage_sdram_c", CTLTYPE_INT | CTLFLAG_RW, sc,
1350 0, sysctl_bcm2835_cpufreq_voltage_sdram_c, "I",
1351 "SDRAM controller voltage"
1352 "(offset from 1.2V in units of 0.025V)");
1353 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1354 OID_AUTO, "voltage_sdram_i", CTLTYPE_INT | CTLFLAG_RW, sc,
1355 0, sysctl_bcm2835_cpufreq_voltage_sdram_i, "I",
1356 "SDRAM I/O voltage (offset from 1.2V in units of 0.025V)");
1357 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1358 OID_AUTO, "voltage_sdram_p", CTLTYPE_INT | CTLFLAG_RW, sc,
1359 0, sysctl_bcm2835_cpufreq_voltage_sdram_p, "I",
1360 "SDRAM phy voltage (offset from 1.2V in units of 0.025V)");
1363 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1364 OID_AUTO, "temperature", CTLTYPE_INT | CTLFLAG_RD, sc, 0,
1365 sysctl_bcm2835_cpufreq_temperature, "I",
1366 "SoC temperature (thousandths of a degree C)");
1370 sema_init(&vc_sema, 1, "vcsema");
1372 /* register callback for using mbox when interrupts are enabled */
1373 sc->init_hook.ich_func = bcm2835_cpufreq_init;
1374 sc->init_hook.ich_arg = sc;
1376 if (config_intrhook_establish(&sc->init_hook) != 0) {
1377 device_printf(dev, "config_intrhook_establish failed\n");
1381 /* this device is controlled by cpufreq(4) */
1382 cpufreq_register(dev);
1388 bcm2835_cpufreq_detach(device_t dev)
1391 sema_destroy(&vc_sema);
1393 return (cpufreq_unregister(dev));
1397 bcm2835_cpufreq_set(device_t dev, const struct cf_setting *cf)
1399 struct bcm2835_cpufreq_softc *sc;
1400 uint32_t rate_hz, rem;
1401 int resp_freq, arm_freq, min_freq, core_freq;
1406 if (cf == NULL || cf->freq < 0)
1409 sc = device_get_softc(dev);
1411 /* setting clock (Hz) */
1412 rate_hz = (uint32_t)MHZ2HZ(cf->freq);
1413 rem = rate_hz % HZSTEP;
1418 /* adjust min freq */
1419 min_freq = sc->arm_min_freq;
1420 if (sc->turbo_mode != BCM2835_MBOX_TURBO_ON)
1421 if (min_freq > cpufreq_lowest_freq)
1422 min_freq = cpufreq_lowest_freq;
1424 if (rate_hz < MHZ2HZ(min_freq) || rate_hz > MHZ2HZ(sc->arm_max_freq))
1427 /* set new value and verify it */
1430 cur_freq = bcm2835_cpufreq_get_clock_rate(sc,
1431 BCM2835_MBOX_CLOCK_ID_ARM);
1433 resp_freq = bcm2835_cpufreq_set_clock_rate(sc,
1434 BCM2835_MBOX_CLOCK_ID_ARM, rate_hz);
1435 DELAY(TRANSITION_LATENCY);
1436 arm_freq = bcm2835_cpufreq_get_clock_rate(sc,
1437 BCM2835_MBOX_CLOCK_ID_ARM);
1440 * if non-turbo and lower than or equal min_freq,
1441 * clock down core and sdram to default first.
1443 if (sc->turbo_mode != BCM2835_MBOX_TURBO_ON) {
1444 core_freq = bcm2835_cpufreq_get_clock_rate(sc,
1445 BCM2835_MBOX_CLOCK_ID_CORE);
1446 if (rate_hz > MHZ2HZ(sc->arm_min_freq)) {
1447 bcm2835_cpufreq_set_clock_rate(sc,
1448 BCM2835_MBOX_CLOCK_ID_CORE,
1449 MHZ2HZ(sc->core_max_freq));
1450 DELAY(TRANSITION_LATENCY);
1451 bcm2835_cpufreq_set_clock_rate(sc,
1452 BCM2835_MBOX_CLOCK_ID_SDRAM,
1453 MHZ2HZ(sc->sdram_max_freq));
1454 DELAY(TRANSITION_LATENCY);
1456 if (sc->core_min_freq < DEFAULT_CORE_FREQUENCY &&
1457 core_freq > DEFAULT_CORE_FREQUENCY) {
1458 /* first, down to 250, then down to min */
1459 DELAY(TRANSITION_LATENCY);
1460 bcm2835_cpufreq_set_clock_rate(sc,
1461 BCM2835_MBOX_CLOCK_ID_CORE,
1462 MHZ2HZ(DEFAULT_CORE_FREQUENCY));
1463 DELAY(TRANSITION_LATENCY);
1464 /* reset core voltage */
1465 bcm2835_cpufreq_set_voltage(sc,
1466 BCM2835_MBOX_VOLTAGE_ID_CORE, 0);
1467 DELAY(TRANSITION_LATENCY);
1469 bcm2835_cpufreq_set_clock_rate(sc,
1470 BCM2835_MBOX_CLOCK_ID_CORE,
1471 MHZ2HZ(sc->core_min_freq));
1472 DELAY(TRANSITION_LATENCY);
1473 bcm2835_cpufreq_set_clock_rate(sc,
1474 BCM2835_MBOX_CLOCK_ID_SDRAM,
1475 MHZ2HZ(sc->sdram_min_freq));
1476 DELAY(TRANSITION_LATENCY);
1482 if (resp_freq < 0 || arm_freq < 0 || resp_freq != arm_freq) {
1483 device_printf(dev, "wrong freq\n");
1486 DPRINTF("cpufreq: %d -> %d\n", cur_freq, arm_freq);
1492 bcm2835_cpufreq_get(device_t dev, struct cf_setting *cf)
1494 struct bcm2835_cpufreq_softc *sc;
1500 sc = device_get_softc(dev);
1501 memset(cf, CPUFREQ_VAL_UNKNOWN, sizeof(*cf));
1504 /* get cuurent value */
1506 arm_freq = bcm2835_cpufreq_get_clock_rate(sc,
1507 BCM2835_MBOX_CLOCK_ID_ARM);
1510 device_printf(dev, "can't get clock\n");
1514 /* CPU clock in MHz or 100ths of a percent. */
1515 cf->freq = HZ2MHZ(arm_freq);
1516 /* Voltage in mV. */
1517 cf->volts = CPUFREQ_VAL_UNKNOWN;
1518 /* Power consumed in mW. */
1519 cf->power = CPUFREQ_VAL_UNKNOWN;
1520 /* Transition latency in us. */
1521 cf->lat = TRANSITION_LATENCY;
1522 /* Driver providing this setting. */
1529 bcm2835_cpufreq_make_freq_list(device_t dev, struct cf_setting *sets,
1532 struct bcm2835_cpufreq_softc *sc;
1533 int freq, min_freq, volts, rem;
1536 sc = device_get_softc(dev);
1537 freq = sc->arm_max_freq;
1538 min_freq = sc->arm_min_freq;
1540 /* adjust head freq to STEP */
1541 rem = freq % MHZSTEP;
1543 if (freq < min_freq)
1546 /* if non-turbo, add extra low freq */
1547 if (sc->turbo_mode != BCM2835_MBOX_TURBO_ON)
1548 if (min_freq > cpufreq_lowest_freq)
1549 min_freq = cpufreq_lowest_freq;
1552 /* from freq to min_freq */
1553 for (idx = 0; idx < *count && freq >= min_freq; idx++) {
1554 if (freq > sc->arm_min_freq)
1555 volts = sc->max_voltage_core;
1557 volts = sc->min_voltage_core;
1558 sets[idx].freq = freq;
1559 sets[idx].volts = volts;
1560 sets[idx].lat = TRANSITION_LATENCY;
1561 sets[idx].dev = dev;
1565 /* XXX RPi2 have only 900/600MHz */
1567 volts = sc->min_voltage_core;
1568 sets[idx].freq = freq;
1569 sets[idx].volts = volts;
1570 sets[idx].lat = TRANSITION_LATENCY;
1571 sets[idx].dev = dev;
1573 if (freq != min_freq) {
1574 sets[idx].freq = min_freq;
1575 sets[idx].volts = volts;
1576 sets[idx].lat = TRANSITION_LATENCY;
1577 sets[idx].dev = dev;
1587 bcm2835_cpufreq_settings(device_t dev, struct cf_setting *sets, int *count)
1589 struct bcm2835_cpufreq_softc *sc;
1591 if (sets == NULL || count == NULL)
1594 sc = device_get_softc(dev);
1595 if (sc->arm_min_freq < 0 || sc->arm_max_freq < 0) {
1596 printf("device is not configured\n");
1600 /* fill data with unknown value */
1601 memset(sets, CPUFREQ_VAL_UNKNOWN, sizeof(*sets) * (*count));
1602 /* create new array up to count */
1603 bcm2835_cpufreq_make_freq_list(dev, sets, count);
1609 bcm2835_cpufreq_type(device_t dev, int *type)
1614 *type = CPUFREQ_TYPE_ABSOLUTE;
1619 static device_method_t bcm2835_cpufreq_methods[] = {
1620 /* Device interface */
1621 DEVMETHOD(device_identify, bcm2835_cpufreq_identify),
1622 DEVMETHOD(device_probe, bcm2835_cpufreq_probe),
1623 DEVMETHOD(device_attach, bcm2835_cpufreq_attach),
1624 DEVMETHOD(device_detach, bcm2835_cpufreq_detach),
1626 /* cpufreq interface */
1627 DEVMETHOD(cpufreq_drv_set, bcm2835_cpufreq_set),
1628 DEVMETHOD(cpufreq_drv_get, bcm2835_cpufreq_get),
1629 DEVMETHOD(cpufreq_drv_settings, bcm2835_cpufreq_settings),
1630 DEVMETHOD(cpufreq_drv_type, bcm2835_cpufreq_type),
1635 static devclass_t bcm2835_cpufreq_devclass;
1636 static driver_t bcm2835_cpufreq_driver = {
1638 bcm2835_cpufreq_methods,
1639 sizeof(struct bcm2835_cpufreq_softc),
1642 DRIVER_MODULE(bcm2835_cpufreq, cpu, bcm2835_cpufreq_driver,
1643 bcm2835_cpufreq_devclass, 0, 0);