2 * Copyright (C) 2013-2015 Daisuke Aoyama <aoyama@peach.ne.jp>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
32 #include <sys/systm.h>
35 #include <sys/kernel.h>
37 #include <sys/malloc.h>
38 #include <sys/module.h>
39 #include <sys/mutex.h>
41 #include <sys/sysctl.h>
43 #include <machine/bus.h>
44 #include <machine/cpu.h>
45 #include <machine/intr.h>
47 #include <dev/ofw/ofw_bus.h>
48 #include <dev/ofw/ofw_bus_subr.h>
50 #include <arm/broadcom/bcm2835/bcm2835_mbox.h>
51 #include <arm/broadcom/bcm2835/bcm2835_mbox_prop.h>
52 #include <arm/broadcom/bcm2835/bcm2835_vcbus.h>
54 #include "cpufreq_if.h"
58 #define DPRINTF(fmt, ...) do { \
59 printf("%s:%u: ", __func__, __LINE__); \
60 printf(fmt, ##__VA_ARGS__); \
63 #define DPRINTF(fmt, ...)
66 #define HZ2MHZ(freq) ((freq) / (1000 * 1000))
67 #define MHZ2HZ(freq) ((freq) * (1000 * 1000))
70 #define OFFSET2MVOLT(val) (1200 + ((val) * 25))
71 #define MVOLT2OFFSET(val) (((val) - 1200) / 25)
72 #define DEFAULT_ARM_FREQUENCY 700
73 #define DEFAULT_LOWEST_FREQ 300
75 #define OFFSET2MVOLT(val) (((val) / 1000))
76 #define MVOLT2OFFSET(val) (((val) * 1000))
77 #define DEFAULT_ARM_FREQUENCY 600
78 #define DEFAULT_LOWEST_FREQ 600
80 #define DEFAULT_CORE_FREQUENCY 250
81 #define DEFAULT_SDRAM_FREQUENCY 400
82 #define TRANSITION_LATENCY 1000
83 #define MIN_OVER_VOLTAGE -16
84 #define MAX_OVER_VOLTAGE 6
85 #define MSG_ERROR -999999999
87 #define HZSTEP (MHZ2HZ(MHZSTEP))
90 #define VC_LOCK(sc) do { \
91 sema_wait(&vc_sema); \
93 #define VC_UNLOCK(sc) do { \
94 sema_post(&vc_sema); \
97 /* ARM->VC mailbox property semaphore */
98 static struct sema vc_sema;
100 static struct sysctl_ctx_list bcm2835_sysctl_ctx;
102 struct bcm2835_cpufreq_softc {
110 int max_voltage_core;
111 int min_voltage_core;
113 /* the values written in mbox */
121 /* initial hook for waiting mbox intr */
122 struct intr_config_hook init_hook;
125 static struct ofw_compat_data compat_data[] = {
126 { "broadcom,bcm2835-vc", 1 },
127 { "broadcom,bcm2708-vc", 1 },
128 { "brcm,bcm2709", 1 },
129 { "brcm,bcm2836", 1 },
133 static int cpufreq_verbose = 0;
134 TUNABLE_INT("hw.bcm2835.cpufreq.verbose", &cpufreq_verbose);
135 static int cpufreq_lowest_freq = DEFAULT_LOWEST_FREQ;
136 TUNABLE_INT("hw.bcm2835.cpufreq.lowest_freq", &cpufreq_lowest_freq);
140 bcm2835_dump(const void *data, int len)
142 const uint8_t *p = (const uint8_t*)data;
145 printf("dump @ %p:\n", data);
146 for (i = 0; i < len; i++) {
147 printf("%2.2x ", p[i]);
158 bcm2835_cpufreq_get_clock_rate(struct bcm2835_cpufreq_softc *sc,
161 struct msg_get_clock_rate msg;
179 /* setup single tag buffer */
180 memset(&msg, 0, sizeof(msg));
181 msg.hdr.buf_size = sizeof(msg);
182 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
183 msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_CLOCK_RATE;
184 msg.tag_hdr.val_buf_size = sizeof(msg.body);
185 msg.tag_hdr.val_len = sizeof(msg.body.req);
186 msg.body.req.clock_id = clock_id;
189 /* call mailbox property */
190 err = bcm2835_mbox_property(&msg, sizeof(msg));
192 device_printf(sc->dev, "can't get clock rate (id=%u)\n",
198 rate = (int)msg.body.resp.rate_hz;
199 DPRINTF("clock = %d(Hz)\n", rate);
204 bcm2835_cpufreq_get_max_clock_rate(struct bcm2835_cpufreq_softc *sc,
207 struct msg_get_max_clock_rate msg;
225 /* setup single tag buffer */
226 memset(&msg, 0, sizeof(msg));
227 msg.hdr.buf_size = sizeof(msg);
228 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
229 msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MAX_CLOCK_RATE;
230 msg.tag_hdr.val_buf_size = sizeof(msg.body);
231 msg.tag_hdr.val_len = sizeof(msg.body.req);
232 msg.body.req.clock_id = clock_id;
235 /* call mailbox property */
236 err = bcm2835_mbox_property(&msg, sizeof(msg));
238 device_printf(sc->dev, "can't get max clock rate (id=%u)\n",
244 rate = (int)msg.body.resp.rate_hz;
245 DPRINTF("clock = %d(Hz)\n", rate);
250 bcm2835_cpufreq_get_min_clock_rate(struct bcm2835_cpufreq_softc *sc,
253 struct msg_get_min_clock_rate msg;
271 /* setup single tag buffer */
272 memset(&msg, 0, sizeof(msg));
273 msg.hdr.buf_size = sizeof(msg);
274 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
275 msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MIN_CLOCK_RATE;
276 msg.tag_hdr.val_buf_size = sizeof(msg.body);
277 msg.tag_hdr.val_len = sizeof(msg.body.req);
278 msg.body.req.clock_id = clock_id;
281 /* call mailbox property */
282 err = bcm2835_mbox_property(&msg, sizeof(msg));
284 device_printf(sc->dev, "can't get min clock rate (id=%u)\n",
290 rate = (int)msg.body.resp.rate_hz;
291 DPRINTF("clock = %d(Hz)\n", rate);
296 bcm2835_cpufreq_set_clock_rate(struct bcm2835_cpufreq_softc *sc,
297 uint32_t clock_id, uint32_t rate_hz)
299 struct msg_set_clock_rate msg;
318 /* setup single tag buffer */
319 memset(&msg, 0, sizeof(msg));
320 msg.hdr.buf_size = sizeof(msg);
321 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
322 msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_CLOCK_RATE;
323 msg.tag_hdr.val_buf_size = sizeof(msg.body);
324 msg.tag_hdr.val_len = sizeof(msg.body.req);
325 msg.body.req.clock_id = clock_id;
326 msg.body.req.rate_hz = rate_hz;
329 /* call mailbox property */
330 err = bcm2835_mbox_property(&msg, sizeof(msg));
332 device_printf(sc->dev, "can't set clock rate (id=%u)\n",
337 /* workaround for core clock */
338 if (clock_id == BCM2835_MBOX_CLOCK_ID_CORE) {
339 /* for safety (may change voltage without changing clock) */
340 DELAY(TRANSITION_LATENCY);
343 * XXX: the core clock is unable to change at once,
344 * to change certainly, write it twice now.
347 /* setup single tag buffer */
348 memset(&msg, 0, sizeof(msg));
349 msg.hdr.buf_size = sizeof(msg);
350 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
351 msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_CLOCK_RATE;
352 msg.tag_hdr.val_buf_size = sizeof(msg.body);
353 msg.tag_hdr.val_len = sizeof(msg.body.req);
354 msg.body.req.clock_id = clock_id;
355 msg.body.req.rate_hz = rate_hz;
358 /* call mailbox property */
359 err = bcm2835_mbox_property(&msg, sizeof(msg));
361 device_printf(sc->dev,
362 "can't set clock rate (id=%u)\n", clock_id);
368 rate = (int)msg.body.resp.rate_hz;
369 DPRINTF("clock = %d(Hz)\n", rate);
374 bcm2835_cpufreq_get_turbo(struct bcm2835_cpufreq_softc *sc)
376 struct msg_get_turbo msg;
394 /* setup single tag buffer */
395 memset(&msg, 0, sizeof(msg));
396 msg.hdr.buf_size = sizeof(msg);
397 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
398 msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_TURBO;
399 msg.tag_hdr.val_buf_size = sizeof(msg.body);
400 msg.tag_hdr.val_len = sizeof(msg.body.req);
404 /* call mailbox property */
405 err = bcm2835_mbox_property(&msg, sizeof(msg));
407 device_printf(sc->dev, "can't get turbo\n");
411 /* result 0=non-turbo, 1=turbo */
412 level = (int)msg.body.resp.level;
413 DPRINTF("level = %d\n", level);
418 bcm2835_cpufreq_set_turbo(struct bcm2835_cpufreq_softc *sc, uint32_t level)
420 struct msg_set_turbo msg;
439 /* replace unknown value to OFF */
440 if (level != BCM2835_MBOX_TURBO_ON && level != BCM2835_MBOX_TURBO_OFF)
441 level = BCM2835_MBOX_TURBO_OFF;
443 /* setup single tag buffer */
444 memset(&msg, 0, sizeof(msg));
445 msg.hdr.buf_size = sizeof(msg);
446 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
447 msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_TURBO;
448 msg.tag_hdr.val_buf_size = sizeof(msg.body);
449 msg.tag_hdr.val_len = sizeof(msg.body.req);
451 msg.body.req.level = level;
454 /* call mailbox property */
455 err = bcm2835_mbox_property(&msg, sizeof(msg));
457 device_printf(sc->dev, "can't set turbo\n");
461 /* result 0=non-turbo, 1=turbo */
462 value = (int)msg.body.resp.level;
463 DPRINTF("level = %d\n", value);
468 bcm2835_cpufreq_get_voltage(struct bcm2835_cpufreq_softc *sc,
471 struct msg_get_voltage msg;
486 * u32: value (offset from 1.2V in units of 0.025V)
489 /* setup single tag buffer */
490 memset(&msg, 0, sizeof(msg));
491 msg.hdr.buf_size = sizeof(msg);
492 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
493 msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_VOLTAGE;
494 msg.tag_hdr.val_buf_size = sizeof(msg.body);
495 msg.tag_hdr.val_len = sizeof(msg.body.req);
496 msg.body.req.voltage_id = voltage_id;
499 /* call mailbox property */
500 err = bcm2835_mbox_property(&msg, sizeof(msg));
502 device_printf(sc->dev, "can't get voltage\n");
506 /* result (offset from 1.2V) */
507 value = (int)msg.body.resp.value;
508 DPRINTF("value = %d\n", value);
513 bcm2835_cpufreq_get_max_voltage(struct bcm2835_cpufreq_softc *sc,
516 struct msg_get_max_voltage msg;
531 * u32: value (offset from 1.2V in units of 0.025V)
534 /* setup single tag buffer */
535 memset(&msg, 0, sizeof(msg));
536 msg.hdr.buf_size = sizeof(msg);
537 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
538 msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MAX_VOLTAGE;
539 msg.tag_hdr.val_buf_size = sizeof(msg.body);
540 msg.tag_hdr.val_len = sizeof(msg.body.req);
541 msg.body.req.voltage_id = voltage_id;
544 /* call mailbox property */
545 err = bcm2835_mbox_property(&msg, sizeof(msg));
547 device_printf(sc->dev, "can't get max voltage\n");
551 /* result (offset from 1.2V) */
552 value = (int)msg.body.resp.value;
553 DPRINTF("value = %d\n", value);
557 bcm2835_cpufreq_get_min_voltage(struct bcm2835_cpufreq_softc *sc,
560 struct msg_get_min_voltage msg;
575 * u32: value (offset from 1.2V in units of 0.025V)
578 /* setup single tag buffer */
579 memset(&msg, 0, sizeof(msg));
580 msg.hdr.buf_size = sizeof(msg);
581 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
582 msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MIN_VOLTAGE;
583 msg.tag_hdr.val_buf_size = sizeof(msg.body);
584 msg.tag_hdr.val_len = sizeof(msg.body.req);
585 msg.body.req.voltage_id = voltage_id;
588 /* call mailbox property */
589 err = bcm2835_mbox_property(&msg, sizeof(msg));
591 device_printf(sc->dev, "can't get min voltage\n");
595 /* result (offset from 1.2V) */
596 value = (int)msg.body.resp.value;
597 DPRINTF("value = %d\n", value);
602 bcm2835_cpufreq_set_voltage(struct bcm2835_cpufreq_softc *sc,
603 uint32_t voltage_id, int32_t value)
605 struct msg_set_voltage msg;
615 * u32: value (offset from 1.2V in units of 0.025V)
620 * u32: value (offset from 1.2V in units of 0.025V)
625 * 0 (1.2 V). Values above 6 are only allowed when force_turbo or
626 * current_limit_override are specified (which set the warranty bit).
628 if (value > MAX_OVER_VOLTAGE || value < MIN_OVER_VOLTAGE) {
629 /* currently not supported */
630 device_printf(sc->dev, "not supported voltage: %d\n", value);
634 /* setup single tag buffer */
635 memset(&msg, 0, sizeof(msg));
636 msg.hdr.buf_size = sizeof(msg);
637 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
638 msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_VOLTAGE;
639 msg.tag_hdr.val_buf_size = sizeof(msg.body);
640 msg.tag_hdr.val_len = sizeof(msg.body.req);
641 msg.body.req.voltage_id = voltage_id;
642 msg.body.req.value = (uint32_t)value;
645 /* call mailbox property */
646 err = bcm2835_mbox_property(&msg, sizeof(msg));
648 device_printf(sc->dev, "can't set voltage\n");
652 /* result (offset from 1.2V) */
653 value = (int)msg.body.resp.value;
654 DPRINTF("value = %d\n", value);
659 bcm2835_cpufreq_get_temperature(struct bcm2835_cpufreq_softc *sc)
661 struct msg_get_temperature msg;
671 * u32: temperature id
675 * u32: temperature id
679 /* setup single tag buffer */
680 memset(&msg, 0, sizeof(msg));
681 msg.hdr.buf_size = sizeof(msg);
682 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
683 msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_TEMPERATURE;
684 msg.tag_hdr.val_buf_size = sizeof(msg.body);
685 msg.tag_hdr.val_len = sizeof(msg.body.req);
686 msg.body.req.temperature_id = 0;
689 /* call mailbox property */
690 err = bcm2835_mbox_property(&msg, sizeof(msg));
692 device_printf(sc->dev, "can't get temperature\n");
696 /* result (temperature of degree C) */
697 value = (int)msg.body.resp.value;
698 DPRINTF("value = %d\n", value);
705 sysctl_bcm2835_cpufreq_arm_freq(SYSCTL_HANDLER_ARGS)
707 struct bcm2835_cpufreq_softc *sc = arg1;
711 /* get realtime value */
713 val = bcm2835_cpufreq_get_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM);
715 if (val == MSG_ERROR)
718 err = sysctl_handle_int(oidp, &val, 0, req);
719 if (err || !req->newptr) /* error || read request */
724 err = bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM,
727 if (err == MSG_ERROR) {
728 device_printf(sc->dev, "set clock arm_freq error\n");
731 DELAY(TRANSITION_LATENCY);
737 sysctl_bcm2835_cpufreq_core_freq(SYSCTL_HANDLER_ARGS)
739 struct bcm2835_cpufreq_softc *sc = arg1;
743 /* get realtime value */
745 val = bcm2835_cpufreq_get_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE);
747 if (val == MSG_ERROR)
750 err = sysctl_handle_int(oidp, &val, 0, req);
751 if (err || !req->newptr) /* error || read request */
756 err = bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE,
758 if (err == MSG_ERROR) {
760 device_printf(sc->dev, "set clock core_freq error\n");
764 DELAY(TRANSITION_LATENCY);
770 sysctl_bcm2835_cpufreq_sdram_freq(SYSCTL_HANDLER_ARGS)
772 struct bcm2835_cpufreq_softc *sc = arg1;
776 /* get realtime value */
778 val = bcm2835_cpufreq_get_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_SDRAM);
780 if (val == MSG_ERROR)
783 err = sysctl_handle_int(oidp, &val, 0, req);
784 if (err || !req->newptr) /* error || read request */
789 err = bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_SDRAM,
792 if (err == MSG_ERROR) {
793 device_printf(sc->dev, "set clock sdram_freq error\n");
796 DELAY(TRANSITION_LATENCY);
802 sysctl_bcm2835_cpufreq_turbo(SYSCTL_HANDLER_ARGS)
804 struct bcm2835_cpufreq_softc *sc = arg1;
808 /* get realtime value */
810 val = bcm2835_cpufreq_get_turbo(sc);
812 if (val == MSG_ERROR)
815 err = sysctl_handle_int(oidp, &val, 0, req);
816 if (err || !req->newptr) /* error || read request */
821 sc->turbo_mode = BCM2835_MBOX_TURBO_ON;
823 sc->turbo_mode = BCM2835_MBOX_TURBO_OFF;
826 err = bcm2835_cpufreq_set_turbo(sc, sc->turbo_mode);
828 if (err == MSG_ERROR) {
829 device_printf(sc->dev, "set turbo error\n");
832 DELAY(TRANSITION_LATENCY);
838 sysctl_bcm2835_cpufreq_voltage_core(SYSCTL_HANDLER_ARGS)
840 struct bcm2835_cpufreq_softc *sc = arg1;
844 /* get realtime value */
846 val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_CORE);
848 if (val == MSG_ERROR)
851 err = sysctl_handle_int(oidp, &val, 0, req);
852 if (err || !req->newptr) /* error || read request */
856 if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
858 sc->voltage_core = val;
861 err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_CORE,
864 if (err == MSG_ERROR) {
865 device_printf(sc->dev, "set voltage core error\n");
868 DELAY(TRANSITION_LATENCY);
874 sysctl_bcm2835_cpufreq_voltage_sdram_c(SYSCTL_HANDLER_ARGS)
876 struct bcm2835_cpufreq_softc *sc = arg1;
880 /* get realtime value */
882 val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_C);
884 if (val == MSG_ERROR)
887 err = sysctl_handle_int(oidp, &val, 0, req);
888 if (err || !req->newptr) /* error || read request */
892 if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
894 sc->voltage_sdram_c = val;
897 err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_C,
898 sc->voltage_sdram_c);
900 if (err == MSG_ERROR) {
901 device_printf(sc->dev, "set voltage sdram_c error\n");
904 DELAY(TRANSITION_LATENCY);
910 sysctl_bcm2835_cpufreq_voltage_sdram_i(SYSCTL_HANDLER_ARGS)
912 struct bcm2835_cpufreq_softc *sc = arg1;
916 /* get realtime value */
918 val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_I);
920 if (val == MSG_ERROR)
923 err = sysctl_handle_int(oidp, &val, 0, req);
924 if (err || !req->newptr) /* error || read request */
928 if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
930 sc->voltage_sdram_i = val;
933 err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_I,
934 sc->voltage_sdram_i);
936 if (err == MSG_ERROR) {
937 device_printf(sc->dev, "set voltage sdram_i error\n");
940 DELAY(TRANSITION_LATENCY);
946 sysctl_bcm2835_cpufreq_voltage_sdram_p(SYSCTL_HANDLER_ARGS)
948 struct bcm2835_cpufreq_softc *sc = arg1;
952 /* get realtime value */
954 val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_P);
956 if (val == MSG_ERROR)
959 err = sysctl_handle_int(oidp, &val, 0, req);
960 if (err || !req->newptr) /* error || read request */
964 if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
966 sc->voltage_sdram_p = val;
969 err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_P,
970 sc->voltage_sdram_p);
972 if (err == MSG_ERROR) {
973 device_printf(sc->dev, "set voltage sdram_p error\n");
976 DELAY(TRANSITION_LATENCY);
982 sysctl_bcm2835_cpufreq_voltage_sdram(SYSCTL_HANDLER_ARGS)
984 struct bcm2835_cpufreq_softc *sc = arg1;
988 /* multiple write only */
992 err = sysctl_handle_int(oidp, &val, 0, req);
997 if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
999 sc->voltage_sdram = val;
1002 err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_C,
1004 if (err == MSG_ERROR) {
1006 device_printf(sc->dev, "set voltage sdram_c error\n");
1009 err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_I,
1011 if (err == MSG_ERROR) {
1013 device_printf(sc->dev, "set voltage sdram_i error\n");
1016 err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_P,
1018 if (err == MSG_ERROR) {
1020 device_printf(sc->dev, "set voltage sdram_p error\n");
1024 DELAY(TRANSITION_LATENCY);
1030 sysctl_bcm2835_cpufreq_temperature(SYSCTL_HANDLER_ARGS)
1032 struct bcm2835_cpufreq_softc *sc = arg1;
1036 /* get realtime value */
1038 val = bcm2835_cpufreq_get_temperature(sc);
1040 if (val == MSG_ERROR)
1043 err = sysctl_handle_int(oidp, &val, 0, req);
1044 if (err || !req->newptr) /* error || read request */
1052 sysctl_bcm2835_devcpu_temperature(SYSCTL_HANDLER_ARGS)
1054 struct bcm2835_cpufreq_softc *sc = arg1;
1058 /* get realtime value */
1060 val = bcm2835_cpufreq_get_temperature(sc);
1062 if (val == MSG_ERROR)
1065 /* 1/1000 celsius (raw) to 1/10 kelvin */
1066 val = val / 100 + TZ_ZEROC;
1068 err = sysctl_handle_int(oidp, &val, 0, req);
1069 if (err || !req->newptr) /* error || read request */
1078 bcm2835_cpufreq_init(void *arg)
1080 struct bcm2835_cpufreq_softc *sc = arg;
1081 struct sysctl_ctx_list *ctx;
1083 int arm_freq, core_freq, sdram_freq;
1084 int arm_max_freq, arm_min_freq, core_max_freq, core_min_freq;
1085 int sdram_max_freq, sdram_min_freq;
1086 int voltage_core, voltage_sdram_c, voltage_sdram_i, voltage_sdram_p;
1087 int max_voltage_core, min_voltage_core;
1088 int max_voltage_sdram_c, min_voltage_sdram_c;
1089 int max_voltage_sdram_i, min_voltage_sdram_i;
1090 int max_voltage_sdram_p, min_voltage_sdram_p;
1091 int turbo, temperature;
1096 arm_freq = bcm2835_cpufreq_get_clock_rate(sc,
1097 BCM2835_MBOX_CLOCK_ID_ARM);
1098 core_freq = bcm2835_cpufreq_get_clock_rate(sc,
1099 BCM2835_MBOX_CLOCK_ID_CORE);
1100 sdram_freq = bcm2835_cpufreq_get_clock_rate(sc,
1101 BCM2835_MBOX_CLOCK_ID_SDRAM);
1104 arm_max_freq = bcm2835_cpufreq_get_max_clock_rate(sc,
1105 BCM2835_MBOX_CLOCK_ID_ARM);
1106 arm_min_freq = bcm2835_cpufreq_get_min_clock_rate(sc,
1107 BCM2835_MBOX_CLOCK_ID_ARM);
1108 core_max_freq = bcm2835_cpufreq_get_max_clock_rate(sc,
1109 BCM2835_MBOX_CLOCK_ID_CORE);
1110 core_min_freq = bcm2835_cpufreq_get_min_clock_rate(sc,
1111 BCM2835_MBOX_CLOCK_ID_CORE);
1112 sdram_max_freq = bcm2835_cpufreq_get_max_clock_rate(sc,
1113 BCM2835_MBOX_CLOCK_ID_SDRAM);
1114 sdram_min_freq = bcm2835_cpufreq_get_min_clock_rate(sc,
1115 BCM2835_MBOX_CLOCK_ID_SDRAM);
1118 turbo = bcm2835_cpufreq_get_turbo(sc);
1120 sc->turbo_mode = BCM2835_MBOX_TURBO_ON;
1122 sc->turbo_mode = BCM2835_MBOX_TURBO_OFF;
1125 voltage_core = bcm2835_cpufreq_get_voltage(sc,
1126 BCM2835_MBOX_VOLTAGE_ID_CORE);
1127 voltage_sdram_c = bcm2835_cpufreq_get_voltage(sc,
1128 BCM2835_MBOX_VOLTAGE_ID_SDRAM_C);
1129 voltage_sdram_i = bcm2835_cpufreq_get_voltage(sc,
1130 BCM2835_MBOX_VOLTAGE_ID_SDRAM_I);
1131 voltage_sdram_p = bcm2835_cpufreq_get_voltage(sc,
1132 BCM2835_MBOX_VOLTAGE_ID_SDRAM_P);
1134 /* current values (offset from 1.2V) */
1135 sc->voltage_core = voltage_core;
1136 sc->voltage_sdram = voltage_sdram_c;
1137 sc->voltage_sdram_c = voltage_sdram_c;
1138 sc->voltage_sdram_i = voltage_sdram_i;
1139 sc->voltage_sdram_p = voltage_sdram_p;
1141 /* max/min voltage */
1142 max_voltage_core = bcm2835_cpufreq_get_max_voltage(sc,
1143 BCM2835_MBOX_VOLTAGE_ID_CORE);
1144 min_voltage_core = bcm2835_cpufreq_get_min_voltage(sc,
1145 BCM2835_MBOX_VOLTAGE_ID_CORE);
1146 max_voltage_sdram_c = bcm2835_cpufreq_get_max_voltage(sc,
1147 BCM2835_MBOX_VOLTAGE_ID_SDRAM_C);
1148 max_voltage_sdram_i = bcm2835_cpufreq_get_max_voltage(sc,
1149 BCM2835_MBOX_VOLTAGE_ID_SDRAM_I);
1150 max_voltage_sdram_p = bcm2835_cpufreq_get_max_voltage(sc,
1151 BCM2835_MBOX_VOLTAGE_ID_SDRAM_P);
1152 min_voltage_sdram_c = bcm2835_cpufreq_get_min_voltage(sc,
1153 BCM2835_MBOX_VOLTAGE_ID_SDRAM_C);
1154 min_voltage_sdram_i = bcm2835_cpufreq_get_min_voltage(sc,
1155 BCM2835_MBOX_VOLTAGE_ID_SDRAM_I);
1156 min_voltage_sdram_p = bcm2835_cpufreq_get_min_voltage(sc,
1157 BCM2835_MBOX_VOLTAGE_ID_SDRAM_P);
1160 temperature = bcm2835_cpufreq_get_temperature(sc);
1163 if (cpufreq_verbose || bootverbose) {
1164 device_printf(sc->dev, "Boot settings:\n");
1165 device_printf(sc->dev,
1166 "current ARM %dMHz, Core %dMHz, SDRAM %dMHz, Turbo %s\n",
1167 HZ2MHZ(arm_freq), HZ2MHZ(core_freq), HZ2MHZ(sdram_freq),
1168 (sc->turbo_mode == BCM2835_MBOX_TURBO_ON) ? "ON" : "OFF");
1170 device_printf(sc->dev,
1171 "max/min ARM %d/%dMHz, Core %d/%dMHz, SDRAM %d/%dMHz\n",
1172 HZ2MHZ(arm_max_freq), HZ2MHZ(arm_min_freq),
1173 HZ2MHZ(core_max_freq), HZ2MHZ(core_min_freq),
1174 HZ2MHZ(sdram_max_freq), HZ2MHZ(sdram_min_freq));
1176 device_printf(sc->dev,
1177 "current Core %dmV, SDRAM_C %dmV, SDRAM_I %dmV, "
1179 OFFSET2MVOLT(voltage_core), OFFSET2MVOLT(voltage_sdram_c),
1180 OFFSET2MVOLT(voltage_sdram_i),
1181 OFFSET2MVOLT(voltage_sdram_p));
1183 device_printf(sc->dev,
1184 "max/min Core %d/%dmV, SDRAM_C %d/%dmV, SDRAM_I %d/%dmV, "
1185 "SDRAM_P %d/%dmV\n",
1186 OFFSET2MVOLT(max_voltage_core),
1187 OFFSET2MVOLT(min_voltage_core),
1188 OFFSET2MVOLT(max_voltage_sdram_c),
1189 OFFSET2MVOLT(min_voltage_sdram_c),
1190 OFFSET2MVOLT(max_voltage_sdram_i),
1191 OFFSET2MVOLT(min_voltage_sdram_i),
1192 OFFSET2MVOLT(max_voltage_sdram_p),
1193 OFFSET2MVOLT(min_voltage_sdram_p));
1195 device_printf(sc->dev,
1196 "Temperature %d.%dC\n", (temperature / 1000),
1197 (temperature % 1000) / 100);
1198 } else { /* !cpufreq_verbose && !bootverbose */
1199 device_printf(sc->dev,
1200 "ARM %dMHz, Core %dMHz, SDRAM %dMHz, Turbo %s\n",
1201 HZ2MHZ(arm_freq), HZ2MHZ(core_freq), HZ2MHZ(sdram_freq),
1202 (sc->turbo_mode == BCM2835_MBOX_TURBO_ON) ? "ON" : "OFF");
1205 /* keep in softc (MHz/mV) */
1206 sc->arm_max_freq = HZ2MHZ(arm_max_freq);
1207 sc->arm_min_freq = HZ2MHZ(arm_min_freq);
1208 sc->core_max_freq = HZ2MHZ(core_max_freq);
1209 sc->core_min_freq = HZ2MHZ(core_min_freq);
1210 sc->sdram_max_freq = HZ2MHZ(sdram_max_freq);
1211 sc->sdram_min_freq = HZ2MHZ(sdram_min_freq);
1212 sc->max_voltage_core = OFFSET2MVOLT(max_voltage_core);
1213 sc->min_voltage_core = OFFSET2MVOLT(min_voltage_core);
1215 /* if turbo is on, set to max values */
1216 if (sc->turbo_mode == BCM2835_MBOX_TURBO_ON) {
1217 bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM,
1219 DELAY(TRANSITION_LATENCY);
1220 bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE,
1222 DELAY(TRANSITION_LATENCY);
1223 bcm2835_cpufreq_set_clock_rate(sc,
1224 BCM2835_MBOX_CLOCK_ID_SDRAM, sdram_max_freq);
1225 DELAY(TRANSITION_LATENCY);
1227 bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM,
1229 DELAY(TRANSITION_LATENCY);
1230 bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE,
1232 DELAY(TRANSITION_LATENCY);
1233 bcm2835_cpufreq_set_clock_rate(sc,
1234 BCM2835_MBOX_CLOCK_ID_SDRAM, sdram_min_freq);
1235 DELAY(TRANSITION_LATENCY);
1240 /* add human readable temperature to dev.cpu node */
1241 cpu = device_get_parent(sc->dev);
1243 ctx = device_get_sysctl_ctx(cpu);
1244 SYSCTL_ADD_PROC(ctx,
1245 SYSCTL_CHILDREN(device_get_sysctl_tree(cpu)), OID_AUTO,
1246 "temperature", CTLTYPE_INT | CTLFLAG_RD, sc, 0,
1247 sysctl_bcm2835_devcpu_temperature, "IK",
1248 "Current SoC temperature");
1251 /* release this hook (continue boot) */
1252 config_intrhook_disestablish(&sc->init_hook);
1256 bcm2835_cpufreq_identify(driver_t *driver, device_t parent)
1258 const struct ofw_compat_data *compat;
1261 root = OF_finddevice("/");
1262 for (compat = compat_data; compat->ocd_str != NULL; compat++)
1263 if (ofw_bus_node_is_compatible(root, compat->ocd_str))
1266 if (compat->ocd_data == 0)
1269 DPRINTF("driver=%p, parent=%p\n", driver, parent);
1270 if (device_find_child(parent, "bcm2835_cpufreq", -1) != NULL)
1272 if (BUS_ADD_CHILD(parent, 0, "bcm2835_cpufreq", -1) == NULL)
1273 device_printf(parent, "add child failed\n");
1277 bcm2835_cpufreq_probe(device_t dev)
1280 if (device_get_unit(dev) != 0)
1282 device_set_desc(dev, "CPU Frequency Control");
1288 bcm2835_cpufreq_attach(device_t dev)
1290 struct bcm2835_cpufreq_softc *sc;
1291 struct sysctl_oid *oid;
1294 sc = device_get_softc(dev);
1297 /* initial values */
1298 sc->arm_max_freq = -1;
1299 sc->arm_min_freq = -1;
1300 sc->core_max_freq = -1;
1301 sc->core_min_freq = -1;
1302 sc->sdram_max_freq = -1;
1303 sc->sdram_min_freq = -1;
1304 sc->max_voltage_core = 0;
1305 sc->min_voltage_core = 0;
1307 /* setup sysctl at first device */
1308 if (device_get_unit(dev) == 0) {
1309 sysctl_ctx_init(&bcm2835_sysctl_ctx);
1310 /* create node for hw.cpufreq */
1311 oid = SYSCTL_ADD_NODE(&bcm2835_sysctl_ctx,
1312 SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO, "cpufreq",
1313 CTLFLAG_RD, NULL, "");
1315 /* Frequency (Hz) */
1316 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1317 OID_AUTO, "arm_freq", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
1318 sysctl_bcm2835_cpufreq_arm_freq, "IU",
1319 "ARM frequency (Hz)");
1320 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1321 OID_AUTO, "core_freq", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
1322 sysctl_bcm2835_cpufreq_core_freq, "IU",
1323 "Core frequency (Hz)");
1324 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1325 OID_AUTO, "sdram_freq", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
1326 sysctl_bcm2835_cpufreq_sdram_freq, "IU",
1327 "SDRAM frequency (Hz)");
1330 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1331 OID_AUTO, "turbo", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
1332 sysctl_bcm2835_cpufreq_turbo, "IU",
1333 "Disables dynamic clocking");
1335 /* Voltage (offset from 1.2V in units of 0.025V) */
1336 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1337 OID_AUTO, "voltage_core", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
1338 sysctl_bcm2835_cpufreq_voltage_core, "I",
1339 "ARM/GPU core voltage"
1340 "(offset from 1.2V in units of 0.025V)");
1341 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1342 OID_AUTO, "voltage_sdram", CTLTYPE_INT | CTLFLAG_WR, sc,
1343 0, sysctl_bcm2835_cpufreq_voltage_sdram, "I",
1344 "SDRAM voltage (offset from 1.2V in units of 0.025V)");
1346 /* Voltage individual SDRAM */
1347 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1348 OID_AUTO, "voltage_sdram_c", CTLTYPE_INT | CTLFLAG_RW, sc,
1349 0, sysctl_bcm2835_cpufreq_voltage_sdram_c, "I",
1350 "SDRAM controller voltage"
1351 "(offset from 1.2V in units of 0.025V)");
1352 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1353 OID_AUTO, "voltage_sdram_i", CTLTYPE_INT | CTLFLAG_RW, sc,
1354 0, sysctl_bcm2835_cpufreq_voltage_sdram_i, "I",
1355 "SDRAM I/O voltage (offset from 1.2V in units of 0.025V)");
1356 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1357 OID_AUTO, "voltage_sdram_p", CTLTYPE_INT | CTLFLAG_RW, sc,
1358 0, sysctl_bcm2835_cpufreq_voltage_sdram_p, "I",
1359 "SDRAM phy voltage (offset from 1.2V in units of 0.025V)");
1362 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1363 OID_AUTO, "temperature", CTLTYPE_INT | CTLFLAG_RD, sc, 0,
1364 sysctl_bcm2835_cpufreq_temperature, "I",
1365 "SoC temperature (thousandths of a degree C)");
1369 sema_init(&vc_sema, 1, "vcsema");
1371 /* register callback for using mbox when interrupts are enabled */
1372 sc->init_hook.ich_func = bcm2835_cpufreq_init;
1373 sc->init_hook.ich_arg = sc;
1375 if (config_intrhook_establish(&sc->init_hook) != 0) {
1376 device_printf(dev, "config_intrhook_establish failed\n");
1380 /* this device is controlled by cpufreq(4) */
1381 cpufreq_register(dev);
1387 bcm2835_cpufreq_detach(device_t dev)
1390 sema_destroy(&vc_sema);
1392 return (cpufreq_unregister(dev));
1396 bcm2835_cpufreq_set(device_t dev, const struct cf_setting *cf)
1398 struct bcm2835_cpufreq_softc *sc;
1399 uint32_t rate_hz, rem;
1400 int resp_freq, arm_freq, min_freq, core_freq;
1405 if (cf == NULL || cf->freq < 0)
1408 sc = device_get_softc(dev);
1410 /* setting clock (Hz) */
1411 rate_hz = (uint32_t)MHZ2HZ(cf->freq);
1412 rem = rate_hz % HZSTEP;
1417 /* adjust min freq */
1418 min_freq = sc->arm_min_freq;
1419 if (sc->turbo_mode != BCM2835_MBOX_TURBO_ON)
1420 if (min_freq > cpufreq_lowest_freq)
1421 min_freq = cpufreq_lowest_freq;
1423 if (rate_hz < MHZ2HZ(min_freq) || rate_hz > MHZ2HZ(sc->arm_max_freq))
1426 /* set new value and verify it */
1429 cur_freq = bcm2835_cpufreq_get_clock_rate(sc,
1430 BCM2835_MBOX_CLOCK_ID_ARM);
1432 resp_freq = bcm2835_cpufreq_set_clock_rate(sc,
1433 BCM2835_MBOX_CLOCK_ID_ARM, rate_hz);
1434 DELAY(TRANSITION_LATENCY);
1435 arm_freq = bcm2835_cpufreq_get_clock_rate(sc,
1436 BCM2835_MBOX_CLOCK_ID_ARM);
1439 * if non-turbo and lower than or equal min_freq,
1440 * clock down core and sdram to default first.
1442 if (sc->turbo_mode != BCM2835_MBOX_TURBO_ON) {
1443 core_freq = bcm2835_cpufreq_get_clock_rate(sc,
1444 BCM2835_MBOX_CLOCK_ID_CORE);
1445 if (rate_hz > MHZ2HZ(sc->arm_min_freq)) {
1446 bcm2835_cpufreq_set_clock_rate(sc,
1447 BCM2835_MBOX_CLOCK_ID_CORE,
1448 MHZ2HZ(sc->core_max_freq));
1449 DELAY(TRANSITION_LATENCY);
1450 bcm2835_cpufreq_set_clock_rate(sc,
1451 BCM2835_MBOX_CLOCK_ID_SDRAM,
1452 MHZ2HZ(sc->sdram_max_freq));
1453 DELAY(TRANSITION_LATENCY);
1455 if (sc->core_min_freq < DEFAULT_CORE_FREQUENCY &&
1456 core_freq > DEFAULT_CORE_FREQUENCY) {
1457 /* first, down to 250, then down to min */
1458 DELAY(TRANSITION_LATENCY);
1459 bcm2835_cpufreq_set_clock_rate(sc,
1460 BCM2835_MBOX_CLOCK_ID_CORE,
1461 MHZ2HZ(DEFAULT_CORE_FREQUENCY));
1462 DELAY(TRANSITION_LATENCY);
1463 /* reset core voltage */
1464 bcm2835_cpufreq_set_voltage(sc,
1465 BCM2835_MBOX_VOLTAGE_ID_CORE, 0);
1466 DELAY(TRANSITION_LATENCY);
1468 bcm2835_cpufreq_set_clock_rate(sc,
1469 BCM2835_MBOX_CLOCK_ID_CORE,
1470 MHZ2HZ(sc->core_min_freq));
1471 DELAY(TRANSITION_LATENCY);
1472 bcm2835_cpufreq_set_clock_rate(sc,
1473 BCM2835_MBOX_CLOCK_ID_SDRAM,
1474 MHZ2HZ(sc->sdram_min_freq));
1475 DELAY(TRANSITION_LATENCY);
1481 if (resp_freq < 0 || arm_freq < 0 || resp_freq != arm_freq) {
1482 device_printf(dev, "wrong freq\n");
1485 DPRINTF("cpufreq: %d -> %d\n", cur_freq, arm_freq);
1491 bcm2835_cpufreq_get(device_t dev, struct cf_setting *cf)
1493 struct bcm2835_cpufreq_softc *sc;
1499 sc = device_get_softc(dev);
1500 memset(cf, CPUFREQ_VAL_UNKNOWN, sizeof(*cf));
1503 /* get cuurent value */
1505 arm_freq = bcm2835_cpufreq_get_clock_rate(sc,
1506 BCM2835_MBOX_CLOCK_ID_ARM);
1509 device_printf(dev, "can't get clock\n");
1513 /* CPU clock in MHz or 100ths of a percent. */
1514 cf->freq = HZ2MHZ(arm_freq);
1515 /* Voltage in mV. */
1516 cf->volts = CPUFREQ_VAL_UNKNOWN;
1517 /* Power consumed in mW. */
1518 cf->power = CPUFREQ_VAL_UNKNOWN;
1519 /* Transition latency in us. */
1520 cf->lat = TRANSITION_LATENCY;
1521 /* Driver providing this setting. */
1528 bcm2835_cpufreq_make_freq_list(device_t dev, struct cf_setting *sets,
1531 struct bcm2835_cpufreq_softc *sc;
1532 int freq, min_freq, volts, rem;
1535 sc = device_get_softc(dev);
1536 freq = sc->arm_max_freq;
1537 min_freq = sc->arm_min_freq;
1539 /* adjust head freq to STEP */
1540 rem = freq % MHZSTEP;
1542 if (freq < min_freq)
1545 /* if non-turbo, add extra low freq */
1546 if (sc->turbo_mode != BCM2835_MBOX_TURBO_ON)
1547 if (min_freq > cpufreq_lowest_freq)
1548 min_freq = cpufreq_lowest_freq;
1551 /* from freq to min_freq */
1552 for (idx = 0; idx < *count && freq >= min_freq; idx++) {
1553 if (freq > sc->arm_min_freq)
1554 volts = sc->max_voltage_core;
1556 volts = sc->min_voltage_core;
1557 sets[idx].freq = freq;
1558 sets[idx].volts = volts;
1559 sets[idx].lat = TRANSITION_LATENCY;
1560 sets[idx].dev = dev;
1564 /* XXX RPi2 have only 900/600MHz */
1566 volts = sc->min_voltage_core;
1567 sets[idx].freq = freq;
1568 sets[idx].volts = volts;
1569 sets[idx].lat = TRANSITION_LATENCY;
1570 sets[idx].dev = dev;
1572 if (freq != min_freq) {
1573 sets[idx].freq = min_freq;
1574 sets[idx].volts = volts;
1575 sets[idx].lat = TRANSITION_LATENCY;
1576 sets[idx].dev = dev;
1586 bcm2835_cpufreq_settings(device_t dev, struct cf_setting *sets, int *count)
1588 struct bcm2835_cpufreq_softc *sc;
1590 if (sets == NULL || count == NULL)
1593 sc = device_get_softc(dev);
1594 if (sc->arm_min_freq < 0 || sc->arm_max_freq < 0) {
1595 printf("device is not configured\n");
1599 /* fill data with unknown value */
1600 memset(sets, CPUFREQ_VAL_UNKNOWN, sizeof(*sets) * (*count));
1601 /* create new array up to count */
1602 bcm2835_cpufreq_make_freq_list(dev, sets, count);
1608 bcm2835_cpufreq_type(device_t dev, int *type)
1613 *type = CPUFREQ_TYPE_ABSOLUTE;
1618 static device_method_t bcm2835_cpufreq_methods[] = {
1619 /* Device interface */
1620 DEVMETHOD(device_identify, bcm2835_cpufreq_identify),
1621 DEVMETHOD(device_probe, bcm2835_cpufreq_probe),
1622 DEVMETHOD(device_attach, bcm2835_cpufreq_attach),
1623 DEVMETHOD(device_detach, bcm2835_cpufreq_detach),
1625 /* cpufreq interface */
1626 DEVMETHOD(cpufreq_drv_set, bcm2835_cpufreq_set),
1627 DEVMETHOD(cpufreq_drv_get, bcm2835_cpufreq_get),
1628 DEVMETHOD(cpufreq_drv_settings, bcm2835_cpufreq_settings),
1629 DEVMETHOD(cpufreq_drv_type, bcm2835_cpufreq_type),
1634 static devclass_t bcm2835_cpufreq_devclass;
1635 static driver_t bcm2835_cpufreq_driver = {
1637 bcm2835_cpufreq_methods,
1638 sizeof(struct bcm2835_cpufreq_softc),
1641 DRIVER_MODULE(bcm2835_cpufreq, cpu, bcm2835_cpufreq_driver,
1642 bcm2835_cpufreq_devclass, 0, 0);