2 * Copyright (C) 2013-2015 Daisuke Aoyama <aoyama@peach.ne.jp>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
32 #include <sys/systm.h>
35 #include <sys/kernel.h>
37 #include <sys/malloc.h>
38 #include <sys/module.h>
39 #include <sys/mutex.h>
41 #include <sys/sysctl.h>
43 #include <machine/bus.h>
44 #include <machine/cpu.h>
45 #include <machine/intr.h>
47 #include <dev/ofw/ofw_bus.h>
48 #include <dev/ofw/ofw_bus_subr.h>
50 #include <arm/broadcom/bcm2835/bcm2835_firmware.h>
51 #include <arm/broadcom/bcm2835/bcm2835_vcbus.h>
53 #include "cpufreq_if.h"
56 #define DPRINTF(fmt, ...) do { \
57 printf("%s:%u: ", __func__, __LINE__); \
58 printf(fmt, ##__VA_ARGS__); \
61 #define DPRINTF(fmt, ...)
64 #define HZ2MHZ(freq) ((freq) / (1000 * 1000))
65 #define MHZ2HZ(freq) ((freq) * (1000 * 1000))
68 #define OFFSET2MVOLT(val) (1200 + ((val) * 25))
69 #define MVOLT2OFFSET(val) (((val) - 1200) / 25)
70 #define DEFAULT_ARM_FREQUENCY 700
71 #define DEFAULT_LOWEST_FREQ 300
73 #define OFFSET2MVOLT(val) (((val) / 1000))
74 #define MVOLT2OFFSET(val) (((val) * 1000))
75 #define DEFAULT_ARM_FREQUENCY 600
76 #define DEFAULT_LOWEST_FREQ 600
78 #define DEFAULT_CORE_FREQUENCY 250
79 #define DEFAULT_SDRAM_FREQUENCY 400
80 #define TRANSITION_LATENCY 1000
81 #define MIN_OVER_VOLTAGE -16
82 #define MAX_OVER_VOLTAGE 6
83 #define MSG_ERROR -999999999
85 #define HZSTEP (MHZ2HZ(MHZSTEP))
88 #define VC_LOCK(sc) do { \
89 sema_wait(&vc_sema); \
91 #define VC_UNLOCK(sc) do { \
92 sema_post(&vc_sema); \
95 /* ARM->VC mailbox property semaphore */
96 static struct sema vc_sema;
98 static struct sysctl_ctx_list bcm2835_sysctl_ctx;
100 struct bcm2835_cpufreq_softc {
109 int max_voltage_core;
110 int min_voltage_core;
112 /* the values written in mbox */
120 /* initial hook for waiting mbox intr */
121 struct intr_config_hook init_hook;
124 static struct ofw_compat_data compat_data[] = {
125 { "broadcom,bcm2835-vc", 1 },
126 { "broadcom,bcm2708-vc", 1 },
127 { "brcm,bcm2709", 1 },
128 { "brcm,bcm2835", 1 },
129 { "brcm,bcm2836", 1 },
130 { "brcm,bcm2837", 1 },
131 { "brcm,bcm2711", 1 },
135 static int cpufreq_verbose = 0;
136 TUNABLE_INT("hw.bcm2835.cpufreq.verbose", &cpufreq_verbose);
137 static int cpufreq_lowest_freq = DEFAULT_LOWEST_FREQ;
138 TUNABLE_INT("hw.bcm2835.cpufreq.lowest_freq", &cpufreq_lowest_freq);
142 bcm2835_dump(const void *data, int len)
144 const uint8_t *p = (const uint8_t*)data;
147 printf("dump @ %p:\n", data);
148 for (i = 0; i < len; i++) {
149 printf("%2.2x ", p[i]);
160 bcm2835_cpufreq_get_clock_rate(struct bcm2835_cpufreq_softc *sc,
163 union msg_get_clock_rate_body msg;
181 /* setup single tag buffer */
182 memset(&msg, 0, sizeof(msg));
183 msg.req.clock_id = clock_id;
185 /* call mailbox property */
186 err = bcm2835_firmware_property(sc->firmware,
187 BCM2835_FIRMWARE_TAG_GET_CLOCK_RATE, &msg, sizeof(msg));
189 device_printf(sc->dev, "can't get clock rate (id=%u)\n",
195 rate = (int)msg.resp.rate_hz;
196 DPRINTF("clock = %d(Hz)\n", rate);
201 bcm2835_cpufreq_get_max_clock_rate(struct bcm2835_cpufreq_softc *sc,
204 union msg_get_clock_rate_body msg;
222 /* setup single tag buffer */
223 memset(&msg, 0, sizeof(msg));
224 msg.req.clock_id = clock_id;
226 /* call mailbox property */
227 err = bcm2835_firmware_property(sc->firmware,
228 BCM2835_FIRMWARE_TAG_GET_MAX_CLOCK_RATE, &msg, sizeof(msg));
230 device_printf(sc->dev, "can't get max clock rate (id=%u)\n",
236 rate = (int)msg.resp.rate_hz;
237 DPRINTF("clock = %d(Hz)\n", rate);
242 bcm2835_cpufreq_get_min_clock_rate(struct bcm2835_cpufreq_softc *sc,
245 union msg_get_clock_rate_body msg;
263 /* setup single tag buffer */
264 memset(&msg, 0, sizeof(msg));
265 msg.req.clock_id = clock_id;
267 /* call mailbox property */
268 err = bcm2835_firmware_property(sc->firmware,
269 BCM2835_FIRMWARE_TAG_GET_MIN_CLOCK_RATE, &msg, sizeof(msg));
271 device_printf(sc->dev, "can't get min clock rate (id=%u)\n",
277 rate = (int)msg.resp.rate_hz;
278 DPRINTF("clock = %d(Hz)\n", rate);
283 bcm2835_cpufreq_set_clock_rate(struct bcm2835_cpufreq_softc *sc,
284 uint32_t clock_id, uint32_t rate_hz)
286 union msg_set_clock_rate_body msg;
305 /* setup single tag buffer */
306 memset(&msg, 0, sizeof(msg));
307 msg.req.clock_id = clock_id;
308 msg.req.rate_hz = rate_hz;
310 /* call mailbox property */
311 err = bcm2835_firmware_property(sc->firmware,
312 BCM2835_FIRMWARE_TAG_SET_CLOCK_RATE, &msg, sizeof(msg));
314 device_printf(sc->dev, "can't set clock rate (id=%u)\n",
319 /* workaround for core clock */
320 if (clock_id == BCM2835_FIRMWARE_CLOCK_ID_CORE) {
321 /* for safety (may change voltage without changing clock) */
322 DELAY(TRANSITION_LATENCY);
325 * XXX: the core clock is unable to change at once,
326 * to change certainly, write it twice now.
329 /* setup single tag buffer */
330 memset(&msg, 0, sizeof(msg));
331 msg.req.clock_id = clock_id;
332 msg.req.rate_hz = rate_hz;
334 /* call mailbox property */
335 err = bcm2835_firmware_property(sc->firmware,
336 BCM2835_FIRMWARE_TAG_SET_CLOCK_RATE, &msg, sizeof(msg));
338 device_printf(sc->dev,
339 "can't set clock rate (id=%u)\n", clock_id);
345 rate = (int)msg.resp.rate_hz;
346 DPRINTF("clock = %d(Hz)\n", rate);
351 bcm2835_cpufreq_get_turbo(struct bcm2835_cpufreq_softc *sc)
353 union msg_get_turbo_body msg;
371 /* setup single tag buffer */
372 memset(&msg, 0, sizeof(msg));
375 /* call mailbox property */
376 err = bcm2835_firmware_property(sc->firmware,
377 BCM2835_FIRMWARE_TAG_GET_TURBO, &msg, sizeof(msg));
379 device_printf(sc->dev, "can't get turbo\n");
383 /* result 0=non-turbo, 1=turbo */
384 level = (int)msg.resp.level;
385 DPRINTF("level = %d\n", level);
390 bcm2835_cpufreq_set_turbo(struct bcm2835_cpufreq_softc *sc, uint32_t level)
392 union msg_set_turbo_body msg;
411 /* replace unknown value to OFF */
412 if (level != BCM2835_FIRMWARE_TURBO_ON &&
413 level != BCM2835_FIRMWARE_TURBO_OFF)
414 level = BCM2835_FIRMWARE_TURBO_OFF;
416 /* setup single tag buffer */
417 memset(&msg, 0, sizeof(msg));
419 msg.req.level = level;
421 /* call mailbox property */
422 err = bcm2835_firmware_property(sc->firmware,
423 BCM2835_FIRMWARE_TAG_SET_TURBO, &msg, sizeof(msg));
425 device_printf(sc->dev, "can't set turbo\n");
429 /* result 0=non-turbo, 1=turbo */
430 value = (int)msg.resp.level;
431 DPRINTF("level = %d\n", value);
436 bcm2835_cpufreq_get_voltage(struct bcm2835_cpufreq_softc *sc,
439 union msg_get_voltage_body msg;
454 * u32: value (offset from 1.2V in units of 0.025V)
457 /* setup single tag buffer */
458 memset(&msg, 0, sizeof(msg));
459 msg.req.voltage_id = voltage_id;
461 /* call mailbox property */
462 err = bcm2835_firmware_property(sc->firmware,
463 BCM2835_FIRMWARE_TAG_GET_VOLTAGE, &msg, sizeof(msg));
465 device_printf(sc->dev, "can't get voltage\n");
469 /* result (offset from 1.2V) */
470 value = (int)msg.resp.value;
471 DPRINTF("value = %d\n", value);
476 bcm2835_cpufreq_get_max_voltage(struct bcm2835_cpufreq_softc *sc,
479 union msg_get_voltage_body msg;
494 * u32: value (offset from 1.2V in units of 0.025V)
497 /* setup single tag buffer */
498 memset(&msg, 0, sizeof(msg));
499 msg.req.voltage_id = voltage_id;
501 /* call mailbox property */
502 err = bcm2835_firmware_property(sc->firmware,
503 BCM2835_FIRMWARE_TAG_GET_MAX_VOLTAGE, &msg, sizeof(msg));
505 device_printf(sc->dev, "can't get max voltage\n");
509 /* result (offset from 1.2V) */
510 value = (int)msg.resp.value;
511 DPRINTF("value = %d\n", value);
515 bcm2835_cpufreq_get_min_voltage(struct bcm2835_cpufreq_softc *sc,
518 union msg_get_voltage_body msg;
533 * u32: value (offset from 1.2V in units of 0.025V)
536 /* setup single tag buffer */
537 memset(&msg, 0, sizeof(msg));
538 msg.req.voltage_id = voltage_id;
540 /* call mailbox property */
541 err = bcm2835_firmware_property(sc->firmware,
542 BCM2835_FIRMWARE_TAG_GET_MIN_VOLTAGE, &msg, sizeof(msg));
544 device_printf(sc->dev, "can't get min voltage\n");
548 /* result (offset from 1.2V) */
549 value = (int)msg.resp.value;
550 DPRINTF("value = %d\n", value);
555 bcm2835_cpufreq_set_voltage(struct bcm2835_cpufreq_softc *sc,
556 uint32_t voltage_id, int32_t value)
558 union msg_set_voltage_body msg;
568 * u32: value (offset from 1.2V in units of 0.025V)
573 * u32: value (offset from 1.2V in units of 0.025V)
578 * 0 (1.2 V). Values above 6 are only allowed when force_turbo or
579 * current_limit_override are specified (which set the warranty bit).
581 if (value > MAX_OVER_VOLTAGE || value < MIN_OVER_VOLTAGE) {
582 /* currently not supported */
583 device_printf(sc->dev, "not supported voltage: %d\n", value);
587 /* setup single tag buffer */
588 memset(&msg, 0, sizeof(msg));
589 msg.req.voltage_id = voltage_id;
590 msg.req.value = (uint32_t)value;
592 /* call mailbox property */
593 err = bcm2835_firmware_property(sc->firmware,
594 BCM2835_FIRMWARE_TAG_SET_VOLTAGE, &msg, sizeof(msg));
596 device_printf(sc->dev, "can't set voltage\n");
600 /* result (offset from 1.2V) */
601 value = (int)msg.resp.value;
602 DPRINTF("value = %d\n", value);
607 bcm2835_cpufreq_get_temperature(struct bcm2835_cpufreq_softc *sc)
609 union msg_get_temperature_body msg;
619 * u32: temperature id
623 * u32: temperature id
627 /* setup single tag buffer */
628 memset(&msg, 0, sizeof(msg));
629 msg.req.temperature_id = 0;
631 /* call mailbox property */
632 err = bcm2835_firmware_property(sc->firmware,
633 BCM2835_FIRMWARE_TAG_GET_TEMPERATURE, &msg, sizeof(msg));
635 device_printf(sc->dev, "can't get temperature\n");
639 /* result (temperature of degree C) */
640 value = (int)msg.resp.value;
641 DPRINTF("value = %d\n", value);
648 sysctl_bcm2835_cpufreq_arm_freq(SYSCTL_HANDLER_ARGS)
650 struct bcm2835_cpufreq_softc *sc = arg1;
654 /* get realtime value */
656 val = bcm2835_cpufreq_get_clock_rate(sc, BCM2835_FIRMWARE_CLOCK_ID_ARM);
658 if (val == MSG_ERROR)
661 err = sysctl_handle_int(oidp, &val, 0, req);
662 if (err || !req->newptr) /* error || read request */
667 err = bcm2835_cpufreq_set_clock_rate(sc, BCM2835_FIRMWARE_CLOCK_ID_ARM,
670 if (err == MSG_ERROR) {
671 device_printf(sc->dev, "set clock arm_freq error\n");
674 DELAY(TRANSITION_LATENCY);
680 sysctl_bcm2835_cpufreq_core_freq(SYSCTL_HANDLER_ARGS)
682 struct bcm2835_cpufreq_softc *sc = arg1;
686 /* get realtime value */
688 val = bcm2835_cpufreq_get_clock_rate(sc,
689 BCM2835_FIRMWARE_CLOCK_ID_CORE);
691 if (val == MSG_ERROR)
694 err = sysctl_handle_int(oidp, &val, 0, req);
695 if (err || !req->newptr) /* error || read request */
700 err = bcm2835_cpufreq_set_clock_rate(sc, BCM2835_FIRMWARE_CLOCK_ID_CORE,
702 if (err == MSG_ERROR) {
704 device_printf(sc->dev, "set clock core_freq error\n");
708 DELAY(TRANSITION_LATENCY);
714 sysctl_bcm2835_cpufreq_sdram_freq(SYSCTL_HANDLER_ARGS)
716 struct bcm2835_cpufreq_softc *sc = arg1;
720 /* get realtime value */
722 val = bcm2835_cpufreq_get_clock_rate(sc,
723 BCM2835_FIRMWARE_CLOCK_ID_SDRAM);
725 if (val == MSG_ERROR)
728 err = sysctl_handle_int(oidp, &val, 0, req);
729 if (err || !req->newptr) /* error || read request */
734 err = bcm2835_cpufreq_set_clock_rate(sc,
735 BCM2835_FIRMWARE_CLOCK_ID_SDRAM, val);
737 if (err == MSG_ERROR) {
738 device_printf(sc->dev, "set clock sdram_freq error\n");
741 DELAY(TRANSITION_LATENCY);
747 sysctl_bcm2835_cpufreq_turbo(SYSCTL_HANDLER_ARGS)
749 struct bcm2835_cpufreq_softc *sc = arg1;
753 /* get realtime value */
755 val = bcm2835_cpufreq_get_turbo(sc);
757 if (val == MSG_ERROR)
760 err = sysctl_handle_int(oidp, &val, 0, req);
761 if (err || !req->newptr) /* error || read request */
766 sc->turbo_mode = BCM2835_FIRMWARE_TURBO_ON;
768 sc->turbo_mode = BCM2835_FIRMWARE_TURBO_OFF;
771 err = bcm2835_cpufreq_set_turbo(sc, sc->turbo_mode);
773 if (err == MSG_ERROR) {
774 device_printf(sc->dev, "set turbo error\n");
777 DELAY(TRANSITION_LATENCY);
783 sysctl_bcm2835_cpufreq_voltage_core(SYSCTL_HANDLER_ARGS)
785 struct bcm2835_cpufreq_softc *sc = arg1;
789 /* get realtime value */
791 val = bcm2835_cpufreq_get_voltage(sc, BCM2835_FIRMWARE_VOLTAGE_ID_CORE);
793 if (val == MSG_ERROR)
796 err = sysctl_handle_int(oidp, &val, 0, req);
797 if (err || !req->newptr) /* error || read request */
801 if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
803 sc->voltage_core = val;
806 err = bcm2835_cpufreq_set_voltage(sc, BCM2835_FIRMWARE_VOLTAGE_ID_CORE,
809 if (err == MSG_ERROR) {
810 device_printf(sc->dev, "set voltage core error\n");
813 DELAY(TRANSITION_LATENCY);
819 sysctl_bcm2835_cpufreq_voltage_sdram_c(SYSCTL_HANDLER_ARGS)
821 struct bcm2835_cpufreq_softc *sc = arg1;
825 /* get realtime value */
827 val = bcm2835_cpufreq_get_voltage(sc,
828 BCM2835_FIRMWARE_VOLTAGE_ID_SDRAM_C);
830 if (val == MSG_ERROR)
833 err = sysctl_handle_int(oidp, &val, 0, req);
834 if (err || !req->newptr) /* error || read request */
838 if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
840 sc->voltage_sdram_c = val;
843 err = bcm2835_cpufreq_set_voltage(sc,
844 BCM2835_FIRMWARE_VOLTAGE_ID_SDRAM_C,
845 sc->voltage_sdram_c);
847 if (err == MSG_ERROR) {
848 device_printf(sc->dev, "set voltage sdram_c error\n");
851 DELAY(TRANSITION_LATENCY);
857 sysctl_bcm2835_cpufreq_voltage_sdram_i(SYSCTL_HANDLER_ARGS)
859 struct bcm2835_cpufreq_softc *sc = arg1;
863 /* get realtime value */
865 val = bcm2835_cpufreq_get_voltage(sc,
866 BCM2835_FIRMWARE_VOLTAGE_ID_SDRAM_I);
868 if (val == MSG_ERROR)
871 err = sysctl_handle_int(oidp, &val, 0, req);
872 if (err || !req->newptr) /* error || read request */
876 if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
878 sc->voltage_sdram_i = val;
881 err = bcm2835_cpufreq_set_voltage(sc,
882 BCM2835_FIRMWARE_VOLTAGE_ID_SDRAM_I, sc->voltage_sdram_i);
884 if (err == MSG_ERROR) {
885 device_printf(sc->dev, "set voltage sdram_i error\n");
888 DELAY(TRANSITION_LATENCY);
894 sysctl_bcm2835_cpufreq_voltage_sdram_p(SYSCTL_HANDLER_ARGS)
896 struct bcm2835_cpufreq_softc *sc = arg1;
900 /* get realtime value */
902 val = bcm2835_cpufreq_get_voltage(sc,
903 BCM2835_FIRMWARE_VOLTAGE_ID_SDRAM_P);
905 if (val == MSG_ERROR)
908 err = sysctl_handle_int(oidp, &val, 0, req);
909 if (err || !req->newptr) /* error || read request */
913 if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
915 sc->voltage_sdram_p = val;
918 err = bcm2835_cpufreq_set_voltage(sc,
919 BCM2835_FIRMWARE_VOLTAGE_ID_SDRAM_P, sc->voltage_sdram_p);
921 if (err == MSG_ERROR) {
922 device_printf(sc->dev, "set voltage sdram_p error\n");
925 DELAY(TRANSITION_LATENCY);
931 sysctl_bcm2835_cpufreq_voltage_sdram(SYSCTL_HANDLER_ARGS)
933 struct bcm2835_cpufreq_softc *sc = arg1;
937 /* multiple write only */
941 err = sysctl_handle_int(oidp, &val, 0, req);
946 if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
948 sc->voltage_sdram = val;
951 err = bcm2835_cpufreq_set_voltage(sc,
952 BCM2835_FIRMWARE_VOLTAGE_ID_SDRAM_C, val);
953 if (err == MSG_ERROR) {
955 device_printf(sc->dev, "set voltage sdram_c error\n");
958 err = bcm2835_cpufreq_set_voltage(sc,
959 BCM2835_FIRMWARE_VOLTAGE_ID_SDRAM_I, val);
960 if (err == MSG_ERROR) {
962 device_printf(sc->dev, "set voltage sdram_i error\n");
965 err = bcm2835_cpufreq_set_voltage(sc,
966 BCM2835_FIRMWARE_VOLTAGE_ID_SDRAM_P, val);
967 if (err == MSG_ERROR) {
969 device_printf(sc->dev, "set voltage sdram_p error\n");
973 DELAY(TRANSITION_LATENCY);
979 sysctl_bcm2835_cpufreq_temperature(SYSCTL_HANDLER_ARGS)
981 struct bcm2835_cpufreq_softc *sc = arg1;
985 /* get realtime value */
987 val = bcm2835_cpufreq_get_temperature(sc);
989 if (val == MSG_ERROR)
992 err = sysctl_handle_int(oidp, &val, 0, req);
993 if (err || !req->newptr) /* error || read request */
1001 sysctl_bcm2835_devcpu_temperature(SYSCTL_HANDLER_ARGS)
1003 struct bcm2835_cpufreq_softc *sc = arg1;
1007 /* get realtime value */
1009 val = bcm2835_cpufreq_get_temperature(sc);
1011 if (val == MSG_ERROR)
1014 /* 1/1000 celsius (raw) to 1/10 kelvin */
1015 val = val / 100 + TZ_ZEROC;
1017 err = sysctl_handle_int(oidp, &val, 0, req);
1018 if (err || !req->newptr) /* error || read request */
1027 bcm2835_cpufreq_init(void *arg)
1029 struct bcm2835_cpufreq_softc *sc = arg;
1030 struct sysctl_ctx_list *ctx;
1032 int arm_freq, core_freq, sdram_freq;
1033 int arm_max_freq, arm_min_freq, core_max_freq, core_min_freq;
1034 int sdram_max_freq, sdram_min_freq;
1035 int voltage_core, voltage_sdram_c, voltage_sdram_i, voltage_sdram_p;
1036 int max_voltage_core, min_voltage_core;
1037 int max_voltage_sdram_c, min_voltage_sdram_c;
1038 int max_voltage_sdram_i, min_voltage_sdram_i;
1039 int max_voltage_sdram_p, min_voltage_sdram_p;
1040 int turbo, temperature;
1045 arm_freq = bcm2835_cpufreq_get_clock_rate(sc,
1046 BCM2835_FIRMWARE_CLOCK_ID_ARM);
1047 core_freq = bcm2835_cpufreq_get_clock_rate(sc,
1048 BCM2835_FIRMWARE_CLOCK_ID_CORE);
1049 sdram_freq = bcm2835_cpufreq_get_clock_rate(sc,
1050 BCM2835_FIRMWARE_CLOCK_ID_SDRAM);
1053 arm_max_freq = bcm2835_cpufreq_get_max_clock_rate(sc,
1054 BCM2835_FIRMWARE_CLOCK_ID_ARM);
1055 arm_min_freq = bcm2835_cpufreq_get_min_clock_rate(sc,
1056 BCM2835_FIRMWARE_CLOCK_ID_ARM);
1057 core_max_freq = bcm2835_cpufreq_get_max_clock_rate(sc,
1058 BCM2835_FIRMWARE_CLOCK_ID_CORE);
1059 core_min_freq = bcm2835_cpufreq_get_min_clock_rate(sc,
1060 BCM2835_FIRMWARE_CLOCK_ID_CORE);
1061 sdram_max_freq = bcm2835_cpufreq_get_max_clock_rate(sc,
1062 BCM2835_FIRMWARE_CLOCK_ID_SDRAM);
1063 sdram_min_freq = bcm2835_cpufreq_get_min_clock_rate(sc,
1064 BCM2835_FIRMWARE_CLOCK_ID_SDRAM);
1067 turbo = bcm2835_cpufreq_get_turbo(sc);
1069 sc->turbo_mode = BCM2835_FIRMWARE_TURBO_ON;
1071 sc->turbo_mode = BCM2835_FIRMWARE_TURBO_OFF;
1074 voltage_core = bcm2835_cpufreq_get_voltage(sc,
1075 BCM2835_FIRMWARE_VOLTAGE_ID_CORE);
1076 voltage_sdram_c = bcm2835_cpufreq_get_voltage(sc,
1077 BCM2835_FIRMWARE_VOLTAGE_ID_SDRAM_C);
1078 voltage_sdram_i = bcm2835_cpufreq_get_voltage(sc,
1079 BCM2835_FIRMWARE_VOLTAGE_ID_SDRAM_I);
1080 voltage_sdram_p = bcm2835_cpufreq_get_voltage(sc,
1081 BCM2835_FIRMWARE_VOLTAGE_ID_SDRAM_P);
1083 /* current values (offset from 1.2V) */
1084 sc->voltage_core = voltage_core;
1085 sc->voltage_sdram = voltage_sdram_c;
1086 sc->voltage_sdram_c = voltage_sdram_c;
1087 sc->voltage_sdram_i = voltage_sdram_i;
1088 sc->voltage_sdram_p = voltage_sdram_p;
1090 /* max/min voltage */
1091 max_voltage_core = bcm2835_cpufreq_get_max_voltage(sc,
1092 BCM2835_FIRMWARE_VOLTAGE_ID_CORE);
1093 min_voltage_core = bcm2835_cpufreq_get_min_voltage(sc,
1094 BCM2835_FIRMWARE_VOLTAGE_ID_CORE);
1095 max_voltage_sdram_c = bcm2835_cpufreq_get_max_voltage(sc,
1096 BCM2835_FIRMWARE_VOLTAGE_ID_SDRAM_C);
1097 max_voltage_sdram_i = bcm2835_cpufreq_get_max_voltage(sc,
1098 BCM2835_FIRMWARE_VOLTAGE_ID_SDRAM_I);
1099 max_voltage_sdram_p = bcm2835_cpufreq_get_max_voltage(sc,
1100 BCM2835_FIRMWARE_VOLTAGE_ID_SDRAM_P);
1101 min_voltage_sdram_c = bcm2835_cpufreq_get_min_voltage(sc,
1102 BCM2835_FIRMWARE_VOLTAGE_ID_SDRAM_C);
1103 min_voltage_sdram_i = bcm2835_cpufreq_get_min_voltage(sc,
1104 BCM2835_FIRMWARE_VOLTAGE_ID_SDRAM_I);
1105 min_voltage_sdram_p = bcm2835_cpufreq_get_min_voltage(sc,
1106 BCM2835_FIRMWARE_VOLTAGE_ID_SDRAM_P);
1109 temperature = bcm2835_cpufreq_get_temperature(sc);
1112 if (cpufreq_verbose || bootverbose) {
1113 device_printf(sc->dev, "Boot settings:\n");
1114 device_printf(sc->dev,
1115 "current ARM %dMHz, Core %dMHz, SDRAM %dMHz, Turbo %s\n",
1116 HZ2MHZ(arm_freq), HZ2MHZ(core_freq), HZ2MHZ(sdram_freq),
1117 (sc->turbo_mode == BCM2835_FIRMWARE_TURBO_ON) ? "ON":"OFF");
1119 device_printf(sc->dev,
1120 "max/min ARM %d/%dMHz, Core %d/%dMHz, SDRAM %d/%dMHz\n",
1121 HZ2MHZ(arm_max_freq), HZ2MHZ(arm_min_freq),
1122 HZ2MHZ(core_max_freq), HZ2MHZ(core_min_freq),
1123 HZ2MHZ(sdram_max_freq), HZ2MHZ(sdram_min_freq));
1125 device_printf(sc->dev,
1126 "current Core %dmV, SDRAM_C %dmV, SDRAM_I %dmV, "
1128 OFFSET2MVOLT(voltage_core), OFFSET2MVOLT(voltage_sdram_c),
1129 OFFSET2MVOLT(voltage_sdram_i),
1130 OFFSET2MVOLT(voltage_sdram_p));
1132 device_printf(sc->dev,
1133 "max/min Core %d/%dmV, SDRAM_C %d/%dmV, SDRAM_I %d/%dmV, "
1134 "SDRAM_P %d/%dmV\n",
1135 OFFSET2MVOLT(max_voltage_core),
1136 OFFSET2MVOLT(min_voltage_core),
1137 OFFSET2MVOLT(max_voltage_sdram_c),
1138 OFFSET2MVOLT(min_voltage_sdram_c),
1139 OFFSET2MVOLT(max_voltage_sdram_i),
1140 OFFSET2MVOLT(min_voltage_sdram_i),
1141 OFFSET2MVOLT(max_voltage_sdram_p),
1142 OFFSET2MVOLT(min_voltage_sdram_p));
1144 device_printf(sc->dev,
1145 "Temperature %d.%dC\n", (temperature / 1000),
1146 (temperature % 1000) / 100);
1147 } else { /* !cpufreq_verbose && !bootverbose */
1148 device_printf(sc->dev,
1149 "ARM %dMHz, Core %dMHz, SDRAM %dMHz, Turbo %s\n",
1150 HZ2MHZ(arm_freq), HZ2MHZ(core_freq), HZ2MHZ(sdram_freq),
1151 (sc->turbo_mode == BCM2835_FIRMWARE_TURBO_ON) ? "ON":"OFF");
1154 /* keep in softc (MHz/mV) */
1155 sc->arm_max_freq = HZ2MHZ(arm_max_freq);
1156 sc->arm_min_freq = HZ2MHZ(arm_min_freq);
1157 sc->core_max_freq = HZ2MHZ(core_max_freq);
1158 sc->core_min_freq = HZ2MHZ(core_min_freq);
1159 sc->sdram_max_freq = HZ2MHZ(sdram_max_freq);
1160 sc->sdram_min_freq = HZ2MHZ(sdram_min_freq);
1161 sc->max_voltage_core = OFFSET2MVOLT(max_voltage_core);
1162 sc->min_voltage_core = OFFSET2MVOLT(min_voltage_core);
1164 /* if turbo is on, set to max values */
1165 if (sc->turbo_mode == BCM2835_FIRMWARE_TURBO_ON) {
1166 bcm2835_cpufreq_set_clock_rate(sc,
1167 BCM2835_FIRMWARE_CLOCK_ID_ARM, arm_max_freq);
1168 DELAY(TRANSITION_LATENCY);
1169 bcm2835_cpufreq_set_clock_rate(sc,
1170 BCM2835_FIRMWARE_CLOCK_ID_CORE, core_max_freq);
1171 DELAY(TRANSITION_LATENCY);
1172 bcm2835_cpufreq_set_clock_rate(sc,
1173 BCM2835_FIRMWARE_CLOCK_ID_SDRAM, sdram_max_freq);
1174 DELAY(TRANSITION_LATENCY);
1176 bcm2835_cpufreq_set_clock_rate(sc,
1177 BCM2835_FIRMWARE_CLOCK_ID_ARM, arm_min_freq);
1178 DELAY(TRANSITION_LATENCY);
1179 bcm2835_cpufreq_set_clock_rate(sc,
1180 BCM2835_FIRMWARE_CLOCK_ID_CORE, core_min_freq);
1181 DELAY(TRANSITION_LATENCY);
1182 bcm2835_cpufreq_set_clock_rate(sc,
1183 BCM2835_FIRMWARE_CLOCK_ID_SDRAM, sdram_min_freq);
1184 DELAY(TRANSITION_LATENCY);
1189 /* add human readable temperature to dev.cpu node */
1190 cpu = device_get_parent(sc->dev);
1192 ctx = device_get_sysctl_ctx(cpu);
1193 SYSCTL_ADD_PROC(ctx,
1194 SYSCTL_CHILDREN(device_get_sysctl_tree(cpu)), OID_AUTO,
1196 CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, sc, 0,
1197 sysctl_bcm2835_devcpu_temperature, "IK",
1198 "Current SoC temperature");
1201 /* release this hook (continue boot) */
1202 config_intrhook_disestablish(&sc->init_hook);
1206 bcm2835_cpufreq_identify(driver_t *driver, device_t parent)
1208 const struct ofw_compat_data *compat;
1211 root = OF_finddevice("/");
1212 for (compat = compat_data; compat->ocd_str != NULL; compat++)
1213 if (ofw_bus_node_is_compatible(root, compat->ocd_str))
1216 if (compat->ocd_data == 0)
1219 DPRINTF("driver=%p, parent=%p\n", driver, parent);
1220 if (device_find_child(parent, "bcm2835_cpufreq", -1) != NULL)
1222 if (BUS_ADD_CHILD(parent, 0, "bcm2835_cpufreq", -1) == NULL)
1223 device_printf(parent, "add child failed\n");
1227 bcm2835_cpufreq_probe(device_t dev)
1230 if (device_get_unit(dev) != 0)
1232 device_set_desc(dev, "CPU Frequency Control");
1238 bcm2835_cpufreq_attach(device_t dev)
1240 struct bcm2835_cpufreq_softc *sc;
1241 struct sysctl_oid *oid;
1244 sc = device_get_softc(dev);
1246 sc->firmware = devclass_get_device(
1247 devclass_find("bcm2835_firmware"), 0);
1248 if (sc->firmware == NULL) {
1249 device_printf(dev, "Unable to find firmware device\n");
1253 /* initial values */
1254 sc->arm_max_freq = -1;
1255 sc->arm_min_freq = -1;
1256 sc->core_max_freq = -1;
1257 sc->core_min_freq = -1;
1258 sc->sdram_max_freq = -1;
1259 sc->sdram_min_freq = -1;
1260 sc->max_voltage_core = 0;
1261 sc->min_voltage_core = 0;
1263 /* setup sysctl at first device */
1264 if (device_get_unit(dev) == 0) {
1265 sysctl_ctx_init(&bcm2835_sysctl_ctx);
1266 /* create node for hw.cpufreq */
1267 oid = SYSCTL_ADD_NODE(&bcm2835_sysctl_ctx,
1268 SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO, "cpufreq",
1269 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "");
1271 /* Frequency (Hz) */
1272 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1273 OID_AUTO, "arm_freq",
1274 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
1275 sysctl_bcm2835_cpufreq_arm_freq, "IU",
1276 "ARM frequency (Hz)");
1277 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1278 OID_AUTO, "core_freq",
1279 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
1280 sysctl_bcm2835_cpufreq_core_freq, "IU",
1281 "Core frequency (Hz)");
1282 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1283 OID_AUTO, "sdram_freq",
1284 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
1285 sysctl_bcm2835_cpufreq_sdram_freq, "IU",
1286 "SDRAM frequency (Hz)");
1289 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1291 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
1292 sysctl_bcm2835_cpufreq_turbo, "IU",
1293 "Disables dynamic clocking");
1295 /* Voltage (offset from 1.2V in units of 0.025V) */
1296 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1297 OID_AUTO, "voltage_core",
1298 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
1299 sysctl_bcm2835_cpufreq_voltage_core, "I",
1300 "ARM/GPU core voltage"
1301 "(offset from 1.2V in units of 0.025V)");
1302 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1303 OID_AUTO, "voltage_sdram",
1304 CTLTYPE_INT | CTLFLAG_WR | CTLFLAG_NEEDGIANT, sc,
1305 0, sysctl_bcm2835_cpufreq_voltage_sdram, "I",
1306 "SDRAM voltage (offset from 1.2V in units of 0.025V)");
1308 /* Voltage individual SDRAM */
1309 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1310 OID_AUTO, "voltage_sdram_c",
1311 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc,
1312 0, sysctl_bcm2835_cpufreq_voltage_sdram_c, "I",
1313 "SDRAM controller voltage"
1314 "(offset from 1.2V in units of 0.025V)");
1315 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1316 OID_AUTO, "voltage_sdram_i",
1317 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc,
1318 0, sysctl_bcm2835_cpufreq_voltage_sdram_i, "I",
1319 "SDRAM I/O voltage (offset from 1.2V in units of 0.025V)");
1320 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1321 OID_AUTO, "voltage_sdram_p",
1322 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc,
1323 0, sysctl_bcm2835_cpufreq_voltage_sdram_p, "I",
1324 "SDRAM phy voltage (offset from 1.2V in units of 0.025V)");
1327 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1328 OID_AUTO, "temperature",
1329 CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, sc, 0,
1330 sysctl_bcm2835_cpufreq_temperature, "I",
1331 "SoC temperature (thousandths of a degree C)");
1335 sema_init(&vc_sema, 1, "vcsema");
1337 /* register callback for using mbox when interrupts are enabled */
1338 sc->init_hook.ich_func = bcm2835_cpufreq_init;
1339 sc->init_hook.ich_arg = sc;
1341 if (config_intrhook_establish(&sc->init_hook) != 0) {
1342 device_printf(dev, "config_intrhook_establish failed\n");
1346 /* this device is controlled by cpufreq(4) */
1347 cpufreq_register(dev);
1353 bcm2835_cpufreq_detach(device_t dev)
1356 sema_destroy(&vc_sema);
1358 return (cpufreq_unregister(dev));
1362 bcm2835_cpufreq_set(device_t dev, const struct cf_setting *cf)
1364 struct bcm2835_cpufreq_softc *sc;
1365 uint32_t rate_hz, rem;
1366 int resp_freq, arm_freq, min_freq, core_freq;
1371 if (cf == NULL || cf->freq < 0)
1374 sc = device_get_softc(dev);
1376 /* setting clock (Hz) */
1377 rate_hz = (uint32_t)MHZ2HZ(cf->freq);
1378 rem = rate_hz % HZSTEP;
1383 /* adjust min freq */
1384 min_freq = sc->arm_min_freq;
1385 if (sc->turbo_mode != BCM2835_FIRMWARE_TURBO_ON)
1386 if (min_freq > cpufreq_lowest_freq)
1387 min_freq = cpufreq_lowest_freq;
1389 if (rate_hz < MHZ2HZ(min_freq) || rate_hz > MHZ2HZ(sc->arm_max_freq))
1392 /* set new value and verify it */
1395 cur_freq = bcm2835_cpufreq_get_clock_rate(sc,
1396 BCM2835_FIRMWARE_CLOCK_ID_ARM);
1398 resp_freq = bcm2835_cpufreq_set_clock_rate(sc,
1399 BCM2835_FIRMWARE_CLOCK_ID_ARM, rate_hz);
1400 DELAY(TRANSITION_LATENCY);
1401 arm_freq = bcm2835_cpufreq_get_clock_rate(sc,
1402 BCM2835_FIRMWARE_CLOCK_ID_ARM);
1405 * if non-turbo and lower than or equal min_freq,
1406 * clock down core and sdram to default first.
1408 if (sc->turbo_mode != BCM2835_FIRMWARE_TURBO_ON) {
1409 core_freq = bcm2835_cpufreq_get_clock_rate(sc,
1410 BCM2835_FIRMWARE_CLOCK_ID_CORE);
1411 if (rate_hz > MHZ2HZ(sc->arm_min_freq)) {
1412 bcm2835_cpufreq_set_clock_rate(sc,
1413 BCM2835_FIRMWARE_CLOCK_ID_CORE,
1414 MHZ2HZ(sc->core_max_freq));
1415 DELAY(TRANSITION_LATENCY);
1416 bcm2835_cpufreq_set_clock_rate(sc,
1417 BCM2835_FIRMWARE_CLOCK_ID_SDRAM,
1418 MHZ2HZ(sc->sdram_max_freq));
1419 DELAY(TRANSITION_LATENCY);
1421 if (sc->core_min_freq < DEFAULT_CORE_FREQUENCY &&
1422 core_freq > DEFAULT_CORE_FREQUENCY) {
1423 /* first, down to 250, then down to min */
1424 DELAY(TRANSITION_LATENCY);
1425 bcm2835_cpufreq_set_clock_rate(sc,
1426 BCM2835_FIRMWARE_CLOCK_ID_CORE,
1427 MHZ2HZ(DEFAULT_CORE_FREQUENCY));
1428 DELAY(TRANSITION_LATENCY);
1429 /* reset core voltage */
1430 bcm2835_cpufreq_set_voltage(sc,
1431 BCM2835_FIRMWARE_VOLTAGE_ID_CORE, 0);
1432 DELAY(TRANSITION_LATENCY);
1434 bcm2835_cpufreq_set_clock_rate(sc,
1435 BCM2835_FIRMWARE_CLOCK_ID_CORE,
1436 MHZ2HZ(sc->core_min_freq));
1437 DELAY(TRANSITION_LATENCY);
1438 bcm2835_cpufreq_set_clock_rate(sc,
1439 BCM2835_FIRMWARE_CLOCK_ID_SDRAM,
1440 MHZ2HZ(sc->sdram_min_freq));
1441 DELAY(TRANSITION_LATENCY);
1447 if (resp_freq < 0 || arm_freq < 0 || resp_freq != arm_freq) {
1448 device_printf(dev, "wrong freq\n");
1451 DPRINTF("cpufreq: %d -> %d\n", cur_freq, arm_freq);
1457 bcm2835_cpufreq_get(device_t dev, struct cf_setting *cf)
1459 struct bcm2835_cpufreq_softc *sc;
1465 sc = device_get_softc(dev);
1466 memset(cf, CPUFREQ_VAL_UNKNOWN, sizeof(*cf));
1469 /* get cuurent value */
1471 arm_freq = bcm2835_cpufreq_get_clock_rate(sc,
1472 BCM2835_FIRMWARE_CLOCK_ID_ARM);
1475 device_printf(dev, "can't get clock\n");
1479 /* CPU clock in MHz or 100ths of a percent. */
1480 cf->freq = HZ2MHZ(arm_freq);
1481 /* Voltage in mV. */
1482 cf->volts = CPUFREQ_VAL_UNKNOWN;
1483 /* Power consumed in mW. */
1484 cf->power = CPUFREQ_VAL_UNKNOWN;
1485 /* Transition latency in us. */
1486 cf->lat = TRANSITION_LATENCY;
1487 /* Driver providing this setting. */
1494 bcm2835_cpufreq_make_freq_list(device_t dev, struct cf_setting *sets,
1497 struct bcm2835_cpufreq_softc *sc;
1498 int freq, min_freq, volts, rem;
1501 sc = device_get_softc(dev);
1502 freq = sc->arm_max_freq;
1503 min_freq = sc->arm_min_freq;
1505 /* adjust head freq to STEP */
1506 rem = freq % MHZSTEP;
1508 if (freq < min_freq)
1511 /* if non-turbo, add extra low freq */
1512 if (sc->turbo_mode != BCM2835_FIRMWARE_TURBO_ON)
1513 if (min_freq > cpufreq_lowest_freq)
1514 min_freq = cpufreq_lowest_freq;
1517 /* from freq to min_freq */
1518 for (idx = 0; idx < *count && freq >= min_freq; idx++) {
1519 if (freq > sc->arm_min_freq)
1520 volts = sc->max_voltage_core;
1522 volts = sc->min_voltage_core;
1523 sets[idx].freq = freq;
1524 sets[idx].volts = volts;
1525 sets[idx].lat = TRANSITION_LATENCY;
1526 sets[idx].dev = dev;
1530 /* XXX RPi2 have only 900/600MHz */
1532 volts = sc->min_voltage_core;
1533 sets[idx].freq = freq;
1534 sets[idx].volts = volts;
1535 sets[idx].lat = TRANSITION_LATENCY;
1536 sets[idx].dev = dev;
1538 if (freq != min_freq) {
1539 sets[idx].freq = min_freq;
1540 sets[idx].volts = volts;
1541 sets[idx].lat = TRANSITION_LATENCY;
1542 sets[idx].dev = dev;
1552 bcm2835_cpufreq_settings(device_t dev, struct cf_setting *sets, int *count)
1554 struct bcm2835_cpufreq_softc *sc;
1556 if (sets == NULL || count == NULL)
1559 sc = device_get_softc(dev);
1560 if (sc->arm_min_freq < 0 || sc->arm_max_freq < 0) {
1561 printf("device is not configured\n");
1565 /* fill data with unknown value */
1566 memset(sets, CPUFREQ_VAL_UNKNOWN, sizeof(*sets) * (*count));
1567 /* create new array up to count */
1568 bcm2835_cpufreq_make_freq_list(dev, sets, count);
1574 bcm2835_cpufreq_type(device_t dev, int *type)
1579 *type = CPUFREQ_TYPE_ABSOLUTE;
1584 static device_method_t bcm2835_cpufreq_methods[] = {
1585 /* Device interface */
1586 DEVMETHOD(device_identify, bcm2835_cpufreq_identify),
1587 DEVMETHOD(device_probe, bcm2835_cpufreq_probe),
1588 DEVMETHOD(device_attach, bcm2835_cpufreq_attach),
1589 DEVMETHOD(device_detach, bcm2835_cpufreq_detach),
1591 /* cpufreq interface */
1592 DEVMETHOD(cpufreq_drv_set, bcm2835_cpufreq_set),
1593 DEVMETHOD(cpufreq_drv_get, bcm2835_cpufreq_get),
1594 DEVMETHOD(cpufreq_drv_settings, bcm2835_cpufreq_settings),
1595 DEVMETHOD(cpufreq_drv_type, bcm2835_cpufreq_type),
1600 static devclass_t bcm2835_cpufreq_devclass;
1601 static driver_t bcm2835_cpufreq_driver = {
1603 bcm2835_cpufreq_methods,
1604 sizeof(struct bcm2835_cpufreq_softc),
1607 DRIVER_MODULE(bcm2835_cpufreq, cpu, bcm2835_cpufreq_driver,
1608 bcm2835_cpufreq_devclass, 0, 0);
1609 MODULE_DEPEND(bcm2835_cpufreq, bcm2835_firmware, 1, 1, 1);