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1 /*-
2  * Copyright (C) 2013-2015 Daisuke Aoyama <aoyama@peach.ne.jp>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  *
26  */
27
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/bus.h>
34 #include <sys/cpu.h>
35 #include <sys/kernel.h>
36 #include <sys/lock.h>
37 #include <sys/malloc.h>
38 #include <sys/module.h>
39 #include <sys/mutex.h>
40 #include <sys/sema.h>
41 #include <sys/sysctl.h>
42
43 #include <machine/bus.h>
44 #include <machine/cpu.h>
45 #include <machine/intr.h>
46
47 #include <dev/ofw/ofw_bus.h>
48 #include <dev/ofw/ofw_bus_subr.h>
49
50 #include <arm/broadcom/bcm2835/bcm2835_mbox.h>
51 #include <arm/broadcom/bcm2835/bcm2835_mbox_prop.h>
52 #include <arm/broadcom/bcm2835/bcm2835_vcbus.h>
53
54 #include "cpufreq_if.h"
55 #include "mbox_if.h"
56
57 #ifdef DEBUG
58 #define DPRINTF(fmt, ...) do {                  \
59         printf("%s:%u: ", __func__, __LINE__);  \
60         printf(fmt, ##__VA_ARGS__);             \
61 } while (0)
62 #else
63 #define DPRINTF(fmt, ...)
64 #endif
65
66 #define HZ2MHZ(freq) ((freq) / (1000 * 1000))
67 #define MHZ2HZ(freq) ((freq) * (1000 * 1000))
68
69 #ifdef SOC_BCM2835
70 #define OFFSET2MVOLT(val) (1200 + ((val) * 25))
71 #define MVOLT2OFFSET(val) (((val) - 1200) / 25)
72 #define DEFAULT_ARM_FREQUENCY    700
73 #define DEFAULT_LOWEST_FREQ      300
74 #else
75 #define OFFSET2MVOLT(val) (((val) / 1000))
76 #define MVOLT2OFFSET(val) (((val) * 1000))
77 #define DEFAULT_ARM_FREQUENCY    600
78 #define DEFAULT_LOWEST_FREQ      600
79 #endif
80 #define DEFAULT_CORE_FREQUENCY   250
81 #define DEFAULT_SDRAM_FREQUENCY  400
82 #define TRANSITION_LATENCY      1000
83 #define MIN_OVER_VOLTAGE         -16
84 #define MAX_OVER_VOLTAGE           6
85 #define MSG_ERROR         -999999999
86 #define MHZSTEP                  100
87 #define HZSTEP     (MHZ2HZ(MHZSTEP))
88 #define TZ_ZEROC                2731
89
90 #define VC_LOCK(sc) do {                        \
91                 sema_wait(&vc_sema);            \
92         } while (0)
93 #define VC_UNLOCK(sc) do {                      \
94                 sema_post(&vc_sema);            \
95         } while (0)
96
97 /* ARM->VC mailbox property semaphore */
98 static struct sema vc_sema;
99
100 static struct sysctl_ctx_list bcm2835_sysctl_ctx;
101
102 struct bcm2835_cpufreq_softc {
103         device_t        dev;
104         int             arm_max_freq;
105         int             arm_min_freq;
106         int             core_max_freq;
107         int             core_min_freq;
108         int             sdram_max_freq;
109         int             sdram_min_freq;
110         int             max_voltage_core;
111         int             min_voltage_core;
112
113         /* the values written in mbox */
114         int             voltage_core;
115         int             voltage_sdram;
116         int             voltage_sdram_c;
117         int             voltage_sdram_i;
118         int             voltage_sdram_p;
119         int             turbo_mode;
120
121         /* initial hook for waiting mbox intr */
122         struct intr_config_hook init_hook;
123 };
124
125 static struct ofw_compat_data compat_data[] = {
126         { "broadcom,bcm2835-vc",        1 },
127         { "broadcom,bcm2708-vc",        1 },
128         { "brcm,bcm2709",       1 },
129         { "brcm,bcm2835",       1 },
130         { "brcm,bcm2836",       1 },
131         { "brcm,bcm2837",       1 },
132         { "brcm,bcm2711",       1 },
133         { NULL, 0 }
134 };
135
136 static int cpufreq_verbose = 0;
137 TUNABLE_INT("hw.bcm2835.cpufreq.verbose", &cpufreq_verbose);
138 static int cpufreq_lowest_freq = DEFAULT_LOWEST_FREQ;
139 TUNABLE_INT("hw.bcm2835.cpufreq.lowest_freq", &cpufreq_lowest_freq);
140
141 #ifdef PROP_DEBUG
142 static void
143 bcm2835_dump(const void *data, int len)
144 {
145         const uint8_t *p = (const uint8_t*)data;
146         int i;
147
148         printf("dump @ %p:\n", data);
149         for (i = 0; i < len; i++) {
150                 printf("%2.2x ", p[i]);
151                 if ((i % 4) == 3)
152                         printf(" ");
153                 if ((i % 16) == 15)
154                         printf("\n");
155         }
156         printf("\n");
157 }
158 #endif
159
160 static int
161 bcm2835_cpufreq_get_clock_rate(struct bcm2835_cpufreq_softc *sc,
162     uint32_t clock_id)
163 {
164         struct msg_get_clock_rate msg;
165         int rate;
166         int err;
167
168         /*
169          * Get clock rate
170          *   Tag: 0x00030002
171          *   Request:
172          *     Length: 4
173          *     Value:
174          *       u32: clock id
175          *   Response:
176          *     Length: 8
177          *     Value:
178          *       u32: clock id
179          *       u32: rate (in Hz)
180          */
181
182         /* setup single tag buffer */
183         memset(&msg, 0, sizeof(msg));
184         msg.hdr.buf_size = sizeof(msg);
185         msg.hdr.code = BCM2835_MBOX_CODE_REQ;
186         msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_CLOCK_RATE;
187         msg.tag_hdr.val_buf_size = sizeof(msg.body);
188         msg.tag_hdr.val_len = sizeof(msg.body.req);
189         msg.body.req.clock_id = clock_id;
190         msg.end_tag = 0;
191
192         /* call mailbox property */
193         err = bcm2835_mbox_property(&msg, sizeof(msg));
194         if (err) {
195                 device_printf(sc->dev, "can't get clock rate (id=%u)\n",
196                     clock_id);
197                 return (MSG_ERROR);
198         }
199
200         /* result (Hz) */
201         rate = (int)msg.body.resp.rate_hz;
202         DPRINTF("clock = %d(Hz)\n", rate);
203         return (rate);
204 }
205
206 static int
207 bcm2835_cpufreq_get_max_clock_rate(struct bcm2835_cpufreq_softc *sc,
208     uint32_t clock_id)
209 {
210         struct msg_get_max_clock_rate msg;
211         int rate;
212         int err;
213
214         /*
215          * Get max clock rate
216          *   Tag: 0x00030004
217          *   Request:
218          *     Length: 4
219          *     Value:
220          *       u32: clock id
221          *   Response:
222          *     Length: 8
223          *     Value:
224          *       u32: clock id
225          *       u32: rate (in Hz)
226          */
227
228         /* setup single tag buffer */
229         memset(&msg, 0, sizeof(msg));
230         msg.hdr.buf_size = sizeof(msg);
231         msg.hdr.code = BCM2835_MBOX_CODE_REQ;
232         msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MAX_CLOCK_RATE;
233         msg.tag_hdr.val_buf_size = sizeof(msg.body);
234         msg.tag_hdr.val_len = sizeof(msg.body.req);
235         msg.body.req.clock_id = clock_id;
236         msg.end_tag = 0;
237
238         /* call mailbox property */
239         err = bcm2835_mbox_property(&msg, sizeof(msg));
240         if (err) {
241                 device_printf(sc->dev, "can't get max clock rate (id=%u)\n",
242                     clock_id);
243                 return (MSG_ERROR);
244         }
245
246         /* result (Hz) */
247         rate = (int)msg.body.resp.rate_hz;
248         DPRINTF("clock = %d(Hz)\n", rate);
249         return (rate);
250 }
251
252 static int
253 bcm2835_cpufreq_get_min_clock_rate(struct bcm2835_cpufreq_softc *sc,
254     uint32_t clock_id)
255 {
256         struct msg_get_min_clock_rate msg;
257         int rate;
258         int err;
259
260         /*
261          * Get min clock rate
262          *   Tag: 0x00030007
263          *   Request:
264          *     Length: 4
265          *     Value:
266          *       u32: clock id
267          *   Response:
268          *     Length: 8
269          *     Value:
270          *       u32: clock id
271          *       u32: rate (in Hz)
272          */
273
274         /* setup single tag buffer */
275         memset(&msg, 0, sizeof(msg));
276         msg.hdr.buf_size = sizeof(msg);
277         msg.hdr.code = BCM2835_MBOX_CODE_REQ;
278         msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MIN_CLOCK_RATE;
279         msg.tag_hdr.val_buf_size = sizeof(msg.body);
280         msg.tag_hdr.val_len = sizeof(msg.body.req);
281         msg.body.req.clock_id = clock_id;
282         msg.end_tag = 0;
283
284         /* call mailbox property */
285         err = bcm2835_mbox_property(&msg, sizeof(msg));
286         if (err) {
287                 device_printf(sc->dev, "can't get min clock rate (id=%u)\n",
288                     clock_id);
289                 return (MSG_ERROR);
290         }
291
292         /* result (Hz) */
293         rate = (int)msg.body.resp.rate_hz;
294         DPRINTF("clock = %d(Hz)\n", rate);
295         return (rate);
296 }
297
298 static int
299 bcm2835_cpufreq_set_clock_rate(struct bcm2835_cpufreq_softc *sc,
300     uint32_t clock_id, uint32_t rate_hz)
301 {
302         struct msg_set_clock_rate msg;
303         int rate;
304         int err;
305
306         /*
307          * Set clock rate
308          *   Tag: 0x00038002
309          *   Request:
310          *     Length: 8
311          *     Value:
312          *       u32: clock id
313          *       u32: rate (in Hz)
314          *   Response:
315          *     Length: 8
316          *     Value:
317          *       u32: clock id
318          *       u32: rate (in Hz)
319          */
320
321         /* setup single tag buffer */
322         memset(&msg, 0, sizeof(msg));
323         msg.hdr.buf_size = sizeof(msg);
324         msg.hdr.code = BCM2835_MBOX_CODE_REQ;
325         msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_CLOCK_RATE;
326         msg.tag_hdr.val_buf_size = sizeof(msg.body);
327         msg.tag_hdr.val_len = sizeof(msg.body.req);
328         msg.body.req.clock_id = clock_id;
329         msg.body.req.rate_hz = rate_hz;
330         msg.end_tag = 0;
331
332         /* call mailbox property */
333         err = bcm2835_mbox_property(&msg, sizeof(msg));
334         if (err) {
335                 device_printf(sc->dev, "can't set clock rate (id=%u)\n",
336                     clock_id);
337                 return (MSG_ERROR);
338         }
339
340         /* workaround for core clock */
341         if (clock_id == BCM2835_MBOX_CLOCK_ID_CORE) {
342                 /* for safety (may change voltage without changing clock) */
343                 DELAY(TRANSITION_LATENCY);
344
345                 /*
346                  * XXX: the core clock is unable to change at once,
347                  * to change certainly, write it twice now.
348                  */
349
350                 /* setup single tag buffer */
351                 memset(&msg, 0, sizeof(msg));
352                 msg.hdr.buf_size = sizeof(msg);
353                 msg.hdr.code = BCM2835_MBOX_CODE_REQ;
354                 msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_CLOCK_RATE;
355                 msg.tag_hdr.val_buf_size = sizeof(msg.body);
356                 msg.tag_hdr.val_len = sizeof(msg.body.req);
357                 msg.body.req.clock_id = clock_id;
358                 msg.body.req.rate_hz = rate_hz;
359                 msg.end_tag = 0;
360
361                 /* call mailbox property */
362                 err = bcm2835_mbox_property(&msg, sizeof(msg));
363                 if (err) {
364                         device_printf(sc->dev,
365                             "can't set clock rate (id=%u)\n", clock_id);
366                         return (MSG_ERROR);
367                 }
368         }
369
370         /* result (Hz) */
371         rate = (int)msg.body.resp.rate_hz;
372         DPRINTF("clock = %d(Hz)\n", rate);
373         return (rate);
374 }
375
376 static int
377 bcm2835_cpufreq_get_turbo(struct bcm2835_cpufreq_softc *sc)
378 {
379         struct msg_get_turbo msg;
380         int level;
381         int err;
382
383         /*
384          * Get turbo
385          *   Tag: 0x00030009
386          *   Request:
387          *     Length: 4
388          *     Value:
389          *       u32: id
390          *   Response:
391          *     Length: 8
392          *     Value:
393          *       u32: id
394          *       u32: level
395          */
396
397         /* setup single tag buffer */
398         memset(&msg, 0, sizeof(msg));
399         msg.hdr.buf_size = sizeof(msg);
400         msg.hdr.code = BCM2835_MBOX_CODE_REQ;
401         msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_TURBO;
402         msg.tag_hdr.val_buf_size = sizeof(msg.body);
403         msg.tag_hdr.val_len = sizeof(msg.body.req);
404         msg.body.req.id = 0;
405         msg.end_tag = 0;
406
407         /* call mailbox property */
408         err = bcm2835_mbox_property(&msg, sizeof(msg));
409         if (err) {
410                 device_printf(sc->dev, "can't get turbo\n");
411                 return (MSG_ERROR);
412         }
413
414         /* result 0=non-turbo, 1=turbo */
415         level = (int)msg.body.resp.level;
416         DPRINTF("level = %d\n", level);
417         return (level);
418 }
419
420 static int
421 bcm2835_cpufreq_set_turbo(struct bcm2835_cpufreq_softc *sc, uint32_t level)
422 {
423         struct msg_set_turbo msg;
424         int value;
425         int err;
426
427         /*
428          * Set turbo
429          *   Tag: 0x00038009
430          *   Request:
431          *     Length: 8
432          *     Value:
433          *       u32: id
434          *       u32: level
435          *   Response:
436          *     Length: 8
437          *     Value:
438          *       u32: id
439          *       u32: level
440          */
441
442         /* replace unknown value to OFF */
443         if (level != BCM2835_MBOX_TURBO_ON && level != BCM2835_MBOX_TURBO_OFF)
444                 level = BCM2835_MBOX_TURBO_OFF;
445
446         /* setup single tag buffer */
447         memset(&msg, 0, sizeof(msg));
448         msg.hdr.buf_size = sizeof(msg);
449         msg.hdr.code = BCM2835_MBOX_CODE_REQ;
450         msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_TURBO;
451         msg.tag_hdr.val_buf_size = sizeof(msg.body);
452         msg.tag_hdr.val_len = sizeof(msg.body.req);
453         msg.body.req.id = 0;
454         msg.body.req.level = level;
455         msg.end_tag = 0;
456
457         /* call mailbox property */
458         err = bcm2835_mbox_property(&msg, sizeof(msg));
459         if (err) {
460                 device_printf(sc->dev, "can't set turbo\n");
461                 return (MSG_ERROR);
462         }
463
464         /* result 0=non-turbo, 1=turbo */
465         value = (int)msg.body.resp.level;
466         DPRINTF("level = %d\n", value);
467         return (value);
468 }
469
470 static int
471 bcm2835_cpufreq_get_voltage(struct bcm2835_cpufreq_softc *sc,
472     uint32_t voltage_id)
473 {
474         struct msg_get_voltage msg;
475         int value;
476         int err;
477
478         /*
479          * Get voltage
480          *   Tag: 0x00030003
481          *   Request:
482          *     Length: 4
483          *     Value:
484          *       u32: voltage id
485          *   Response:
486          *     Length: 8
487          *     Value:
488          *       u32: voltage id
489          *       u32: value (offset from 1.2V in units of 0.025V)
490          */
491
492         /* setup single tag buffer */
493         memset(&msg, 0, sizeof(msg));
494         msg.hdr.buf_size = sizeof(msg);
495         msg.hdr.code = BCM2835_MBOX_CODE_REQ;
496         msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_VOLTAGE;
497         msg.tag_hdr.val_buf_size = sizeof(msg.body);
498         msg.tag_hdr.val_len = sizeof(msg.body.req);
499         msg.body.req.voltage_id = voltage_id;
500         msg.end_tag = 0;
501
502         /* call mailbox property */
503         err = bcm2835_mbox_property(&msg, sizeof(msg));
504         if (err) {
505                 device_printf(sc->dev, "can't get voltage\n");
506                 return (MSG_ERROR);
507         }
508
509         /* result (offset from 1.2V) */
510         value = (int)msg.body.resp.value;
511         DPRINTF("value = %d\n", value);
512         return (value);
513 }
514
515 static int
516 bcm2835_cpufreq_get_max_voltage(struct bcm2835_cpufreq_softc *sc,
517     uint32_t voltage_id)
518 {
519         struct msg_get_max_voltage msg;
520         int value;
521         int err;
522
523         /*
524          * Get voltage
525          *   Tag: 0x00030005
526          *   Request:
527          *     Length: 4
528          *     Value:
529          *       u32: voltage id
530          *   Response:
531          *     Length: 8
532          *     Value:
533          *       u32: voltage id
534          *       u32: value (offset from 1.2V in units of 0.025V)
535          */
536
537         /* setup single tag buffer */
538         memset(&msg, 0, sizeof(msg));
539         msg.hdr.buf_size = sizeof(msg);
540         msg.hdr.code = BCM2835_MBOX_CODE_REQ;
541         msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MAX_VOLTAGE;
542         msg.tag_hdr.val_buf_size = sizeof(msg.body);
543         msg.tag_hdr.val_len = sizeof(msg.body.req);
544         msg.body.req.voltage_id = voltage_id;
545         msg.end_tag = 0;
546
547         /* call mailbox property */
548         err = bcm2835_mbox_property(&msg, sizeof(msg));
549         if (err) {
550                 device_printf(sc->dev, "can't get max voltage\n");
551                 return (MSG_ERROR);
552         }
553
554         /* result (offset from 1.2V) */
555         value = (int)msg.body.resp.value;
556         DPRINTF("value = %d\n", value);
557         return (value);
558 }
559 static int
560 bcm2835_cpufreq_get_min_voltage(struct bcm2835_cpufreq_softc *sc,
561     uint32_t voltage_id)
562 {
563         struct msg_get_min_voltage msg;
564         int value;
565         int err;
566
567         /*
568          * Get voltage
569          *   Tag: 0x00030008
570          *   Request:
571          *     Length: 4
572          *     Value:
573          *       u32: voltage id
574          *   Response:
575          *     Length: 8
576          *     Value:
577          *       u32: voltage id
578          *       u32: value (offset from 1.2V in units of 0.025V)
579          */
580
581         /* setup single tag buffer */
582         memset(&msg, 0, sizeof(msg));
583         msg.hdr.buf_size = sizeof(msg);
584         msg.hdr.code = BCM2835_MBOX_CODE_REQ;
585         msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MIN_VOLTAGE;
586         msg.tag_hdr.val_buf_size = sizeof(msg.body);
587         msg.tag_hdr.val_len = sizeof(msg.body.req);
588         msg.body.req.voltage_id = voltage_id;
589         msg.end_tag = 0;
590
591         /* call mailbox property */
592         err = bcm2835_mbox_property(&msg, sizeof(msg));
593         if (err) {
594                 device_printf(sc->dev, "can't get min voltage\n");
595                 return (MSG_ERROR);
596         }
597
598         /* result (offset from 1.2V) */
599         value = (int)msg.body.resp.value;
600         DPRINTF("value = %d\n", value);
601         return (value);
602 }
603
604 static int
605 bcm2835_cpufreq_set_voltage(struct bcm2835_cpufreq_softc *sc,
606     uint32_t voltage_id, int32_t value)
607 {
608         struct msg_set_voltage msg;
609         int err;
610
611         /*
612          * Set voltage
613          *   Tag: 0x00038003
614          *   Request:
615          *     Length: 4
616          *     Value:
617          *       u32: voltage id
618          *       u32: value (offset from 1.2V in units of 0.025V)
619          *   Response:
620          *     Length: 8
621          *     Value:
622          *       u32: voltage id
623          *       u32: value (offset from 1.2V in units of 0.025V)
624          */
625
626         /*
627          * over_voltage:
628          * 0 (1.2 V). Values above 6 are only allowed when force_turbo or
629          * current_limit_override are specified (which set the warranty bit).
630          */
631         if (value > MAX_OVER_VOLTAGE || value < MIN_OVER_VOLTAGE) {
632                 /* currently not supported */
633                 device_printf(sc->dev, "not supported voltage: %d\n", value);
634                 return (MSG_ERROR);
635         }
636
637         /* setup single tag buffer */
638         memset(&msg, 0, sizeof(msg));
639         msg.hdr.buf_size = sizeof(msg);
640         msg.hdr.code = BCM2835_MBOX_CODE_REQ;
641         msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_VOLTAGE;
642         msg.tag_hdr.val_buf_size = sizeof(msg.body);
643         msg.tag_hdr.val_len = sizeof(msg.body.req);
644         msg.body.req.voltage_id = voltage_id;
645         msg.body.req.value = (uint32_t)value;
646         msg.end_tag = 0;
647
648         /* call mailbox property */
649         err = bcm2835_mbox_property(&msg, sizeof(msg));
650         if (err) {
651                 device_printf(sc->dev, "can't set voltage\n");
652                 return (MSG_ERROR);
653         }
654
655         /* result (offset from 1.2V) */
656         value = (int)msg.body.resp.value;
657         DPRINTF("value = %d\n", value);
658         return (value);
659 }
660
661 static int
662 bcm2835_cpufreq_get_temperature(struct bcm2835_cpufreq_softc *sc)
663 {
664         struct msg_get_temperature msg;
665         int value;
666         int err;
667
668         /*
669          * Get temperature
670          *   Tag: 0x00030006
671          *   Request:
672          *     Length: 4
673          *     Value:
674          *       u32: temperature id
675          *   Response:
676          *     Length: 8
677          *     Value:
678          *       u32: temperature id
679          *       u32: value
680          */
681
682         /* setup single tag buffer */
683         memset(&msg, 0, sizeof(msg));
684         msg.hdr.buf_size = sizeof(msg);
685         msg.hdr.code = BCM2835_MBOX_CODE_REQ;
686         msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_TEMPERATURE;
687         msg.tag_hdr.val_buf_size = sizeof(msg.body);
688         msg.tag_hdr.val_len = sizeof(msg.body.req);
689         msg.body.req.temperature_id = 0;
690         msg.end_tag = 0;
691
692         /* call mailbox property */
693         err = bcm2835_mbox_property(&msg, sizeof(msg));
694         if (err) {
695                 device_printf(sc->dev, "can't get temperature\n");
696                 return (MSG_ERROR);
697         }
698
699         /* result (temperature of degree C) */
700         value = (int)msg.body.resp.value;
701         DPRINTF("value = %d\n", value);
702         return (value);
703 }
704
705
706
707 static int
708 sysctl_bcm2835_cpufreq_arm_freq(SYSCTL_HANDLER_ARGS)
709 {
710         struct bcm2835_cpufreq_softc *sc = arg1;
711         int val;
712         int err;
713
714         /* get realtime value */
715         VC_LOCK(sc);
716         val = bcm2835_cpufreq_get_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM);
717         VC_UNLOCK(sc);
718         if (val == MSG_ERROR)
719                 return (EIO);
720
721         err = sysctl_handle_int(oidp, &val, 0, req);
722         if (err || !req->newptr) /* error || read request */
723                 return (err);
724
725         /* write request */
726         VC_LOCK(sc);
727         err = bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM,
728             val);
729         VC_UNLOCK(sc);
730         if (err == MSG_ERROR) {
731                 device_printf(sc->dev, "set clock arm_freq error\n");
732                 return (EIO);
733         }
734         DELAY(TRANSITION_LATENCY);
735
736         return (0);
737 }
738
739 static int
740 sysctl_bcm2835_cpufreq_core_freq(SYSCTL_HANDLER_ARGS)
741 {
742         struct bcm2835_cpufreq_softc *sc = arg1;
743         int val;
744         int err;
745
746         /* get realtime value */
747         VC_LOCK(sc);
748         val = bcm2835_cpufreq_get_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE);
749         VC_UNLOCK(sc);
750         if (val == MSG_ERROR)
751                 return (EIO);
752
753         err = sysctl_handle_int(oidp, &val, 0, req);
754         if (err || !req->newptr) /* error || read request */
755                 return (err);
756
757         /* write request */
758         VC_LOCK(sc);
759         err = bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE,
760             val);
761         if (err == MSG_ERROR) {
762                 VC_UNLOCK(sc);
763                 device_printf(sc->dev, "set clock core_freq error\n");
764                 return (EIO);
765         }
766         VC_UNLOCK(sc);
767         DELAY(TRANSITION_LATENCY);
768
769         return (0);
770 }
771
772 static int
773 sysctl_bcm2835_cpufreq_sdram_freq(SYSCTL_HANDLER_ARGS)
774 {
775         struct bcm2835_cpufreq_softc *sc = arg1;
776         int val;
777         int err;
778
779         /* get realtime value */
780         VC_LOCK(sc);
781         val = bcm2835_cpufreq_get_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_SDRAM);
782         VC_UNLOCK(sc);
783         if (val == MSG_ERROR)
784                 return (EIO);
785
786         err = sysctl_handle_int(oidp, &val, 0, req);
787         if (err || !req->newptr) /* error || read request */
788                 return (err);
789
790         /* write request */
791         VC_LOCK(sc);
792         err = bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_SDRAM,
793             val);
794         VC_UNLOCK(sc);
795         if (err == MSG_ERROR) {
796                 device_printf(sc->dev, "set clock sdram_freq error\n");
797                 return (EIO);
798         }
799         DELAY(TRANSITION_LATENCY);
800
801         return (0);
802 }
803
804 static int
805 sysctl_bcm2835_cpufreq_turbo(SYSCTL_HANDLER_ARGS)
806 {
807         struct bcm2835_cpufreq_softc *sc = arg1;
808         int val;
809         int err;
810
811         /* get realtime value */
812         VC_LOCK(sc);
813         val = bcm2835_cpufreq_get_turbo(sc);
814         VC_UNLOCK(sc);
815         if (val == MSG_ERROR)
816                 return (EIO);
817
818         err = sysctl_handle_int(oidp, &val, 0, req);
819         if (err || !req->newptr) /* error || read request */
820                 return (err);
821
822         /* write request */
823         if (val > 0)
824                 sc->turbo_mode = BCM2835_MBOX_TURBO_ON;
825         else
826                 sc->turbo_mode = BCM2835_MBOX_TURBO_OFF;
827
828         VC_LOCK(sc);
829         err = bcm2835_cpufreq_set_turbo(sc, sc->turbo_mode);
830         VC_UNLOCK(sc);
831         if (err == MSG_ERROR) {
832                 device_printf(sc->dev, "set turbo error\n");
833                 return (EIO);
834         }
835         DELAY(TRANSITION_LATENCY);
836
837         return (0);
838 }
839
840 static int
841 sysctl_bcm2835_cpufreq_voltage_core(SYSCTL_HANDLER_ARGS)
842 {
843         struct bcm2835_cpufreq_softc *sc = arg1;
844         int val;
845         int err;
846
847         /* get realtime value */
848         VC_LOCK(sc);
849         val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_CORE);
850         VC_UNLOCK(sc);
851         if (val == MSG_ERROR)
852                 return (EIO);
853
854         err = sysctl_handle_int(oidp, &val, 0, req);
855         if (err || !req->newptr) /* error || read request */
856                 return (err);
857
858         /* write request */
859         if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
860                 return (EINVAL);
861         sc->voltage_core = val;
862
863         VC_LOCK(sc);
864         err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_CORE,
865             sc->voltage_core);
866         VC_UNLOCK(sc);
867         if (err == MSG_ERROR) {
868                 device_printf(sc->dev, "set voltage core error\n");
869                 return (EIO);
870         }
871         DELAY(TRANSITION_LATENCY);
872
873         return (0);
874 }
875
876 static int
877 sysctl_bcm2835_cpufreq_voltage_sdram_c(SYSCTL_HANDLER_ARGS)
878 {
879         struct bcm2835_cpufreq_softc *sc = arg1;
880         int val;
881         int err;
882
883         /* get realtime value */
884         VC_LOCK(sc);
885         val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_C);
886         VC_UNLOCK(sc);
887         if (val == MSG_ERROR)
888                 return (EIO);
889
890         err = sysctl_handle_int(oidp, &val, 0, req);
891         if (err || !req->newptr) /* error || read request */
892                 return (err);
893
894         /* write request */
895         if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
896                 return (EINVAL);
897         sc->voltage_sdram_c = val;
898
899         VC_LOCK(sc);
900         err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_C,
901            sc->voltage_sdram_c);
902         VC_UNLOCK(sc);
903         if (err == MSG_ERROR) {
904                 device_printf(sc->dev, "set voltage sdram_c error\n");
905                 return (EIO);
906         }
907         DELAY(TRANSITION_LATENCY);
908
909         return (0);
910 }
911
912 static int
913 sysctl_bcm2835_cpufreq_voltage_sdram_i(SYSCTL_HANDLER_ARGS)
914 {
915         struct bcm2835_cpufreq_softc *sc = arg1;
916         int val;
917         int err;
918
919         /* get realtime value */
920         VC_LOCK(sc);
921         val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_I);
922         VC_UNLOCK(sc);
923         if (val == MSG_ERROR)
924                 return (EIO);
925
926         err = sysctl_handle_int(oidp, &val, 0, req);
927         if (err || !req->newptr) /* error || read request */
928                 return (err);
929
930         /* write request */
931         if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
932                 return (EINVAL);
933         sc->voltage_sdram_i = val;
934
935         VC_LOCK(sc);
936         err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_I,
937             sc->voltage_sdram_i);
938         VC_UNLOCK(sc);
939         if (err == MSG_ERROR) {
940                 device_printf(sc->dev, "set voltage sdram_i error\n");
941                 return (EIO);
942         }
943         DELAY(TRANSITION_LATENCY);
944
945         return (0);
946 }
947
948 static int
949 sysctl_bcm2835_cpufreq_voltage_sdram_p(SYSCTL_HANDLER_ARGS)
950 {
951         struct bcm2835_cpufreq_softc *sc = arg1;
952         int val;
953         int err;
954
955         /* get realtime value */
956         VC_LOCK(sc);
957         val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_P);
958         VC_UNLOCK(sc);
959         if (val == MSG_ERROR)
960                 return (EIO);
961
962         err = sysctl_handle_int(oidp, &val, 0, req);
963         if (err || !req->newptr) /* error || read request */
964                 return (err);
965
966         /* write request */
967         if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
968                 return (EINVAL);
969         sc->voltage_sdram_p = val;
970
971         VC_LOCK(sc);
972         err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_P,
973             sc->voltage_sdram_p);
974         VC_UNLOCK(sc);
975         if (err == MSG_ERROR) {
976                 device_printf(sc->dev, "set voltage sdram_p error\n");
977                 return (EIO);
978         }
979         DELAY(TRANSITION_LATENCY);
980
981         return (0);
982 }
983
984 static int
985 sysctl_bcm2835_cpufreq_voltage_sdram(SYSCTL_HANDLER_ARGS)
986 {
987         struct bcm2835_cpufreq_softc *sc = arg1;
988         int val;
989         int err;
990
991         /* multiple write only */
992         if (!req->newptr)
993                 return (EINVAL);
994         val = 0;
995         err = sysctl_handle_int(oidp, &val, 0, req);
996         if (err)
997                 return (err);
998
999         /* write request */
1000         if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
1001                 return (EINVAL);
1002         sc->voltage_sdram = val;
1003
1004         VC_LOCK(sc);
1005         err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_C,
1006             val);
1007         if (err == MSG_ERROR) {
1008                 VC_UNLOCK(sc);
1009                 device_printf(sc->dev, "set voltage sdram_c error\n");
1010                 return (EIO);
1011         }
1012         err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_I,
1013             val);
1014         if (err == MSG_ERROR) {
1015                 VC_UNLOCK(sc);
1016                 device_printf(sc->dev, "set voltage sdram_i error\n");
1017                 return (EIO);
1018         }
1019         err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_P,
1020             val);
1021         if (err == MSG_ERROR) {
1022                 VC_UNLOCK(sc);
1023                 device_printf(sc->dev, "set voltage sdram_p error\n");
1024                 return (EIO);
1025         }
1026         VC_UNLOCK(sc);
1027         DELAY(TRANSITION_LATENCY);
1028
1029         return (0);
1030 }
1031
1032 static int
1033 sysctl_bcm2835_cpufreq_temperature(SYSCTL_HANDLER_ARGS)
1034 {
1035         struct bcm2835_cpufreq_softc *sc = arg1;
1036         int val;
1037         int err;
1038
1039         /* get realtime value */
1040         VC_LOCK(sc);
1041         val = bcm2835_cpufreq_get_temperature(sc);
1042         VC_UNLOCK(sc);
1043         if (val == MSG_ERROR)
1044                 return (EIO);
1045
1046         err = sysctl_handle_int(oidp, &val, 0, req);
1047         if (err || !req->newptr) /* error || read request */
1048                 return (err);
1049
1050         /* write request */
1051         return (EINVAL);
1052 }
1053
1054 static int
1055 sysctl_bcm2835_devcpu_temperature(SYSCTL_HANDLER_ARGS)
1056 {
1057         struct bcm2835_cpufreq_softc *sc = arg1;
1058         int val;
1059         int err;
1060
1061         /* get realtime value */
1062         VC_LOCK(sc);
1063         val = bcm2835_cpufreq_get_temperature(sc);
1064         VC_UNLOCK(sc);
1065         if (val == MSG_ERROR)
1066                 return (EIO);
1067
1068         /* 1/1000 celsius (raw) to 1/10 kelvin */
1069         val = val / 100 + TZ_ZEROC;
1070
1071         err = sysctl_handle_int(oidp, &val, 0, req);
1072         if (err || !req->newptr) /* error || read request */
1073                 return (err);
1074
1075         /* write request */
1076         return (EINVAL);
1077 }
1078
1079
1080 static void
1081 bcm2835_cpufreq_init(void *arg)
1082 {
1083         struct bcm2835_cpufreq_softc *sc = arg;
1084         struct sysctl_ctx_list *ctx;
1085         device_t cpu;
1086         int arm_freq, core_freq, sdram_freq;
1087         int arm_max_freq, arm_min_freq, core_max_freq, core_min_freq;
1088         int sdram_max_freq, sdram_min_freq;
1089         int voltage_core, voltage_sdram_c, voltage_sdram_i, voltage_sdram_p;
1090         int max_voltage_core, min_voltage_core;
1091         int max_voltage_sdram_c, min_voltage_sdram_c;
1092         int max_voltage_sdram_i, min_voltage_sdram_i;
1093         int max_voltage_sdram_p, min_voltage_sdram_p;
1094         int turbo, temperature;
1095
1096         VC_LOCK(sc);
1097
1098         /* current clock */
1099         arm_freq = bcm2835_cpufreq_get_clock_rate(sc,
1100             BCM2835_MBOX_CLOCK_ID_ARM);
1101         core_freq = bcm2835_cpufreq_get_clock_rate(sc,
1102             BCM2835_MBOX_CLOCK_ID_CORE);
1103         sdram_freq = bcm2835_cpufreq_get_clock_rate(sc,
1104             BCM2835_MBOX_CLOCK_ID_SDRAM);
1105
1106         /* max/min clock */
1107         arm_max_freq = bcm2835_cpufreq_get_max_clock_rate(sc,
1108             BCM2835_MBOX_CLOCK_ID_ARM);
1109         arm_min_freq = bcm2835_cpufreq_get_min_clock_rate(sc,
1110             BCM2835_MBOX_CLOCK_ID_ARM);
1111         core_max_freq = bcm2835_cpufreq_get_max_clock_rate(sc,
1112             BCM2835_MBOX_CLOCK_ID_CORE);
1113         core_min_freq = bcm2835_cpufreq_get_min_clock_rate(sc,
1114             BCM2835_MBOX_CLOCK_ID_CORE);
1115         sdram_max_freq = bcm2835_cpufreq_get_max_clock_rate(sc,
1116             BCM2835_MBOX_CLOCK_ID_SDRAM);
1117         sdram_min_freq = bcm2835_cpufreq_get_min_clock_rate(sc,
1118             BCM2835_MBOX_CLOCK_ID_SDRAM);
1119
1120         /* turbo mode */
1121         turbo = bcm2835_cpufreq_get_turbo(sc);
1122         if (turbo > 0)
1123                 sc->turbo_mode = BCM2835_MBOX_TURBO_ON;
1124         else
1125                 sc->turbo_mode = BCM2835_MBOX_TURBO_OFF;
1126
1127         /* voltage */
1128         voltage_core = bcm2835_cpufreq_get_voltage(sc,
1129             BCM2835_MBOX_VOLTAGE_ID_CORE);
1130         voltage_sdram_c = bcm2835_cpufreq_get_voltage(sc,
1131             BCM2835_MBOX_VOLTAGE_ID_SDRAM_C);
1132         voltage_sdram_i = bcm2835_cpufreq_get_voltage(sc,
1133             BCM2835_MBOX_VOLTAGE_ID_SDRAM_I);
1134         voltage_sdram_p = bcm2835_cpufreq_get_voltage(sc,
1135             BCM2835_MBOX_VOLTAGE_ID_SDRAM_P);
1136
1137         /* current values (offset from 1.2V) */
1138         sc->voltage_core = voltage_core;
1139         sc->voltage_sdram = voltage_sdram_c;
1140         sc->voltage_sdram_c = voltage_sdram_c;
1141         sc->voltage_sdram_i = voltage_sdram_i;
1142         sc->voltage_sdram_p = voltage_sdram_p;
1143
1144         /* max/min voltage */
1145         max_voltage_core = bcm2835_cpufreq_get_max_voltage(sc,
1146             BCM2835_MBOX_VOLTAGE_ID_CORE);
1147         min_voltage_core = bcm2835_cpufreq_get_min_voltage(sc,
1148             BCM2835_MBOX_VOLTAGE_ID_CORE);
1149         max_voltage_sdram_c = bcm2835_cpufreq_get_max_voltage(sc,
1150             BCM2835_MBOX_VOLTAGE_ID_SDRAM_C);
1151         max_voltage_sdram_i = bcm2835_cpufreq_get_max_voltage(sc,
1152             BCM2835_MBOX_VOLTAGE_ID_SDRAM_I);
1153         max_voltage_sdram_p = bcm2835_cpufreq_get_max_voltage(sc,
1154             BCM2835_MBOX_VOLTAGE_ID_SDRAM_P);
1155         min_voltage_sdram_c = bcm2835_cpufreq_get_min_voltage(sc,
1156             BCM2835_MBOX_VOLTAGE_ID_SDRAM_C);
1157         min_voltage_sdram_i = bcm2835_cpufreq_get_min_voltage(sc,
1158             BCM2835_MBOX_VOLTAGE_ID_SDRAM_I);
1159         min_voltage_sdram_p = bcm2835_cpufreq_get_min_voltage(sc,
1160             BCM2835_MBOX_VOLTAGE_ID_SDRAM_P);
1161
1162         /* temperature */
1163         temperature = bcm2835_cpufreq_get_temperature(sc);
1164
1165         /* show result */
1166         if (cpufreq_verbose || bootverbose) {
1167                 device_printf(sc->dev, "Boot settings:\n");
1168                 device_printf(sc->dev,
1169                     "current ARM %dMHz, Core %dMHz, SDRAM %dMHz, Turbo %s\n",
1170                     HZ2MHZ(arm_freq), HZ2MHZ(core_freq), HZ2MHZ(sdram_freq),
1171                     (sc->turbo_mode == BCM2835_MBOX_TURBO_ON) ? "ON" : "OFF");
1172
1173                 device_printf(sc->dev,
1174                     "max/min ARM %d/%dMHz, Core %d/%dMHz, SDRAM %d/%dMHz\n",
1175                     HZ2MHZ(arm_max_freq), HZ2MHZ(arm_min_freq),
1176                     HZ2MHZ(core_max_freq), HZ2MHZ(core_min_freq),
1177                     HZ2MHZ(sdram_max_freq), HZ2MHZ(sdram_min_freq));
1178
1179                 device_printf(sc->dev,
1180                     "current Core %dmV, SDRAM_C %dmV, SDRAM_I %dmV, "
1181                     "SDRAM_P %dmV\n",
1182                     OFFSET2MVOLT(voltage_core), OFFSET2MVOLT(voltage_sdram_c),
1183                     OFFSET2MVOLT(voltage_sdram_i), 
1184                     OFFSET2MVOLT(voltage_sdram_p));
1185
1186                 device_printf(sc->dev,
1187                     "max/min Core %d/%dmV, SDRAM_C %d/%dmV, SDRAM_I %d/%dmV, "
1188                     "SDRAM_P %d/%dmV\n",
1189                     OFFSET2MVOLT(max_voltage_core),
1190                     OFFSET2MVOLT(min_voltage_core),
1191                     OFFSET2MVOLT(max_voltage_sdram_c),
1192                     OFFSET2MVOLT(min_voltage_sdram_c),
1193                     OFFSET2MVOLT(max_voltage_sdram_i),
1194                     OFFSET2MVOLT(min_voltage_sdram_i),
1195                     OFFSET2MVOLT(max_voltage_sdram_p),
1196                     OFFSET2MVOLT(min_voltage_sdram_p));
1197
1198                 device_printf(sc->dev,
1199                     "Temperature %d.%dC\n", (temperature / 1000),
1200                     (temperature % 1000) / 100);
1201         } else { /* !cpufreq_verbose && !bootverbose */
1202                 device_printf(sc->dev,
1203                     "ARM %dMHz, Core %dMHz, SDRAM %dMHz, Turbo %s\n",
1204                     HZ2MHZ(arm_freq), HZ2MHZ(core_freq), HZ2MHZ(sdram_freq),
1205                     (sc->turbo_mode == BCM2835_MBOX_TURBO_ON) ? "ON" : "OFF");
1206         }
1207
1208         /* keep in softc (MHz/mV) */
1209         sc->arm_max_freq = HZ2MHZ(arm_max_freq);
1210         sc->arm_min_freq = HZ2MHZ(arm_min_freq);
1211         sc->core_max_freq = HZ2MHZ(core_max_freq);
1212         sc->core_min_freq = HZ2MHZ(core_min_freq);
1213         sc->sdram_max_freq = HZ2MHZ(sdram_max_freq);
1214         sc->sdram_min_freq = HZ2MHZ(sdram_min_freq);
1215         sc->max_voltage_core = OFFSET2MVOLT(max_voltage_core);
1216         sc->min_voltage_core = OFFSET2MVOLT(min_voltage_core);
1217
1218         /* if turbo is on, set to max values */
1219         if (sc->turbo_mode == BCM2835_MBOX_TURBO_ON) {
1220                 bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM,
1221                     arm_max_freq);
1222                 DELAY(TRANSITION_LATENCY);
1223                 bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE,
1224                     core_max_freq);
1225                 DELAY(TRANSITION_LATENCY);
1226                 bcm2835_cpufreq_set_clock_rate(sc,
1227                     BCM2835_MBOX_CLOCK_ID_SDRAM, sdram_max_freq);
1228                 DELAY(TRANSITION_LATENCY);
1229         } else {
1230                 bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM,
1231                     arm_min_freq);
1232                 DELAY(TRANSITION_LATENCY);
1233                 bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE,
1234                     core_min_freq);
1235                 DELAY(TRANSITION_LATENCY);
1236                 bcm2835_cpufreq_set_clock_rate(sc,
1237                     BCM2835_MBOX_CLOCK_ID_SDRAM, sdram_min_freq);
1238                 DELAY(TRANSITION_LATENCY);
1239         }
1240
1241         VC_UNLOCK(sc);
1242
1243         /* add human readable temperature to dev.cpu node */
1244         cpu = device_get_parent(sc->dev);
1245         if (cpu != NULL) {
1246                 ctx = device_get_sysctl_ctx(cpu);
1247                 SYSCTL_ADD_PROC(ctx,
1248                     SYSCTL_CHILDREN(device_get_sysctl_tree(cpu)), OID_AUTO,
1249                     "temperature",
1250                     CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, sc, 0,
1251                     sysctl_bcm2835_devcpu_temperature, "IK",
1252                     "Current SoC temperature");
1253         }
1254
1255         /* release this hook (continue boot) */
1256         config_intrhook_disestablish(&sc->init_hook);
1257 }
1258
1259 static void
1260 bcm2835_cpufreq_identify(driver_t *driver, device_t parent)
1261 {
1262         const struct ofw_compat_data *compat;
1263         phandle_t root;
1264
1265         root = OF_finddevice("/");
1266         for (compat = compat_data; compat->ocd_str != NULL; compat++)
1267                 if (ofw_bus_node_is_compatible(root, compat->ocd_str))
1268                         break;
1269
1270         if (compat->ocd_data == 0)
1271                 return;
1272
1273         DPRINTF("driver=%p, parent=%p\n", driver, parent);
1274         if (device_find_child(parent, "bcm2835_cpufreq", -1) != NULL)
1275                 return;
1276         if (BUS_ADD_CHILD(parent, 0, "bcm2835_cpufreq", -1) == NULL)
1277                 device_printf(parent, "add child failed\n");
1278 }
1279
1280 static int
1281 bcm2835_cpufreq_probe(device_t dev)
1282 {
1283
1284         if (device_get_unit(dev) != 0)
1285                 return (ENXIO);
1286         device_set_desc(dev, "CPU Frequency Control");
1287
1288         return (0);
1289 }
1290
1291 static int
1292 bcm2835_cpufreq_attach(device_t dev)
1293 {
1294         struct bcm2835_cpufreq_softc *sc;
1295         struct sysctl_oid *oid;
1296
1297         /* set self dev */
1298         sc = device_get_softc(dev);
1299         sc->dev = dev;
1300
1301         /* initial values */
1302         sc->arm_max_freq = -1;
1303         sc->arm_min_freq = -1;
1304         sc->core_max_freq = -1;
1305         sc->core_min_freq = -1;
1306         sc->sdram_max_freq = -1;
1307         sc->sdram_min_freq = -1;
1308         sc->max_voltage_core = 0;
1309         sc->min_voltage_core = 0;
1310
1311         /* setup sysctl at first device */
1312         if (device_get_unit(dev) == 0) {
1313                 sysctl_ctx_init(&bcm2835_sysctl_ctx);
1314                 /* create node for hw.cpufreq */
1315                 oid = SYSCTL_ADD_NODE(&bcm2835_sysctl_ctx,
1316                     SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO, "cpufreq",
1317                     CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "");
1318
1319                 /* Frequency (Hz) */
1320                 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1321                     OID_AUTO, "arm_freq",
1322                     CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
1323                     sysctl_bcm2835_cpufreq_arm_freq, "IU",
1324                     "ARM frequency (Hz)");
1325                 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1326                     OID_AUTO, "core_freq",
1327                     CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
1328                     sysctl_bcm2835_cpufreq_core_freq, "IU",
1329                     "Core frequency (Hz)");
1330                 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1331                     OID_AUTO, "sdram_freq",
1332                     CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
1333                     sysctl_bcm2835_cpufreq_sdram_freq, "IU",
1334                     "SDRAM frequency (Hz)");
1335
1336                 /* Turbo state */
1337                 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1338                     OID_AUTO, "turbo",
1339                     CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
1340                     sysctl_bcm2835_cpufreq_turbo, "IU",
1341                     "Disables dynamic clocking");
1342
1343                 /* Voltage (offset from 1.2V in units of 0.025V) */
1344                 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1345                     OID_AUTO, "voltage_core",
1346                     CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
1347                     sysctl_bcm2835_cpufreq_voltage_core, "I",
1348                     "ARM/GPU core voltage"
1349                     "(offset from 1.2V in units of 0.025V)");
1350                 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1351                     OID_AUTO, "voltage_sdram",
1352                     CTLTYPE_INT | CTLFLAG_WR | CTLFLAG_NEEDGIANT, sc,
1353                     0, sysctl_bcm2835_cpufreq_voltage_sdram, "I",
1354                     "SDRAM voltage (offset from 1.2V in units of 0.025V)");
1355
1356                 /* Voltage individual SDRAM */
1357                 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1358                     OID_AUTO, "voltage_sdram_c",
1359                     CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc,
1360                     0, sysctl_bcm2835_cpufreq_voltage_sdram_c, "I",
1361                     "SDRAM controller voltage"
1362                     "(offset from 1.2V in units of 0.025V)");
1363                 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1364                     OID_AUTO, "voltage_sdram_i",
1365                     CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc,
1366                     0, sysctl_bcm2835_cpufreq_voltage_sdram_i, "I",
1367                     "SDRAM I/O voltage (offset from 1.2V in units of 0.025V)");
1368                 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1369                     OID_AUTO, "voltage_sdram_p",
1370                     CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc,
1371                     0, sysctl_bcm2835_cpufreq_voltage_sdram_p, "I",
1372                     "SDRAM phy voltage (offset from 1.2V in units of 0.025V)");
1373
1374                 /* Temperature */
1375                 SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid),
1376                     OID_AUTO, "temperature",
1377                     CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, sc, 0,
1378                     sysctl_bcm2835_cpufreq_temperature, "I",
1379                     "SoC temperature (thousandths of a degree C)");
1380         }
1381
1382         /* ARM->VC lock */
1383         sema_init(&vc_sema, 1, "vcsema");
1384
1385         /* register callback for using mbox when interrupts are enabled */
1386         sc->init_hook.ich_func = bcm2835_cpufreq_init;
1387         sc->init_hook.ich_arg = sc;
1388
1389         if (config_intrhook_establish(&sc->init_hook) != 0) {
1390                 device_printf(dev, "config_intrhook_establish failed\n");
1391                 return (ENOMEM);
1392         }
1393
1394         /* this device is controlled by cpufreq(4) */
1395         cpufreq_register(dev);
1396
1397         return (0);
1398 }
1399
1400 static int
1401 bcm2835_cpufreq_detach(device_t dev)
1402 {
1403
1404         sema_destroy(&vc_sema);
1405
1406         return (cpufreq_unregister(dev));
1407 }
1408
1409 static int
1410 bcm2835_cpufreq_set(device_t dev, const struct cf_setting *cf)
1411 {
1412         struct bcm2835_cpufreq_softc *sc;
1413         uint32_t rate_hz, rem;
1414         int resp_freq, arm_freq, min_freq, core_freq;
1415 #ifdef DEBUG
1416         int cur_freq;
1417 #endif
1418
1419         if (cf == NULL || cf->freq < 0)
1420                 return (EINVAL);
1421
1422         sc = device_get_softc(dev);
1423
1424         /* setting clock (Hz) */
1425         rate_hz = (uint32_t)MHZ2HZ(cf->freq);
1426         rem = rate_hz % HZSTEP;
1427         rate_hz -= rem;
1428         if (rate_hz == 0)
1429                 return (EINVAL);
1430
1431         /* adjust min freq */
1432         min_freq = sc->arm_min_freq;
1433         if (sc->turbo_mode != BCM2835_MBOX_TURBO_ON)
1434                 if (min_freq > cpufreq_lowest_freq)
1435                         min_freq = cpufreq_lowest_freq;
1436
1437         if (rate_hz < MHZ2HZ(min_freq) || rate_hz > MHZ2HZ(sc->arm_max_freq))
1438                 return (EINVAL);
1439
1440         /* set new value and verify it */
1441         VC_LOCK(sc);
1442 #ifdef DEBUG
1443         cur_freq = bcm2835_cpufreq_get_clock_rate(sc,
1444             BCM2835_MBOX_CLOCK_ID_ARM);
1445 #endif
1446         resp_freq = bcm2835_cpufreq_set_clock_rate(sc,
1447             BCM2835_MBOX_CLOCK_ID_ARM, rate_hz);
1448         DELAY(TRANSITION_LATENCY);
1449         arm_freq = bcm2835_cpufreq_get_clock_rate(sc,
1450             BCM2835_MBOX_CLOCK_ID_ARM);
1451
1452         /*
1453          * if non-turbo and lower than or equal min_freq,
1454          * clock down core and sdram to default first.
1455          */
1456         if (sc->turbo_mode != BCM2835_MBOX_TURBO_ON) {
1457                 core_freq = bcm2835_cpufreq_get_clock_rate(sc,
1458                     BCM2835_MBOX_CLOCK_ID_CORE);
1459                 if (rate_hz > MHZ2HZ(sc->arm_min_freq)) {
1460                         bcm2835_cpufreq_set_clock_rate(sc,
1461                             BCM2835_MBOX_CLOCK_ID_CORE,
1462                             MHZ2HZ(sc->core_max_freq));
1463                         DELAY(TRANSITION_LATENCY);
1464                         bcm2835_cpufreq_set_clock_rate(sc,
1465                             BCM2835_MBOX_CLOCK_ID_SDRAM,
1466                             MHZ2HZ(sc->sdram_max_freq));
1467                         DELAY(TRANSITION_LATENCY);
1468                 } else {
1469                         if (sc->core_min_freq < DEFAULT_CORE_FREQUENCY &&
1470                             core_freq > DEFAULT_CORE_FREQUENCY) {
1471                                 /* first, down to 250, then down to min */
1472                                 DELAY(TRANSITION_LATENCY);
1473                                 bcm2835_cpufreq_set_clock_rate(sc,
1474                                     BCM2835_MBOX_CLOCK_ID_CORE,
1475                                     MHZ2HZ(DEFAULT_CORE_FREQUENCY));
1476                                 DELAY(TRANSITION_LATENCY);
1477                                 /* reset core voltage */
1478                                 bcm2835_cpufreq_set_voltage(sc,
1479                                     BCM2835_MBOX_VOLTAGE_ID_CORE, 0);
1480                                 DELAY(TRANSITION_LATENCY);
1481                         }
1482                         bcm2835_cpufreq_set_clock_rate(sc,
1483                             BCM2835_MBOX_CLOCK_ID_CORE,
1484                             MHZ2HZ(sc->core_min_freq));
1485                         DELAY(TRANSITION_LATENCY);
1486                         bcm2835_cpufreq_set_clock_rate(sc,
1487                             BCM2835_MBOX_CLOCK_ID_SDRAM,
1488                             MHZ2HZ(sc->sdram_min_freq));
1489                         DELAY(TRANSITION_LATENCY);
1490                 }
1491         }
1492
1493         VC_UNLOCK(sc);
1494
1495         if (resp_freq < 0 || arm_freq < 0 || resp_freq != arm_freq) {
1496                 device_printf(dev, "wrong freq\n");
1497                 return (EIO);
1498         }
1499         DPRINTF("cpufreq: %d -> %d\n", cur_freq, arm_freq);
1500
1501         return (0);
1502 }
1503
1504 static int
1505 bcm2835_cpufreq_get(device_t dev, struct cf_setting *cf)
1506 {
1507         struct bcm2835_cpufreq_softc *sc;
1508         int arm_freq;
1509
1510         if (cf == NULL)
1511                 return (EINVAL);
1512
1513         sc = device_get_softc(dev);
1514         memset(cf, CPUFREQ_VAL_UNKNOWN, sizeof(*cf));
1515         cf->dev = NULL;
1516
1517         /* get cuurent value */
1518         VC_LOCK(sc);
1519         arm_freq = bcm2835_cpufreq_get_clock_rate(sc,
1520             BCM2835_MBOX_CLOCK_ID_ARM);
1521         VC_UNLOCK(sc);
1522         if (arm_freq < 0) {
1523                 device_printf(dev, "can't get clock\n");
1524                 return (EINVAL);
1525         }
1526
1527         /* CPU clock in MHz or 100ths of a percent. */
1528         cf->freq = HZ2MHZ(arm_freq);
1529         /* Voltage in mV. */
1530         cf->volts = CPUFREQ_VAL_UNKNOWN;
1531         /* Power consumed in mW. */
1532         cf->power = CPUFREQ_VAL_UNKNOWN;
1533         /* Transition latency in us. */
1534         cf->lat = TRANSITION_LATENCY;
1535         /* Driver providing this setting. */
1536         cf->dev = dev;
1537
1538         return (0);
1539 }
1540
1541 static int
1542 bcm2835_cpufreq_make_freq_list(device_t dev, struct cf_setting *sets,
1543     int *count)
1544 {
1545         struct bcm2835_cpufreq_softc *sc;
1546         int freq, min_freq, volts, rem;
1547         int idx;
1548
1549         sc = device_get_softc(dev);
1550         freq = sc->arm_max_freq;
1551         min_freq = sc->arm_min_freq;
1552
1553         /* adjust head freq to STEP */
1554         rem = freq % MHZSTEP;
1555         freq -= rem;
1556         if (freq < min_freq)
1557                 freq = min_freq;
1558
1559         /* if non-turbo, add extra low freq */
1560         if (sc->turbo_mode != BCM2835_MBOX_TURBO_ON)
1561                 if (min_freq > cpufreq_lowest_freq)
1562                         min_freq = cpufreq_lowest_freq;
1563
1564 #ifdef SOC_BCM2835
1565         /* from freq to min_freq */
1566         for (idx = 0; idx < *count && freq >= min_freq; idx++) {
1567                 if (freq > sc->arm_min_freq)
1568                         volts = sc->max_voltage_core;
1569                 else
1570                         volts = sc->min_voltage_core;
1571                 sets[idx].freq = freq;
1572                 sets[idx].volts = volts;
1573                 sets[idx].lat = TRANSITION_LATENCY;
1574                 sets[idx].dev = dev;
1575                 freq -= MHZSTEP;
1576         }
1577 #else
1578         /* XXX RPi2 have only 900/600MHz */
1579         idx = 0;
1580         volts = sc->min_voltage_core;
1581         sets[idx].freq = freq;
1582         sets[idx].volts = volts;
1583         sets[idx].lat = TRANSITION_LATENCY;
1584         sets[idx].dev = dev;
1585         idx++;
1586         if (freq != min_freq) {
1587                 sets[idx].freq = min_freq;
1588                 sets[idx].volts = volts;
1589                 sets[idx].lat = TRANSITION_LATENCY;
1590                 sets[idx].dev = dev;
1591                 idx++;
1592         }
1593 #endif
1594         *count = idx;
1595
1596         return (0);
1597 }
1598
1599 static int
1600 bcm2835_cpufreq_settings(device_t dev, struct cf_setting *sets, int *count)
1601 {
1602         struct bcm2835_cpufreq_softc *sc;
1603
1604         if (sets == NULL || count == NULL)
1605                 return (EINVAL);
1606
1607         sc = device_get_softc(dev);
1608         if (sc->arm_min_freq < 0 || sc->arm_max_freq < 0) {
1609                 printf("device is not configured\n");
1610                 return (EINVAL);
1611         }
1612
1613         /* fill data with unknown value */
1614         memset(sets, CPUFREQ_VAL_UNKNOWN, sizeof(*sets) * (*count));
1615         /* create new array up to count */
1616         bcm2835_cpufreq_make_freq_list(dev, sets, count);
1617
1618         return (0);
1619 }
1620
1621 static int
1622 bcm2835_cpufreq_type(device_t dev, int *type)
1623 {
1624
1625         if (type == NULL)
1626                 return (EINVAL);
1627         *type = CPUFREQ_TYPE_ABSOLUTE;
1628
1629         return (0);
1630 }
1631
1632 static device_method_t bcm2835_cpufreq_methods[] = {
1633         /* Device interface */
1634         DEVMETHOD(device_identify,      bcm2835_cpufreq_identify),
1635         DEVMETHOD(device_probe,         bcm2835_cpufreq_probe),
1636         DEVMETHOD(device_attach,        bcm2835_cpufreq_attach),
1637         DEVMETHOD(device_detach,        bcm2835_cpufreq_detach),
1638
1639         /* cpufreq interface */
1640         DEVMETHOD(cpufreq_drv_set,      bcm2835_cpufreq_set),
1641         DEVMETHOD(cpufreq_drv_get,      bcm2835_cpufreq_get),
1642         DEVMETHOD(cpufreq_drv_settings, bcm2835_cpufreq_settings),
1643         DEVMETHOD(cpufreq_drv_type,     bcm2835_cpufreq_type),
1644
1645         DEVMETHOD_END
1646 };
1647
1648 static devclass_t bcm2835_cpufreq_devclass;
1649 static driver_t bcm2835_cpufreq_driver = {
1650         "bcm2835_cpufreq",
1651         bcm2835_cpufreq_methods,
1652         sizeof(struct bcm2835_cpufreq_softc),
1653 };
1654
1655 DRIVER_MODULE(bcm2835_cpufreq, cpu, bcm2835_cpufreq_driver,
1656     bcm2835_cpufreq_devclass, 0, 0);