2 * Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@freebsd.org>
3 * Copyright (c) 2012 Luiz Otavio O Souza.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
32 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/module.h>
39 #include <sys/mutex.h>
41 #include <sys/sysctl.h>
43 #include <machine/bus.h>
44 #include <machine/cpu.h>
45 #include <machine/cpufunc.h>
46 #include <machine/resource.h>
47 #include <machine/fdt.h>
48 #include <machine/intr.h>
50 #include <dev/fdt/fdt_common.h>
51 #include <dev/ofw/ofw_bus.h>
52 #include <dev/ofw/ofw_bus_subr.h>
54 #include <arm/broadcom/bcm2835/bcm2835_gpio.h>
59 #define dprintf(fmt, args...) do { printf("%s(): ", __func__); \
60 printf(fmt,##args); } while (0)
62 #define dprintf(fmt, args...)
65 #define BCM_GPIO_PINS 54
66 #define BCM_GPIO_DEFAULT_CAPS (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | \
67 GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN)
69 struct bcm_gpio_sysctl {
70 struct bcm_gpio_softc *sc;
74 struct bcm_gpio_softc {
77 struct resource * sc_mem_res;
78 struct resource * sc_irq_res;
79 bus_space_tag_t sc_bst;
80 bus_space_handle_t sc_bsh;
84 int sc_ro_pins[BCM_GPIO_PINS];
85 struct gpio_pin sc_gpio_pins[BCM_GPIO_PINS];
86 struct bcm_gpio_sysctl sc_sysctl[BCM_GPIO_PINS];
95 #define BCM_GPIO_LOCK(_sc) mtx_lock(&_sc->sc_mtx)
96 #define BCM_GPIO_UNLOCK(_sc) mtx_unlock(&_sc->sc_mtx)
97 #define BCM_GPIO_LOCK_ASSERT(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED)
99 #define BCM_GPIO_GPFSEL(_bank) 0x00 + _bank * 4
100 #define BCM_GPIO_GPSET(_bank) 0x1c + _bank * 4
101 #define BCM_GPIO_GPCLR(_bank) 0x28 + _bank * 4
102 #define BCM_GPIO_GPLEV(_bank) 0x34 + _bank * 4
103 #define BCM_GPIO_GPPUD(_bank) 0x94
104 #define BCM_GPIO_GPPUDCLK(_bank) 0x98 + _bank * 4
106 #define BCM_GPIO_WRITE(_sc, _off, _val) \
107 bus_space_write_4(_sc->sc_bst, _sc->sc_bsh, _off, _val)
108 #define BCM_GPIO_READ(_sc, _off) \
109 bus_space_read_4(_sc->sc_bst, _sc->sc_bsh, _off)
112 bcm_gpio_pin_is_ro(struct bcm_gpio_softc *sc, int pin)
116 for (i = 0; i < sc->sc_ro_npins; i++)
117 if (pin == sc->sc_ro_pins[i])
123 bcm_gpio_get_function(struct bcm_gpio_softc *sc, uint32_t pin)
125 uint32_t bank, func, offset;
127 /* Five banks, 10 pins per bank, 3 bits per pin. */
129 offset = (pin - bank * 10) * 3;
132 func = (BCM_GPIO_READ(sc, BCM_GPIO_GPFSEL(bank)) >> offset) & 7;
139 bcm_gpio_func_str(uint32_t nfunc, char *buf, int bufsize)
144 strncpy(buf, "input", bufsize);
146 case BCM_GPIO_OUTPUT:
147 strncpy(buf, "output", bufsize);
150 strncpy(buf, "alt0", bufsize);
153 strncpy(buf, "alt1", bufsize);
156 strncpy(buf, "alt2", bufsize);
159 strncpy(buf, "alt3", bufsize);
162 strncpy(buf, "alt4", bufsize);
165 strncpy(buf, "alt5", bufsize);
168 strncpy(buf, "invalid", bufsize);
173 bcm_gpio_str_func(char *func, uint32_t *nfunc)
176 if (strcasecmp(func, "input") == 0)
177 *nfunc = BCM_GPIO_INPUT;
178 else if (strcasecmp(func, "output") == 0)
179 *nfunc = BCM_GPIO_OUTPUT;
180 else if (strcasecmp(func, "alt0") == 0)
181 *nfunc = BCM_GPIO_ALT0;
182 else if (strcasecmp(func, "alt1") == 0)
183 *nfunc = BCM_GPIO_ALT1;
184 else if (strcasecmp(func, "alt2") == 0)
185 *nfunc = BCM_GPIO_ALT2;
186 else if (strcasecmp(func, "alt3") == 0)
187 *nfunc = BCM_GPIO_ALT3;
188 else if (strcasecmp(func, "alt4") == 0)
189 *nfunc = BCM_GPIO_ALT4;
190 else if (strcasecmp(func, "alt5") == 0)
191 *nfunc = BCM_GPIO_ALT5;
199 bcm_gpio_func_flag(uint32_t nfunc)
204 return (GPIO_PIN_INPUT);
205 case BCM_GPIO_OUTPUT:
206 return (GPIO_PIN_OUTPUT);
212 bcm_gpio_set_function(struct bcm_gpio_softc *sc, uint32_t pin, uint32_t f)
214 uint32_t bank, data, offset;
216 /* Must be called with lock held. */
217 BCM_GPIO_LOCK_ASSERT(sc);
219 /* Five banks, 10 pins per bank, 3 bits per pin. */
221 offset = (pin - bank * 10) * 3;
223 data = BCM_GPIO_READ(sc, BCM_GPIO_GPFSEL(bank));
224 data &= ~(7 << offset);
225 data |= (f << offset);
226 BCM_GPIO_WRITE(sc, BCM_GPIO_GPFSEL(bank), data);
230 bcm_gpio_set_pud(struct bcm_gpio_softc *sc, uint32_t pin, uint32_t state)
232 uint32_t bank, offset;
234 /* Must be called with lock held. */
235 BCM_GPIO_LOCK_ASSERT(sc);
238 offset = pin - 32 * bank;
240 BCM_GPIO_WRITE(sc, BCM_GPIO_GPPUD(0), state);
241 BCM_GPIO_WRITE(sc, BCM_GPIO_GPPUDCLK(bank), (1 << offset));
242 BCM_GPIO_WRITE(sc, BCM_GPIO_GPPUD(0), 0);
243 BCM_GPIO_WRITE(sc, BCM_GPIO_GPPUDCLK(bank), 0);
247 bcm_gpio_set_alternate(device_t dev, uint32_t pin, uint32_t nfunc)
249 struct bcm_gpio_softc *sc;
252 sc = device_get_softc(dev);
255 /* Disable pull-up or pull-down on pin. */
256 bcm_gpio_set_pud(sc, pin, BCM_GPIO_NONE);
258 /* And now set the pin function. */
259 bcm_gpio_set_function(sc, pin, nfunc);
261 /* Update the pin flags. */
262 for (i = 0; i < sc->sc_gpio_npins; i++) {
263 if (sc->sc_gpio_pins[i].gp_pin == pin)
266 if (i < sc->sc_gpio_npins)
267 sc->sc_gpio_pins[i].gp_flags = bcm_gpio_func_flag(nfunc);
273 bcm_gpio_pin_configure(struct bcm_gpio_softc *sc, struct gpio_pin *pin,
280 * Manage input/output.
282 if (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) {
283 pin->gp_flags &= ~(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT);
284 if (flags & GPIO_PIN_OUTPUT) {
285 pin->gp_flags |= GPIO_PIN_OUTPUT;
286 bcm_gpio_set_function(sc, pin->gp_pin,
289 pin->gp_flags |= GPIO_PIN_INPUT;
290 bcm_gpio_set_function(sc, pin->gp_pin,
295 /* Manage Pull-up/pull-down. */
296 pin->gp_flags &= ~(GPIO_PIN_PULLUP|GPIO_PIN_PULLDOWN);
297 if (flags & (GPIO_PIN_PULLUP|GPIO_PIN_PULLDOWN)) {
298 if (flags & GPIO_PIN_PULLUP) {
299 pin->gp_flags |= GPIO_PIN_PULLUP;
300 bcm_gpio_set_pud(sc, pin->gp_pin, BCM_GPIO_PULLUP);
302 pin->gp_flags |= GPIO_PIN_PULLDOWN;
303 bcm_gpio_set_pud(sc, pin->gp_pin, BCM_GPIO_PULLDOWN);
306 bcm_gpio_set_pud(sc, pin->gp_pin, BCM_GPIO_NONE);
312 bcm_gpio_pin_max(device_t dev, int *maxpin)
315 *maxpin = BCM_GPIO_PINS - 1;
320 bcm_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
322 struct bcm_gpio_softc *sc = device_get_softc(dev);
325 for (i = 0; i < sc->sc_gpio_npins; i++) {
326 if (sc->sc_gpio_pins[i].gp_pin == pin)
330 if (i >= sc->sc_gpio_npins)
334 *caps = sc->sc_gpio_pins[i].gp_caps;
341 bcm_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
343 struct bcm_gpio_softc *sc = device_get_softc(dev);
346 for (i = 0; i < sc->sc_gpio_npins; i++) {
347 if (sc->sc_gpio_pins[i].gp_pin == pin)
351 if (i >= sc->sc_gpio_npins)
355 *flags = sc->sc_gpio_pins[i].gp_flags;
362 bcm_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
364 struct bcm_gpio_softc *sc = device_get_softc(dev);
367 for (i = 0; i < sc->sc_gpio_npins; i++) {
368 if (sc->sc_gpio_pins[i].gp_pin == pin)
372 if (i >= sc->sc_gpio_npins)
376 memcpy(name, sc->sc_gpio_pins[i].gp_name, GPIOMAXNAME);
383 bcm_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
385 struct bcm_gpio_softc *sc = device_get_softc(dev);
388 for (i = 0; i < sc->sc_gpio_npins; i++) {
389 if (sc->sc_gpio_pins[i].gp_pin == pin)
393 if (i >= sc->sc_gpio_npins)
396 /* We never touch on read-only/reserved pins. */
397 if (bcm_gpio_pin_is_ro(sc, pin))
400 bcm_gpio_pin_configure(sc, &sc->sc_gpio_pins[i], flags);
406 bcm_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
408 struct bcm_gpio_softc *sc = device_get_softc(dev);
409 uint32_t bank, offset;
412 for (i = 0; i < sc->sc_gpio_npins; i++) {
413 if (sc->sc_gpio_pins[i].gp_pin == pin)
417 if (i >= sc->sc_gpio_npins)
420 /* We never write to read-only/reserved pins. */
421 if (bcm_gpio_pin_is_ro(sc, pin))
425 offset = pin - 32 * bank;
429 BCM_GPIO_WRITE(sc, BCM_GPIO_GPSET(bank), (1 << offset));
431 BCM_GPIO_WRITE(sc, BCM_GPIO_GPCLR(bank), (1 << offset));
438 bcm_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
440 struct bcm_gpio_softc *sc = device_get_softc(dev);
441 uint32_t bank, offset, reg_data;
444 for (i = 0; i < sc->sc_gpio_npins; i++) {
445 if (sc->sc_gpio_pins[i].gp_pin == pin)
449 if (i >= sc->sc_gpio_npins)
453 offset = pin - 32 * bank;
456 reg_data = BCM_GPIO_READ(sc, BCM_GPIO_GPLEV(bank));
458 *val = (reg_data & (1 << offset)) ? 1 : 0;
464 bcm_gpio_pin_toggle(device_t dev, uint32_t pin)
466 struct bcm_gpio_softc *sc = device_get_softc(dev);
467 uint32_t bank, data, offset;
470 for (i = 0; i < sc->sc_gpio_npins; i++) {
471 if (sc->sc_gpio_pins[i].gp_pin == pin)
475 if (i >= sc->sc_gpio_npins)
478 /* We never write to read-only/reserved pins. */
479 if (bcm_gpio_pin_is_ro(sc, pin))
483 offset = pin - 32 * bank;
486 data = BCM_GPIO_READ(sc, BCM_GPIO_GPLEV(bank));
487 if (data & (1 << offset))
488 BCM_GPIO_WRITE(sc, BCM_GPIO_GPCLR(bank), (1 << offset));
490 BCM_GPIO_WRITE(sc, BCM_GPIO_GPSET(bank), (1 << offset));
497 bcm_gpio_get_ro_pins(struct bcm_gpio_softc *sc)
500 pcell_t pins[BCM_GPIO_PINS];
503 /* Find the gpio node to start. */
504 gpio = ofw_bus_get_node(sc->sc_dev);
506 len = OF_getproplen(gpio, "broadcom,read-only");
507 if (len < 0 || len > sizeof(pins))
510 if (OF_getprop(gpio, "broadcom,read-only", &pins, len) < 0)
513 sc->sc_ro_npins = len / sizeof(pcell_t);
515 device_printf(sc->sc_dev, "read-only pins: ");
516 for (i = 0; i < sc->sc_ro_npins; i++) {
517 sc->sc_ro_pins[i] = fdt32_to_cpu(pins[i]);
520 printf("%d", sc->sc_ro_pins[i]);
530 bcm_gpio_func_proc(SYSCTL_HANDLER_ARGS)
533 struct bcm_gpio_softc *sc;
534 struct bcm_gpio_sysctl *sc_sysctl;
541 /* Get the current pin function. */
542 nfunc = bcm_gpio_get_function(sc, sc_sysctl->pin);
543 bcm_gpio_func_str(nfunc, buf, sizeof(buf));
545 error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
546 if (error != 0 || req->newptr == NULL)
549 /* Parse the user supplied string and check for a valid pin function. */
550 if (bcm_gpio_str_func(buf, &nfunc) != 0)
553 /* Update the pin alternate function. */
554 bcm_gpio_set_alternate(sc->sc_dev, sc_sysctl->pin, nfunc);
560 bcm_gpio_sysctl_init(struct bcm_gpio_softc *sc)
563 struct bcm_gpio_sysctl *sc_sysctl;
564 struct sysctl_ctx_list *ctx;
565 struct sysctl_oid *tree_node, *pin_node, *pinN_node;
566 struct sysctl_oid_list *tree, *pin_tree, *pinN_tree;
570 * Add per-pin sysctl tree/handlers.
572 ctx = device_get_sysctl_ctx(sc->sc_dev);
573 tree_node = device_get_sysctl_tree(sc->sc_dev);
574 tree = SYSCTL_CHILDREN(tree_node);
575 pin_node = SYSCTL_ADD_NODE(ctx, tree, OID_AUTO, "pin",
576 CTLFLAG_RD, NULL, "GPIO Pins");
577 pin_tree = SYSCTL_CHILDREN(pin_node);
579 for (i = 0; i < sc->sc_gpio_npins; i++) {
581 snprintf(pinbuf, sizeof(pinbuf), "%d", i);
582 pinN_node = SYSCTL_ADD_NODE(ctx, pin_tree, OID_AUTO, pinbuf,
583 CTLFLAG_RD, NULL, "GPIO Pin");
584 pinN_tree = SYSCTL_CHILDREN(pinN_node);
586 sc->sc_sysctl[i].sc = sc;
587 sc_sysctl = &sc->sc_sysctl[i];
589 sc_sysctl->pin = sc->sc_gpio_pins[i].gp_pin;
590 SYSCTL_ADD_PROC(ctx, pinN_tree, OID_AUTO, "function",
591 CTLFLAG_RW | CTLTYPE_STRING, sc_sysctl,
592 sizeof(struct bcm_gpio_sysctl), bcm_gpio_func_proc,
593 "A", "Pin Function");
598 bcm_gpio_get_reserved_pins(struct bcm_gpio_softc *sc)
600 int i, j, len, npins;
601 pcell_t pins[BCM_GPIO_PINS];
602 phandle_t gpio, node, reserved;
605 /* Get read-only pins. */
606 if (bcm_gpio_get_ro_pins(sc) != 0)
609 /* Find the gpio/reserved pins node to start. */
610 gpio = ofw_bus_get_node(sc->sc_dev);
611 node = OF_child(gpio);
617 while ((node != 0) && (reserved == 0)) {
618 len = OF_getprop(node, "name", name,
621 if (strcmp(name, "reserved") == 0)
623 node = OF_peer(node);
629 /* Get the reserved pins. */
630 len = OF_getproplen(reserved, "broadcom,pins");
631 if (len < 0 || len > sizeof(pins))
634 if (OF_getprop(reserved, "broadcom,pins", &pins, len) < 0)
637 npins = len / sizeof(pcell_t);
640 device_printf(sc->sc_dev, "reserved pins: ");
641 for (i = 0; i < npins; i++) {
644 printf("%d", fdt32_to_cpu(pins[i]));
645 /* Some pins maybe already on the list of read-only pins. */
646 if (bcm_gpio_pin_is_ro(sc, fdt32_to_cpu(pins[i])))
648 sc->sc_ro_pins[j++ + sc->sc_ro_npins] = fdt32_to_cpu(pins[i]);
650 sc->sc_ro_npins += j;
659 bcm_gpio_probe(device_t dev)
662 if (!ofw_bus_status_okay(dev))
665 if (!ofw_bus_is_compatible(dev, "broadcom,bcm2835-gpio"))
668 device_set_desc(dev, "BCM2708/2835 GPIO controller");
669 return (BUS_PROBE_DEFAULT);
673 bcm_gpio_attach(device_t dev)
675 struct bcm_gpio_softc *sc = device_get_softc(dev);
682 mtx_init(&sc->sc_mtx, "bcm gpio", "gpio", MTX_DEF);
685 sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
687 if (!sc->sc_mem_res) {
688 device_printf(dev, "cannot allocate memory window\n");
692 sc->sc_bst = rman_get_bustag(sc->sc_mem_res);
693 sc->sc_bsh = rman_get_bushandle(sc->sc_mem_res);
696 sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
698 if (!sc->sc_irq_res) {
699 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
700 device_printf(dev, "cannot allocate interrupt\n");
705 gpio = ofw_bus_get_node(sc->sc_dev);
707 if (!OF_hasprop(gpio, "gpio-controller"))
708 /* Node is not a GPIO controller. */
712 * Find the read-only pins. These are pins we never touch or bad
713 * things could happen.
715 if (bcm_gpio_get_reserved_pins(sc) == -1)
718 /* Initialize the software controlled pins. */
719 for (i = 0, j = 0; j < BCM_GPIO_PINS; j++) {
720 if (bcm_gpio_pin_is_ro(sc, j))
722 snprintf(sc->sc_gpio_pins[i].gp_name, GPIOMAXNAME,
724 func = bcm_gpio_get_function(sc, j);
725 sc->sc_gpio_pins[i].gp_pin = j;
726 sc->sc_gpio_pins[i].gp_caps = BCM_GPIO_DEFAULT_CAPS;
727 sc->sc_gpio_pins[i].gp_flags = bcm_gpio_func_flag(func);
730 sc->sc_gpio_npins = i;
732 bcm_gpio_sysctl_init(sc);
734 device_add_child(dev, "gpioc", -1);
735 device_add_child(dev, "gpiobus", -1);
737 return (bus_generic_attach(dev));
741 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res);
743 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
748 bcm_gpio_detach(device_t dev)
755 bcm_gpio_get_node(device_t bus, device_t dev)
758 /* We only have one child, the GPIO bus, which needs our own node. */
759 return (ofw_bus_get_node(bus));
762 static device_method_t bcm_gpio_methods[] = {
763 /* Device interface */
764 DEVMETHOD(device_probe, bcm_gpio_probe),
765 DEVMETHOD(device_attach, bcm_gpio_attach),
766 DEVMETHOD(device_detach, bcm_gpio_detach),
769 DEVMETHOD(gpio_pin_max, bcm_gpio_pin_max),
770 DEVMETHOD(gpio_pin_getname, bcm_gpio_pin_getname),
771 DEVMETHOD(gpio_pin_getflags, bcm_gpio_pin_getflags),
772 DEVMETHOD(gpio_pin_getcaps, bcm_gpio_pin_getcaps),
773 DEVMETHOD(gpio_pin_setflags, bcm_gpio_pin_setflags),
774 DEVMETHOD(gpio_pin_get, bcm_gpio_pin_get),
775 DEVMETHOD(gpio_pin_set, bcm_gpio_pin_set),
776 DEVMETHOD(gpio_pin_toggle, bcm_gpio_pin_toggle),
778 /* ofw_bus interface */
779 DEVMETHOD(ofw_bus_get_node, bcm_gpio_get_node),
784 static devclass_t bcm_gpio_devclass;
786 static driver_t bcm_gpio_driver = {
789 sizeof(struct bcm_gpio_softc),
792 DRIVER_MODULE(bcm_gpio, simplebus, bcm_gpio_driver, bcm_gpio_devclass, 0, 0);