2 * Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@FreeBSD.org>
3 * Copyright (c) 2012-2015 Luiz Otavio O Souza <loos@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
32 #include <sys/systm.h>
35 #include <sys/interrupt.h>
36 #include <sys/kernel.h>
38 #include <sys/module.h>
39 #include <sys/mutex.h>
41 #include <sys/sysctl.h>
43 #include <machine/bus.h>
45 #include <dev/gpio/gpiobusvar.h>
46 #include <dev/ofw/ofw_bus.h>
48 #include <arm/broadcom/bcm2835/bcm2835_gpio.h>
53 #define dprintf(fmt, args...) do { printf("%s(): ", __func__); \
54 printf(fmt,##args); } while (0)
56 #define dprintf(fmt, args...)
59 #define BCM_GPIO_IRQS 4
60 #define BCM_GPIO_PINS 54
61 #define BCM_GPIO_PINS_PER_BANK 32
62 #define BCM_GPIO_DEFAULT_CAPS (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | \
63 GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN)
65 static struct resource_spec bcm_gpio_res_spec[] = {
66 { SYS_RES_MEMORY, 0, RF_ACTIVE },
67 { SYS_RES_IRQ, 0, RF_ACTIVE },
68 { SYS_RES_IRQ, 1, RF_ACTIVE },
69 { SYS_RES_IRQ, 2, RF_ACTIVE },
70 { SYS_RES_IRQ, 3, RF_ACTIVE },
74 struct bcm_gpio_sysctl {
75 struct bcm_gpio_softc *sc;
79 struct bcm_gpio_softc {
83 struct resource * sc_res[BCM_GPIO_IRQS + 1];
84 bus_space_tag_t sc_bst;
85 bus_space_handle_t sc_bsh;
86 void * sc_intrhand[BCM_GPIO_IRQS];
89 int sc_ro_pins[BCM_GPIO_PINS];
90 struct gpio_pin sc_gpio_pins[BCM_GPIO_PINS];
91 struct intr_event * sc_events[BCM_GPIO_PINS];
92 struct bcm_gpio_sysctl sc_sysctl[BCM_GPIO_PINS];
93 enum intr_trigger sc_irq_trigger[BCM_GPIO_PINS];
94 enum intr_polarity sc_irq_polarity[BCM_GPIO_PINS];
103 #define BCM_GPIO_LOCK(_sc) mtx_lock_spin(&(_sc)->sc_mtx)
104 #define BCM_GPIO_UNLOCK(_sc) mtx_unlock_spin(&(_sc)->sc_mtx)
105 #define BCM_GPIO_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED)
106 #define BCM_GPIO_WRITE(_sc, _off, _val) \
107 bus_space_write_4((_sc)->sc_bst, (_sc)->sc_bsh, _off, _val)
108 #define BCM_GPIO_READ(_sc, _off) \
109 bus_space_read_4((_sc)->sc_bst, (_sc)->sc_bsh, _off)
110 #define BCM_GPIO_CLEAR_BITS(_sc, _off, _bits) \
111 BCM_GPIO_WRITE(_sc, _off, BCM_GPIO_READ(_sc, _off) & ~(_bits))
112 #define BCM_GPIO_SET_BITS(_sc, _off, _bits) \
113 BCM_GPIO_WRITE(_sc, _off, BCM_GPIO_READ(_sc, _off) | _bits)
114 #define BCM_GPIO_BANK(a) (a / BCM_GPIO_PINS_PER_BANK)
115 #define BCM_GPIO_MASK(a) (1U << (a % BCM_GPIO_PINS_PER_BANK))
117 #define BCM_GPIO_GPFSEL(_bank) (0x00 + _bank * 4) /* Function Select */
118 #define BCM_GPIO_GPSET(_bank) (0x1c + _bank * 4) /* Pin Out Set */
119 #define BCM_GPIO_GPCLR(_bank) (0x28 + _bank * 4) /* Pin Out Clear */
120 #define BCM_GPIO_GPLEV(_bank) (0x34 + _bank * 4) /* Pin Level */
121 #define BCM_GPIO_GPEDS(_bank) (0x40 + _bank * 4) /* Event Status */
122 #define BCM_GPIO_GPREN(_bank) (0x4c + _bank * 4) /* Rising Edge irq */
123 #define BCM_GPIO_GPFEN(_bank) (0x58 + _bank * 4) /* Falling Edge irq */
124 #define BCM_GPIO_GPHEN(_bank) (0x64 + _bank * 4) /* High Level irq */
125 #define BCM_GPIO_GPLEN(_bank) (0x70 + _bank * 4) /* Low Level irq */
126 #define BCM_GPIO_GPAREN(_bank) (0x7c + _bank * 4) /* Async Rising Edge */
127 #define BCM_GPIO_GPAFEN(_bank) (0x88 + _bank * 4) /* Async Falling Egde */
128 #define BCM_GPIO_GPPUD(_bank) (0x94) /* Pin Pull up/down */
129 #define BCM_GPIO_GPPUDCLK(_bank) (0x98 + _bank * 4) /* Pin Pull up clock */
131 static struct bcm_gpio_softc *bcm_gpio_sc = NULL;
134 bcm_gpio_pin_is_ro(struct bcm_gpio_softc *sc, int pin)
138 for (i = 0; i < sc->sc_ro_npins; i++)
139 if (pin == sc->sc_ro_pins[i])
145 bcm_gpio_get_function(struct bcm_gpio_softc *sc, uint32_t pin)
147 uint32_t bank, func, offset;
149 /* Five banks, 10 pins per bank, 3 bits per pin. */
151 offset = (pin - bank * 10) * 3;
154 func = (BCM_GPIO_READ(sc, BCM_GPIO_GPFSEL(bank)) >> offset) & 7;
161 bcm_gpio_func_str(uint32_t nfunc, char *buf, int bufsize)
166 strncpy(buf, "input", bufsize);
168 case BCM_GPIO_OUTPUT:
169 strncpy(buf, "output", bufsize);
172 strncpy(buf, "alt0", bufsize);
175 strncpy(buf, "alt1", bufsize);
178 strncpy(buf, "alt2", bufsize);
181 strncpy(buf, "alt3", bufsize);
184 strncpy(buf, "alt4", bufsize);
187 strncpy(buf, "alt5", bufsize);
190 strncpy(buf, "invalid", bufsize);
195 bcm_gpio_str_func(char *func, uint32_t *nfunc)
198 if (strcasecmp(func, "input") == 0)
199 *nfunc = BCM_GPIO_INPUT;
200 else if (strcasecmp(func, "output") == 0)
201 *nfunc = BCM_GPIO_OUTPUT;
202 else if (strcasecmp(func, "alt0") == 0)
203 *nfunc = BCM_GPIO_ALT0;
204 else if (strcasecmp(func, "alt1") == 0)
205 *nfunc = BCM_GPIO_ALT1;
206 else if (strcasecmp(func, "alt2") == 0)
207 *nfunc = BCM_GPIO_ALT2;
208 else if (strcasecmp(func, "alt3") == 0)
209 *nfunc = BCM_GPIO_ALT3;
210 else if (strcasecmp(func, "alt4") == 0)
211 *nfunc = BCM_GPIO_ALT4;
212 else if (strcasecmp(func, "alt5") == 0)
213 *nfunc = BCM_GPIO_ALT5;
221 bcm_gpio_func_flag(uint32_t nfunc)
226 return (GPIO_PIN_INPUT);
227 case BCM_GPIO_OUTPUT:
228 return (GPIO_PIN_OUTPUT);
234 bcm_gpio_set_function(struct bcm_gpio_softc *sc, uint32_t pin, uint32_t f)
236 uint32_t bank, data, offset;
238 /* Must be called with lock held. */
239 BCM_GPIO_LOCK_ASSERT(sc);
241 /* Five banks, 10 pins per bank, 3 bits per pin. */
243 offset = (pin - bank * 10) * 3;
245 data = BCM_GPIO_READ(sc, BCM_GPIO_GPFSEL(bank));
246 data &= ~(7 << offset);
247 data |= (f << offset);
248 BCM_GPIO_WRITE(sc, BCM_GPIO_GPFSEL(bank), data);
252 bcm_gpio_set_pud(struct bcm_gpio_softc *sc, uint32_t pin, uint32_t state)
256 /* Must be called with lock held. */
257 BCM_GPIO_LOCK_ASSERT(sc);
259 bank = BCM_GPIO_BANK(pin);
260 BCM_GPIO_WRITE(sc, BCM_GPIO_GPPUD(0), state);
261 BCM_GPIO_WRITE(sc, BCM_GPIO_GPPUDCLK(bank), BCM_GPIO_MASK(pin));
262 BCM_GPIO_WRITE(sc, BCM_GPIO_GPPUD(0), 0);
263 BCM_GPIO_WRITE(sc, BCM_GPIO_GPPUDCLK(bank), 0);
267 bcm_gpio_set_alternate(device_t dev, uint32_t pin, uint32_t nfunc)
269 struct bcm_gpio_softc *sc;
272 sc = device_get_softc(dev);
275 /* Disable pull-up or pull-down on pin. */
276 bcm_gpio_set_pud(sc, pin, BCM_GPIO_NONE);
278 /* And now set the pin function. */
279 bcm_gpio_set_function(sc, pin, nfunc);
281 /* Update the pin flags. */
282 for (i = 0; i < sc->sc_gpio_npins; i++) {
283 if (sc->sc_gpio_pins[i].gp_pin == pin)
286 if (i < sc->sc_gpio_npins)
287 sc->sc_gpio_pins[i].gp_flags = bcm_gpio_func_flag(nfunc);
293 bcm_gpio_pin_configure(struct bcm_gpio_softc *sc, struct gpio_pin *pin,
300 * Manage input/output.
302 if (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) {
303 pin->gp_flags &= ~(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT);
304 if (flags & GPIO_PIN_OUTPUT) {
305 pin->gp_flags |= GPIO_PIN_OUTPUT;
306 bcm_gpio_set_function(sc, pin->gp_pin,
309 pin->gp_flags |= GPIO_PIN_INPUT;
310 bcm_gpio_set_function(sc, pin->gp_pin,
315 /* Manage Pull-up/pull-down. */
316 pin->gp_flags &= ~(GPIO_PIN_PULLUP|GPIO_PIN_PULLDOWN);
317 if (flags & (GPIO_PIN_PULLUP|GPIO_PIN_PULLDOWN)) {
318 if (flags & GPIO_PIN_PULLUP) {
319 pin->gp_flags |= GPIO_PIN_PULLUP;
320 bcm_gpio_set_pud(sc, pin->gp_pin, BCM_GPIO_PULLUP);
322 pin->gp_flags |= GPIO_PIN_PULLDOWN;
323 bcm_gpio_set_pud(sc, pin->gp_pin, BCM_GPIO_PULLDOWN);
326 bcm_gpio_set_pud(sc, pin->gp_pin, BCM_GPIO_NONE);
332 bcm_gpio_get_bus(device_t dev)
334 struct bcm_gpio_softc *sc;
336 sc = device_get_softc(dev);
338 return (sc->sc_busdev);
342 bcm_gpio_pin_max(device_t dev, int *maxpin)
345 *maxpin = BCM_GPIO_PINS - 1;
350 bcm_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
352 struct bcm_gpio_softc *sc = device_get_softc(dev);
355 for (i = 0; i < sc->sc_gpio_npins; i++) {
356 if (sc->sc_gpio_pins[i].gp_pin == pin)
360 if (i >= sc->sc_gpio_npins)
364 *caps = sc->sc_gpio_pins[i].gp_caps;
371 bcm_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
373 struct bcm_gpio_softc *sc = device_get_softc(dev);
376 for (i = 0; i < sc->sc_gpio_npins; i++) {
377 if (sc->sc_gpio_pins[i].gp_pin == pin)
381 if (i >= sc->sc_gpio_npins)
385 *flags = sc->sc_gpio_pins[i].gp_flags;
392 bcm_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
394 struct bcm_gpio_softc *sc = device_get_softc(dev);
397 for (i = 0; i < sc->sc_gpio_npins; i++) {
398 if (sc->sc_gpio_pins[i].gp_pin == pin)
402 if (i >= sc->sc_gpio_npins)
406 memcpy(name, sc->sc_gpio_pins[i].gp_name, GPIOMAXNAME);
413 bcm_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
415 struct bcm_gpio_softc *sc = device_get_softc(dev);
418 for (i = 0; i < sc->sc_gpio_npins; i++) {
419 if (sc->sc_gpio_pins[i].gp_pin == pin)
423 if (i >= sc->sc_gpio_npins)
426 /* We never touch on read-only/reserved pins. */
427 if (bcm_gpio_pin_is_ro(sc, pin))
430 bcm_gpio_pin_configure(sc, &sc->sc_gpio_pins[i], flags);
436 bcm_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
438 struct bcm_gpio_softc *sc = device_get_softc(dev);
442 for (i = 0; i < sc->sc_gpio_npins; i++) {
443 if (sc->sc_gpio_pins[i].gp_pin == pin)
446 if (i >= sc->sc_gpio_npins)
448 /* We never write to read-only/reserved pins. */
449 if (bcm_gpio_pin_is_ro(sc, pin))
452 bank = BCM_GPIO_BANK(pin);
454 reg = BCM_GPIO_GPSET(bank);
456 reg = BCM_GPIO_GPCLR(bank);
457 BCM_GPIO_WRITE(sc, reg, BCM_GPIO_MASK(pin));
464 bcm_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
466 struct bcm_gpio_softc *sc = device_get_softc(dev);
467 uint32_t bank, reg_data;
470 for (i = 0; i < sc->sc_gpio_npins; i++) {
471 if (sc->sc_gpio_pins[i].gp_pin == pin)
474 if (i >= sc->sc_gpio_npins)
476 bank = BCM_GPIO_BANK(pin);
478 reg_data = BCM_GPIO_READ(sc, BCM_GPIO_GPLEV(bank));
480 *val = (reg_data & BCM_GPIO_MASK(pin)) ? 1 : 0;
486 bcm_gpio_pin_toggle(device_t dev, uint32_t pin)
488 struct bcm_gpio_softc *sc = device_get_softc(dev);
489 uint32_t bank, data, reg;
492 for (i = 0; i < sc->sc_gpio_npins; i++) {
493 if (sc->sc_gpio_pins[i].gp_pin == pin)
496 if (i >= sc->sc_gpio_npins)
498 /* We never write to read-only/reserved pins. */
499 if (bcm_gpio_pin_is_ro(sc, pin))
502 bank = BCM_GPIO_BANK(pin);
503 data = BCM_GPIO_READ(sc, BCM_GPIO_GPLEV(bank));
504 if (data & BCM_GPIO_MASK(pin))
505 reg = BCM_GPIO_GPCLR(bank);
507 reg = BCM_GPIO_GPSET(bank);
508 BCM_GPIO_WRITE(sc, reg, BCM_GPIO_MASK(pin));
515 bcm_gpio_func_proc(SYSCTL_HANDLER_ARGS)
518 struct bcm_gpio_softc *sc;
519 struct bcm_gpio_sysctl *sc_sysctl;
526 /* Get the current pin function. */
527 nfunc = bcm_gpio_get_function(sc, sc_sysctl->pin);
528 bcm_gpio_func_str(nfunc, buf, sizeof(buf));
530 error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
531 if (error != 0 || req->newptr == NULL)
533 /* Ignore changes on read-only pins. */
534 if (bcm_gpio_pin_is_ro(sc, sc_sysctl->pin))
536 /* Parse the user supplied string and check for a valid pin function. */
537 if (bcm_gpio_str_func(buf, &nfunc) != 0)
540 /* Update the pin alternate function. */
541 bcm_gpio_set_alternate(sc->sc_dev, sc_sysctl->pin, nfunc);
547 bcm_gpio_sysctl_init(struct bcm_gpio_softc *sc)
550 struct bcm_gpio_sysctl *sc_sysctl;
551 struct sysctl_ctx_list *ctx;
552 struct sysctl_oid *tree_node, *pin_node, *pinN_node;
553 struct sysctl_oid_list *tree, *pin_tree, *pinN_tree;
557 * Add per-pin sysctl tree/handlers.
559 ctx = device_get_sysctl_ctx(sc->sc_dev);
560 tree_node = device_get_sysctl_tree(sc->sc_dev);
561 tree = SYSCTL_CHILDREN(tree_node);
562 pin_node = SYSCTL_ADD_NODE(ctx, tree, OID_AUTO, "pin",
563 CTLFLAG_RD, NULL, "GPIO Pins");
564 pin_tree = SYSCTL_CHILDREN(pin_node);
566 for (i = 0; i < sc->sc_gpio_npins; i++) {
568 snprintf(pinbuf, sizeof(pinbuf), "%d", i);
569 pinN_node = SYSCTL_ADD_NODE(ctx, pin_tree, OID_AUTO, pinbuf,
570 CTLFLAG_RD, NULL, "GPIO Pin");
571 pinN_tree = SYSCTL_CHILDREN(pinN_node);
573 sc->sc_sysctl[i].sc = sc;
574 sc_sysctl = &sc->sc_sysctl[i];
576 sc_sysctl->pin = sc->sc_gpio_pins[i].gp_pin;
577 SYSCTL_ADD_PROC(ctx, pinN_tree, OID_AUTO, "function",
578 CTLFLAG_RW | CTLTYPE_STRING, sc_sysctl,
579 sizeof(struct bcm_gpio_sysctl), bcm_gpio_func_proc,
580 "A", "Pin Function");
585 bcm_gpio_get_ro_pins(struct bcm_gpio_softc *sc, phandle_t node,
586 const char *propname, const char *label)
588 int i, need_comma, npins, range_start, range_stop;
591 /* Get the property data. */
592 npins = OF_getencprop_alloc(node, propname, sizeof(*pins),
597 free(pins, M_OFWPROP);
600 for (i = 0; i < npins; i++)
601 sc->sc_ro_pins[i + sc->sc_ro_npins] = pins[i];
602 sc->sc_ro_npins += npins;
604 device_printf(sc->sc_dev, "%s pins: ", label);
605 range_start = range_stop = pins[0];
606 for (i = 1; i < npins; i++) {
607 if (pins[i] != range_stop + 1) {
610 if (range_start != range_stop)
611 printf("%d-%d", range_start, range_stop);
613 printf("%d", range_start);
614 range_start = range_stop = pins[i];
621 if (range_start != range_stop)
622 printf("%d-%d.\n", range_start, range_stop);
624 printf("%d.\n", range_start);
625 free(pins, M_OFWPROP);
631 bcm_gpio_get_reserved_pins(struct bcm_gpio_softc *sc)
634 phandle_t gpio, node, reserved;
637 /* Get read-only pins. */
638 gpio = ofw_bus_get_node(sc->sc_dev);
639 if (bcm_gpio_get_ro_pins(sc, gpio, "broadcom,read-only",
642 /* Traverse the GPIO subnodes to find the reserved pins node. */
644 node = OF_child(gpio);
645 while ((node != 0) && (reserved == 0)) {
646 len = OF_getprop_alloc(node, "name", 1, (void **)&name);
649 if (strcmp(name, "reserved") == 0)
651 free(name, M_OFWPROP);
652 node = OF_peer(node);
656 /* Get the reserved pins. */
657 if (bcm_gpio_get_ro_pins(sc, reserved, "broadcom,pins",
665 bcm_gpio_intr(void *arg)
668 struct bcm_gpio_softc *sc;
669 struct intr_event *event;
670 uint32_t bank, mask, reg;
672 sc = (struct bcm_gpio_softc *)arg;
675 for (irq = 0; irq < BCM_GPIO_PINS; irq++) {
676 bank = BCM_GPIO_BANK(irq);
677 mask = BCM_GPIO_MASK(irq);
678 if (bank != bank_last) {
679 reg = BCM_GPIO_READ(sc, BCM_GPIO_GPEDS(bank));
683 event = sc->sc_events[irq];
684 if (event != NULL && !TAILQ_EMPTY(&event->ie_handlers))
685 intr_event_handle(event, NULL);
687 device_printf(sc->sc_dev, "Stray IRQ %d\n",
690 /* Clear the Status bit by writing '1' to it. */
691 BCM_GPIO_WRITE(sc, BCM_GPIO_GPEDS(bank), mask);
695 return (FILTER_HANDLED);
699 bcm_gpio_probe(device_t dev)
702 if (!ofw_bus_status_okay(dev))
705 if (!ofw_bus_is_compatible(dev, "broadcom,bcm2835-gpio"))
708 device_set_desc(dev, "BCM2708/2835 GPIO controller");
709 return (BUS_PROBE_DEFAULT);
713 bcm_gpio_intr_attach(device_t dev)
715 struct bcm_gpio_softc *sc;
718 sc = device_get_softc(dev);
719 for (i = 0; i < BCM_GPIO_IRQS; i++) {
720 if (bus_setup_intr(dev, sc->sc_res[i + 1],
721 INTR_TYPE_MISC | INTR_MPSAFE, bcm_gpio_intr,
722 NULL, sc, &sc->sc_intrhand[i]) != 0) {
731 bcm_gpio_intr_detach(device_t dev)
733 struct bcm_gpio_softc *sc;
736 sc = device_get_softc(dev);
737 for (i = 0; i < BCM_GPIO_IRQS; i++) {
738 if (sc->sc_intrhand[i]) {
739 bus_teardown_intr(dev, sc->sc_res[i + 1],
746 bcm_gpio_attach(device_t dev)
750 struct bcm_gpio_softc *sc;
753 if (bcm_gpio_sc != NULL)
756 bcm_gpio_sc = sc = device_get_softc(dev);
758 mtx_init(&sc->sc_mtx, "bcm gpio", "gpio", MTX_SPIN);
759 if (bus_alloc_resources(dev, bcm_gpio_res_spec, sc->sc_res) != 0) {
760 device_printf(dev, "cannot allocate resources\n");
763 sc->sc_bst = rman_get_bustag(sc->sc_res[0]);
764 sc->sc_bsh = rman_get_bushandle(sc->sc_res[0]);
765 /* Setup the GPIO interrupt handler. */
766 if (bcm_gpio_intr_attach(dev)) {
767 device_printf(dev, "unable to setup the gpio irq handler\n");
771 gpio = ofw_bus_get_node(sc->sc_dev);
772 if (!OF_hasprop(gpio, "gpio-controller"))
773 /* Node is not a GPIO controller. */
776 * Find the read-only pins. These are pins we never touch or bad
777 * things could happen.
779 if (bcm_gpio_get_reserved_pins(sc) == -1)
781 /* Initialize the software controlled pins. */
782 for (i = 0, j = 0; j < BCM_GPIO_PINS; j++) {
783 snprintf(sc->sc_gpio_pins[i].gp_name, GPIOMAXNAME,
785 func = bcm_gpio_get_function(sc, j);
786 sc->sc_gpio_pins[i].gp_pin = j;
787 sc->sc_gpio_pins[i].gp_caps = BCM_GPIO_DEFAULT_CAPS;
788 sc->sc_gpio_pins[i].gp_flags = bcm_gpio_func_flag(func);
789 /* The default is active-low interrupts. */
790 sc->sc_irq_trigger[i] = INTR_TRIGGER_LEVEL;
791 sc->sc_irq_polarity[i] = INTR_POLARITY_LOW;
794 sc->sc_gpio_npins = i;
795 bcm_gpio_sysctl_init(sc);
796 sc->sc_busdev = gpiobus_attach_bus(dev);
797 if (sc->sc_busdev == NULL)
803 bcm_gpio_intr_detach(dev);
804 bus_release_resources(dev, bcm_gpio_res_spec, sc->sc_res);
805 mtx_destroy(&sc->sc_mtx);
811 bcm_gpio_detach(device_t dev)
818 bcm_gpio_intr_reg(struct bcm_gpio_softc *sc, unsigned int irq, uint32_t bank)
821 if (irq > BCM_GPIO_PINS)
823 if (sc->sc_irq_trigger[irq] == INTR_TRIGGER_LEVEL) {
824 if (sc->sc_irq_polarity[irq] == INTR_POLARITY_LOW)
825 return (BCM_GPIO_GPLEN(bank));
826 else if (sc->sc_irq_polarity[irq] == INTR_POLARITY_HIGH)
827 return (BCM_GPIO_GPHEN(bank));
828 } else if (sc->sc_irq_trigger[irq] == INTR_TRIGGER_EDGE) {
829 if (sc->sc_irq_polarity[irq] == INTR_POLARITY_LOW)
830 return (BCM_GPIO_GPFEN(bank));
831 else if (sc->sc_irq_polarity[irq] == INTR_POLARITY_HIGH)
832 return (BCM_GPIO_GPREN(bank));
839 bcm_gpio_mask_irq(void *source)
841 uint32_t bank, mask, reg;
844 irq = (unsigned int)source;
845 if (irq > BCM_GPIO_PINS)
847 if (bcm_gpio_pin_is_ro(bcm_gpio_sc, irq))
849 bank = BCM_GPIO_BANK(irq);
850 mask = BCM_GPIO_MASK(irq);
851 BCM_GPIO_LOCK(bcm_gpio_sc);
852 reg = bcm_gpio_intr_reg(bcm_gpio_sc, irq, bank);
854 BCM_GPIO_CLEAR_BITS(bcm_gpio_sc, reg, mask);
855 BCM_GPIO_UNLOCK(bcm_gpio_sc);
859 bcm_gpio_unmask_irq(void *source)
861 uint32_t bank, mask, reg;
864 irq = (unsigned int)source;
865 if (irq > BCM_GPIO_PINS)
867 if (bcm_gpio_pin_is_ro(bcm_gpio_sc, irq))
869 bank = BCM_GPIO_BANK(irq);
870 mask = BCM_GPIO_MASK(irq);
871 BCM_GPIO_LOCK(bcm_gpio_sc);
872 reg = bcm_gpio_intr_reg(bcm_gpio_sc, irq, bank);
874 BCM_GPIO_SET_BITS(bcm_gpio_sc, reg, mask);
875 BCM_GPIO_UNLOCK(bcm_gpio_sc);
879 bcm_gpio_activate_resource(device_t bus, device_t child, int type, int rid,
880 struct resource *res)
884 if (type != SYS_RES_IRQ)
886 /* Unmask the interrupt. */
887 pin = rman_get_start(res);
888 bcm_gpio_unmask_irq((void *)pin);
894 bcm_gpio_deactivate_resource(device_t bus, device_t child, int type, int rid,
895 struct resource *res)
899 if (type != SYS_RES_IRQ)
901 /* Mask the interrupt. */
902 pin = rman_get_start(res);
903 bcm_gpio_mask_irq((void *)pin);
909 bcm_gpio_config_intr(device_t dev, int irq, enum intr_trigger trig,
910 enum intr_polarity pol)
913 struct bcm_gpio_softc *sc;
914 uint32_t mask, oldreg, reg;
916 if (irq > BCM_GPIO_PINS)
918 /* There is no standard trigger or polarity. */
919 if (trig == INTR_TRIGGER_CONFORM || pol == INTR_POLARITY_CONFORM)
921 sc = device_get_softc(dev);
922 if (bcm_gpio_pin_is_ro(sc, irq))
924 bank = BCM_GPIO_BANK(irq);
925 mask = BCM_GPIO_MASK(irq);
927 oldreg = bcm_gpio_intr_reg(sc, irq, bank);
928 sc->sc_irq_trigger[irq] = trig;
929 sc->sc_irq_polarity[irq] = pol;
930 reg = bcm_gpio_intr_reg(sc, irq, bank);
932 BCM_GPIO_SET_BITS(sc, reg, mask);
933 if (reg != oldreg && oldreg != 0)
934 BCM_GPIO_CLEAR_BITS(sc, oldreg, mask);
941 bcm_gpio_setup_intr(device_t bus, device_t child, struct resource *ires,
942 int flags, driver_filter_t *filt, driver_intr_t *handler,
943 void *arg, void **cookiep)
945 struct bcm_gpio_softc *sc;
946 struct intr_event *event;
949 sc = device_get_softc(bus);
950 pin = rman_get_start(ires);
951 if (pin > BCM_GPIO_PINS)
952 panic("%s: bad pin %d", __func__, pin);
953 event = sc->sc_events[pin];
955 error = intr_event_create(&event, (void *)pin, 0, pin,
956 bcm_gpio_mask_irq, bcm_gpio_unmask_irq, NULL, NULL,
957 "gpio%d pin%d:", device_get_unit(bus), pin);
960 sc->sc_events[pin] = event;
962 intr_event_add_handler(event, device_get_nameunit(child), filt,
963 handler, arg, intr_priority(flags), flags, cookiep);
969 bcm_gpio_teardown_intr(device_t dev, device_t child, struct resource *ires,
972 struct bcm_gpio_softc *sc;
975 sc = device_get_softc(dev);
976 pin = rman_get_start(ires);
977 if (pin > BCM_GPIO_PINS)
978 panic("%s: bad pin %d", __func__, pin);
979 if (sc->sc_events[pin] == NULL)
980 panic("Trying to teardown unoccupied IRQ");
981 err = intr_event_remove_handler(cookie);
983 sc->sc_events[pin] = NULL;
989 bcm_gpio_get_node(device_t bus, device_t dev)
992 /* We only have one child, the GPIO bus, which needs our own node. */
993 return (ofw_bus_get_node(bus));
996 static device_method_t bcm_gpio_methods[] = {
997 /* Device interface */
998 DEVMETHOD(device_probe, bcm_gpio_probe),
999 DEVMETHOD(device_attach, bcm_gpio_attach),
1000 DEVMETHOD(device_detach, bcm_gpio_detach),
1003 DEVMETHOD(gpio_get_bus, bcm_gpio_get_bus),
1004 DEVMETHOD(gpio_pin_max, bcm_gpio_pin_max),
1005 DEVMETHOD(gpio_pin_getname, bcm_gpio_pin_getname),
1006 DEVMETHOD(gpio_pin_getflags, bcm_gpio_pin_getflags),
1007 DEVMETHOD(gpio_pin_getcaps, bcm_gpio_pin_getcaps),
1008 DEVMETHOD(gpio_pin_setflags, bcm_gpio_pin_setflags),
1009 DEVMETHOD(gpio_pin_get, bcm_gpio_pin_get),
1010 DEVMETHOD(gpio_pin_set, bcm_gpio_pin_set),
1011 DEVMETHOD(gpio_pin_toggle, bcm_gpio_pin_toggle),
1014 DEVMETHOD(bus_activate_resource, bcm_gpio_activate_resource),
1015 DEVMETHOD(bus_deactivate_resource, bcm_gpio_deactivate_resource),
1016 DEVMETHOD(bus_config_intr, bcm_gpio_config_intr),
1017 DEVMETHOD(bus_setup_intr, bcm_gpio_setup_intr),
1018 DEVMETHOD(bus_teardown_intr, bcm_gpio_teardown_intr),
1020 /* ofw_bus interface */
1021 DEVMETHOD(ofw_bus_get_node, bcm_gpio_get_node),
1026 static devclass_t bcm_gpio_devclass;
1028 static driver_t bcm_gpio_driver = {
1031 sizeof(struct bcm_gpio_softc),
1034 DRIVER_MODULE(bcm_gpio, simplebus, bcm_gpio_driver, bcm_gpio_devclass, 0, 0);