2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@freebsd.org>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * Defines for converting physical address to VideoCore bus address and back
35 #ifndef _BCM2835_VCBUS_H_
36 #define _BCM2835_VCBUS_H_
38 #define BCM2835_VCBUS_SDRAM_CACHED 0x40000000
39 #define BCM2835_VCBUS_SDRAM_UNCACHED 0xC0000000
41 #define BCM2835_ARM_IO_BASE 0x20000000
42 #define BCM2835_VCBUS_IO_BASE 0x7E000000
43 #define BCM2835_VCBUS_SDRAM_BASE BCM2835_VCBUS_SDRAM_CACHED
45 #define BCM2836_ARM_IO_BASE 0x3f000000
46 #define BCM2836_VCBUS_IO_BASE BCM2835_VCBUS_IO_BASE
47 #define BCM2836_VCBUS_SDRAM_BASE BCM2835_VCBUS_SDRAM_UNCACHED
49 #define BCM2837_ARM_IO_BASE BCM2836_ARM_IO_BASE
50 #define BCM2837_VCBUS_IO_BASE BCM2835_VCBUS_IO_BASE
51 #define BCM2837_VCBUS_SDRAM_BASE BCM2835_VCBUS_SDRAM_UNCACHED
53 #define BCM2838_ARM_IO_BASE 0xfe000000
54 #define BCM2838_VCBUS_IO_BASE BCM2835_VCBUS_IO_BASE
55 #define BCM2838_VCBUS_SDRAM_BASE BCM2835_VCBUS_SDRAM_UNCACHED
58 * Max allowed SDRAM mapping for most peripherals. The Raspberry Pi 4 has more
59 * than 1 GB of SDRAM, but only the lowest 1 GB is mapped into the "Legacy
60 * Master view" of the address space accessible by the DMA engine. Technically,
61 * we can slide this window around to whatever similarly sized range is
62 * convenient, but this is the most useful window given how busdma(9) works and
63 * that the window must be reconfigured for all channels in a given DMA engine.
64 * The DMA lite engine's window can be configured separately from the 30-bit DMA
67 #define BCM2838_PERIPH_MAXADDR 0x3fffffff
69 #define BCM28XX_ARM_IO_SIZE 0x01000000
71 vm_paddr_t bcm283x_armc_to_vcbus(vm_paddr_t pa);
72 vm_paddr_t bcm283x_vcbus_to_armc(vm_paddr_t vca);
73 bus_addr_t bcm283x_dmabus_peripheral_lowaddr(void);
75 #define ARMC_TO_VCBUS(pa) bcm283x_armc_to_vcbus(pa)
76 #define VCBUS_TO_ARMC(vca) bcm283x_vcbus_to_armc(vca)
78 /* Compatibility name for vchiq arm interface. */
79 #define PHYS_TO_VCBUS ARMC_TO_VCBUS
81 #endif /* _BCM2835_VCBUS_H_ */