2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2013 Ian Lepore <ian@freebsd.org>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include "opt_platform.h"
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
34 #include <sys/param.h>
35 #include <sys/systm.h>
37 #include <sys/reboot.h>
38 #include <sys/devmap.h>
42 #include <machine/bus.h>
43 #include <machine/intr.h>
44 #include <machine/machdep.h>
45 #include <machine/platformvar.h>
47 #include <arm/arm/mpcore_timervar.h>
48 #include <arm/freescale/imx/imx6_anatopreg.h>
49 #include <arm/freescale/imx/imx6_anatopvar.h>
50 #include <arm/freescale/imx/imx_machdep.h>
52 #include <dev/fdt/fdt_common.h>
53 #include <dev/ofw/openfirm.h>
55 #include <arm/freescale/imx/imx6_machdep.h>
57 #include "platform_if.h"
58 #include "platform_pl310_if.h"
60 static platform_attach_t imx6_attach;
61 static platform_devmap_init_t imx6_devmap_init;
62 static platform_late_init_t imx6_late_init;
63 static platform_cpu_reset_t imx6_cpu_reset;
66 * Fix FDT data related to interrupts.
68 * Driven by the needs of linux and its drivers (as always), the published FDT
69 * data for imx6 now sets the interrupt parent for most devices to the GPC
70 * interrupt controller, which is for use when the chip is in deep-sleep mode.
71 * We don't support deep sleep or have a GPC-PIC driver; we need all interrupts
72 * to be handled by the GIC.
74 * Luckily, the change to the FDT data was to assign the GPC as the interrupt
75 * parent for the soc node and letting that get inherited by all other devices
76 * (except a few that directly name GIC as their interrupt parent). So we can
77 * set the world right by just changing the interrupt-parent property of the soc
78 * node to refer to GIC instead of GPC. This will get us by until we write our
79 * own GPC driver (or until linux changes its mind and the FDT data again).
81 * We validate that we have data that looks like we expect before changing it:
82 * - SOC node exists and has GPC as its interrupt parent.
83 * - GPC node exists and has GIC as its interrupt parent.
84 * - GIC node exists and is its own interrupt parent or has no parent.
86 * This applies to all models of imx6. Luckily all of them have the devices
87 * involved at the same addresses on the same buses, so we don't need any
88 * per-soc logic. We handle this at platform attach time rather than via the
89 * fdt_fixup_table, because the latter requires matching on the FDT "model"
90 * property, and this applies to all boards including those not yet invented.
92 * This just in: as of the import of dts files from linux 4.15 on 2018-02-10,
93 * they appear to have applied a new style rule to the dts which forbids leading
94 * zeroes in the @address qualifiers on node names. Since we have to find those
95 * nodes by string matching we now have to search for both flavors of each node
99 fix_fdt_interrupt_data(void)
101 phandle_t gicipar, gicnode, gicxref;
102 phandle_t gpcipar, gpcnode, gpcxref;
103 phandle_t socipar, socnode;
106 socnode = OF_finddevice("/soc");
109 result = OF_getencprop(socnode, "interrupt-parent", &socipar,
114 /* GIC node may be child of soc node, or appear directly at root. */
115 gicnode = OF_finddevice("/soc/interrupt-controller@00a01000");
117 gicnode = OF_finddevice("/soc/interrupt-controller@a01000");
119 gicnode = OF_finddevice("/interrupt-controller@00a01000");
121 gicnode = OF_finddevice("/interrupt-controller@a01000");
125 gicxref = OF_xref_from_node(gicnode);
127 /* If gic node has no parent, pretend it is its own parent. */
128 result = OF_getencprop(gicnode, "interrupt-parent", &gicipar,
133 gpcnode = OF_finddevice("/soc/aips-bus@02000000/gpc@020dc000");
135 gpcnode = OF_finddevice("/soc/aips-bus@2000000/gpc@20dc000");
138 result = OF_getencprop(gpcnode, "interrupt-parent", &gpcipar,
142 gpcxref = OF_xref_from_node(gpcnode);
144 if (socipar != gpcxref || gpcipar != gicxref || gicipar != gicxref)
147 gicxref = cpu_to_fdt32(gicxref);
148 OF_setprop(socnode, "interrupt-parent", &gicxref, sizeof(gicxref));
152 fix_fdt_iomuxc_data(void)
157 * The linux dts defines two nodes with the same mmio address range,
158 * iomuxc-gpr and the regular iomuxc. The -grp node is a simple_mfd and
159 * a syscon, but it only has access to a small subset of the iomuxc
160 * registers, so it can't serve as the accessor for the iomuxc driver's
161 * register IO. But right now, the simple_mfd driver attaches first,
162 * preventing the real iomuxc driver from allocating its mmio register
163 * range because it partially overlaps with the -gpr range.
165 * For now, by far the easiest thing to do to keep imx6 working is to
166 * just disable the iomuxc-gpr node because we don't have a driver for
167 * it anyway, we just need to prevent attachment of simple_mfd.
169 * If we ever write a -gpr driver, this code should probably switch to
170 * modifying the reg property so that the range covers all the iomuxc
171 * regs, then the -gpr driver can be a regular syscon driver that iomuxc
172 * uses for register access.
174 node = OF_finddevice("/soc/aips-bus@2000000/iomuxc-gpr@20e0000");
176 OF_setprop(node, "status", "disabled", sizeof("disabled"));
180 imx6_attach(platform_t plat)
183 /* Fix soc interrupt-parent property. */
184 fix_fdt_interrupt_data();
186 /* Fix iomuxc-gpr and iomuxc nodes both using the same mmio range. */
187 fix_fdt_iomuxc_data();
189 /* Inform the MPCore timer driver that its clock is variable. */
190 arm_tmr_change_frequency(ARM_TMR_FREQUENCY_VARIES);
196 imx6_late_init(platform_t plat)
198 const uint32_t IMX6_WDOG_SR_PHYS = 0x020bc004;
200 imx_wdog_init_last_reset(IMX6_WDOG_SR_PHYS);
204 * Set up static device mappings.
206 * This attempts to cover the most-used devices with 1MB section mappings, which
207 * is good for performance (uses fewer TLB entries for device access).
209 * ARMMP covers the interrupt controller, MPCore timers, global timer, and the
210 * L2 cache controller. Most of the 1MB range is unused reserved space.
212 * AIPS1/AIPS2 cover most of the on-chip devices such as uart, spi, i2c, etc.
214 * Notably not mapped right now are HDMI, GPU, and other devices below ARMMP in
215 * the memory map. When we get support for graphics it might make sense to
216 * static map some of that area. Be careful with other things in that area such
217 * as OCRAM that probably shouldn't be mapped as VM_MEMATTR_DEVICE memory.
220 imx6_devmap_init(platform_t plat)
222 const uint32_t IMX6_ARMMP_PHYS = 0x00a00000;
223 const uint32_t IMX6_ARMMP_SIZE = 0x00100000;
224 const uint32_t IMX6_AIPS1_PHYS = 0x02000000;
225 const uint32_t IMX6_AIPS1_SIZE = 0x00100000;
226 const uint32_t IMX6_AIPS2_PHYS = 0x02100000;
227 const uint32_t IMX6_AIPS2_SIZE = 0x00100000;
229 devmap_add_entry(IMX6_ARMMP_PHYS, IMX6_ARMMP_SIZE);
230 devmap_add_entry(IMX6_AIPS1_PHYS, IMX6_AIPS1_SIZE);
231 devmap_add_entry(IMX6_AIPS2_PHYS, IMX6_AIPS2_SIZE);
237 imx6_cpu_reset(platform_t plat)
239 const uint32_t IMX6_WDOG_CR_PHYS = 0x020bc000;
241 imx_wdog_cpu_reset(IMX6_WDOG_CR_PHYS);
245 * Determine what flavor of imx6 we're running on.
247 * This code is based on the way u-boot does it. Information found on the web
248 * indicates that Freescale themselves were the original source of this logic,
249 * including the strange check for number of CPUs in the SCU configuration
250 * register, which is apparently needed on some revisions of the SOLO.
252 * According to the documentation, there is such a thing as an i.MX6 Dual
253 * (non-lite flavor). However, Freescale doesn't seem to have assigned it a
254 * number or provided any logic to handle it in their detection code.
256 * Note that the ANALOG_DIGPROG and SCU configuration registers are not
257 * documented in the chip reference manual. (SCU configuration is mentioned,
258 * but not mapped out in detail.) I think the bottom two bits of the scu config
259 * register may be ncpu-1.
261 * This hasn't been tested yet on a dual[-lite].
264 * digprog = 0x00610001
266 * scu config = 0x00000500
268 * digprog = 0x00630002
270 * scu config = 0x00005503
275 uint32_t digprog, hwsoc;
277 static u_int soctype;
278 const vm_offset_t SCU_CONFIG_PHYSADDR = 0x00a00004;
279 #define HWSOC_MX6SL 0x60
280 #define HWSOC_MX6DL 0x61
281 #define HWSOC_MX6SOLO 0x62
282 #define HWSOC_MX6Q 0x63
283 #define HWSOC_MX6UL 0x64
288 digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG_SL);
289 hwsoc = (digprog >> IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT) &
290 IMX6_ANALOG_DIGPROG_SOCTYPE_MASK;
292 if (hwsoc != HWSOC_MX6SL) {
293 digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG);
294 hwsoc = (digprog & IMX6_ANALOG_DIGPROG_SOCTYPE_MASK) >>
295 IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT;
296 /*printf("digprog = 0x%08x\n", digprog);*/
297 if (hwsoc == HWSOC_MX6DL) {
298 pcr = devmap_ptov(SCU_CONFIG_PHYSADDR, 4);
300 /*printf("scu config = 0x%08x\n", *pcr);*/
301 if ((*pcr & 0x03) == 0) {
302 hwsoc = HWSOC_MX6SOLO;
307 /* printf("hwsoc 0x%08x\n", hwsoc); */
311 soctype = IMXSOC_6SL;
317 soctype = IMXSOC_6DL;
323 soctype = IMXSOC_6UL;
326 printf("imx_soc_type: Don't understand hwsoc 0x%02x, "
327 "digprog 0x%08x; assuming IMXSOC_6Q\n", hwsoc, digprog);
336 * Early putc routine for EARLY_PRINTF support. To use, add to kernel config:
337 * option SOCDEV_PA=0x02000000
338 * option SOCDEV_VA=0x02000000
339 * option EARLY_PRINTF
340 * Resist the temptation to change the #if 0 to #ifdef EARLY_PRINTF here. It
341 * makes sense now, but if multiple SOCs do that it will make early_putc another
342 * duplicate symbol to be eliminated on the path to a generic kernel.
346 imx6_early_putc(int c)
348 volatile uint32_t * UART_STAT_REG = (uint32_t *)0x02020098;
349 volatile uint32_t * UART_TX_REG = (uint32_t *)0x02020040;
350 const uint32_t UART_TXRDY = (1 << 3);
352 while ((*UART_STAT_REG & UART_TXRDY) == 0)
356 early_putc_t *early_putc = imx6_early_putc;
359 static platform_method_t imx6_methods[] = {
360 PLATFORMMETHOD(platform_attach, imx6_attach),
361 PLATFORMMETHOD(platform_devmap_init, imx6_devmap_init),
362 PLATFORMMETHOD(platform_late_init, imx6_late_init),
363 PLATFORMMETHOD(platform_cpu_reset, imx6_cpu_reset),
366 PLATFORMMETHOD(platform_mp_start_ap, imx6_mp_start_ap),
367 PLATFORMMETHOD(platform_mp_setmaxid, imx6_mp_setmaxid),
370 PLATFORMMETHOD(platform_pl310_init, imx6_pl310_init),
375 FDT_PLATFORM_DEF2(imx6, imx6s, "i.MX6 Solo", 0, "fsl,imx6s", 80);
376 FDT_PLATFORM_DEF2(imx6, imx6d, "i.MX6 Dual", 0, "fsl,imx6dl", 80);
377 FDT_PLATFORM_DEF2(imx6, imx6q, "i.MX6 Quad", 0, "fsl,imx6q", 80);
378 FDT_PLATFORM_DEF2(imx6, imx6ul, "i.MX6 UltraLite", 0, "fsl,imx6ul", 67);