2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * Vybrid Family Universal Serial Bus (USB) Controller
31 * Chapter 44-45, Vybrid Reference Manual, Rev. 5, 07/2013
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/kernel.h>
42 #include <sys/module.h>
44 #include <sys/condvar.h>
48 #include <dev/ofw/ofw_bus.h>
49 #include <dev/ofw/ofw_bus_subr.h>
51 #include <dev/usb/usb.h>
52 #include <dev/usb/usbdi.h>
53 #include <dev/usb/usb_busdma.h>
54 #include <dev/usb/usb_process.h>
55 #include <dev/usb/usb_controller.h>
56 #include <dev/usb/usb_bus.h>
57 #include <dev/usb/controller/ehci.h>
58 #include <dev/usb/controller/ehcireg.h>
60 #include <machine/bus.h>
61 #include <machine/resource.h>
64 #include "opt_platform.h"
66 #define ENUTMILEVEL3 (1 << 15)
67 #define ENUTMILEVEL2 (1 << 14)
69 #define GPIO_USB_PWR 134
71 #define USB_ID 0x000 /* Identification register */
72 #define USB_HWGENERAL 0x004 /* Hardware General */
73 #define USB_HWHOST 0x008 /* Host Hardware Parameters */
74 #define USB_HWDEVICE 0x00C /* Device Hardware Parameters */
75 #define USB_HWTXBUF 0x010 /* TX Buffer Hardware Parameters */
76 #define USB_HWRXBUF 0x014 /* RX Buffer Hardware Parameters */
77 #define USB_HCSPARAMS 0x104 /* Host Controller Structural Parameters */
79 #define USBPHY_PWD 0x00 /* PHY Power-Down Register */
80 #define USBPHY_PWD_SET 0x04 /* PHY Power-Down Register */
81 #define USBPHY_PWD_CLR 0x08 /* PHY Power-Down Register */
82 #define USBPHY_PWD_TOG 0x0C /* PHY Power-Down Register */
83 #define USBPHY_TX 0x10 /* PHY Transmitter Control Register */
84 #define USBPHY_RX 0x20 /* PHY Receiver Control Register */
85 #define USBPHY_RX_SET 0x24 /* PHY Receiver Control Register */
86 #define USBPHY_RX_CLR 0x28 /* PHY Receiver Control Register */
87 #define USBPHY_RX_TOG 0x2C /* PHY Receiver Control Register */
88 #define USBPHY_CTRL 0x30 /* PHY General Control Register */
89 #define USBPHY_CTRL_SET 0x34 /* PHY General Control Register */
90 #define USBPHY_CTRL_CLR 0x38 /* PHY General Control Register */
91 #define USBPHY_CTRL_TOG 0x3C /* PHY General Control Register */
92 #define USBPHY_STATUS 0x40 /* PHY Status Register */
93 #define USBPHY_DEBUG 0x50 /* PHY Debug Register */
94 #define USBPHY_DEBUG_SET 0x54 /* PHY Debug Register */
95 #define USBPHY_DEBUG_CLR 0x58 /* PHY Debug Register */
96 #define USBPHY_DEBUG_TOG 0x5C /* PHY Debug Register */
97 #define USBPHY_DEBUG0_STATUS 0x60 /* UTMI Debug Status Register 0 */
98 #define USBPHY_DEBUG1 0x70 /* UTMI Debug Status Register 1 */
99 #define USBPHY_DEBUG1_SET 0x74 /* UTMI Debug Status Register 1 */
100 #define USBPHY_DEBUG1_CLR 0x78 /* UTMI Debug Status Register 1 */
101 #define USBPHY_DEBUG1_TOG 0x7C /* UTMI Debug Status Register 1 */
102 #define USBPHY_VERSION 0x80 /* UTMI RTL Version */
103 #define USBPHY_IP 0x90 /* PHY IP Block Register */
104 #define USBPHY_IP_SET 0x94 /* PHY IP Block Register */
105 #define USBPHY_IP_CLR 0x98 /* PHY IP Block Register */
106 #define USBPHY_IP_TOG 0x9C /* PHY IP Block Register */
108 #define USBPHY_CTRL_SFTRST (1U << 31)
109 #define USBPHY_CTRL_CLKGATE (1 << 30)
110 #define USBPHY_DEBUG_CLKGATE (1 << 30)
112 #define PHY_READ4(_sc, _reg) \
113 bus_space_read_4(_sc->bst_phy, _sc->bsh_phy, _reg)
114 #define PHY_WRITE4(_sc, _reg, _val) \
115 bus_space_write_4(_sc->bst_phy, _sc->bsh_phy, _reg, _val)
117 #define USBC_READ4(_sc, _reg) \
118 bus_space_read_4(_sc->bst_usbc, _sc->bsh_usbc, _reg)
119 #define USBC_WRITE4(_sc, _reg, _val) \
120 bus_space_write_4(_sc->bst_usbc, _sc->bsh_usbc, _reg, _val)
122 /* Forward declarations */
123 static int vybrid_ehci_attach(device_t dev);
124 static int vybrid_ehci_detach(device_t dev);
125 static int vybrid_ehci_probe(device_t dev);
127 struct vybrid_ehci_softc {
130 struct resource *res[6];
131 bus_space_tag_t bst_phy;
132 bus_space_handle_t bsh_phy;
133 bus_space_tag_t bst_usbc;
134 bus_space_handle_t bsh_usbc;
137 static struct resource_spec vybrid_ehci_spec[] = {
138 { SYS_RES_MEMORY, 0, RF_ACTIVE },
139 { SYS_RES_MEMORY, 1, RF_ACTIVE },
140 { SYS_RES_MEMORY, 2, RF_ACTIVE },
141 { SYS_RES_IRQ, 0, RF_ACTIVE },
145 static device_method_t ehci_methods[] = {
146 /* Device interface */
147 DEVMETHOD(device_probe, vybrid_ehci_probe),
148 DEVMETHOD(device_attach, vybrid_ehci_attach),
149 DEVMETHOD(device_detach, vybrid_ehci_detach),
150 DEVMETHOD(device_suspend, bus_generic_suspend),
151 DEVMETHOD(device_resume, bus_generic_resume),
152 DEVMETHOD(device_shutdown, bus_generic_shutdown),
155 DEVMETHOD(bus_print_child, bus_generic_print_child),
160 /* kobj_class definition */
161 static driver_t ehci_driver = {
167 static devclass_t ehci_devclass;
169 DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, 0, 0);
170 MODULE_DEPEND(ehci, usb, 1, 1, 1);
173 vybrid_ehci_post_reset(struct ehci_softc *ehci_softc)
177 /* Force HOST mode */
178 usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_NOLPM);
179 usbmode &= ~EHCI_UM_CM;
180 usbmode |= EHCI_UM_CM_HOST;
181 EOWRITE4(ehci_softc, EHCI_USBMODE_NOLPM, usbmode);
188 vybrid_ehci_probe(device_t dev)
191 if (!ofw_bus_status_okay(dev))
194 if (ofw_bus_is_compatible(dev, "fsl,mvf600-usb-ehci") == 0)
197 device_set_desc(dev, "Vybrid Family integrated USB controller");
198 return (BUS_PROBE_DEFAULT);
202 phy_init(struct vybrid_ehci_softc *esc)
204 device_t sc_gpio_dev;
208 reg = PHY_READ4(esc, USBPHY_CTRL);
209 reg |= (USBPHY_CTRL_SFTRST);
210 PHY_WRITE4(esc, USBPHY_CTRL, reg);
212 /* Minimum reset time */
215 reg &= ~(USBPHY_CTRL_SFTRST | USBPHY_CTRL_CLKGATE);
216 PHY_WRITE4(esc, USBPHY_CTRL, reg);
218 reg = (ENUTMILEVEL2 | ENUTMILEVEL3);
219 PHY_WRITE4(esc, USBPHY_CTRL_SET, reg);
221 /* Get the GPIO device, we need this to give power to USB */
222 sc_gpio_dev = devclass_get_device(devclass_find("gpio"), 0);
223 if (sc_gpio_dev == NULL) {
224 device_printf(esc->dev, "Error: failed to get the GPIO dev\n");
228 /* Give power to USB */
229 GPIO_PIN_SETFLAGS(sc_gpio_dev, GPIO_USB_PWR, GPIO_PIN_OUTPUT);
230 GPIO_PIN_SET(sc_gpio_dev, GPIO_USB_PWR, GPIO_PIN_HIGH);
233 PHY_WRITE4(esc, USBPHY_PWD, 0x00);
236 reg = PHY_READ4(esc, USBPHY_DEBUG);
237 reg &= ~(USBPHY_DEBUG_CLKGATE);
238 PHY_WRITE4(esc, USBPHY_DEBUG, reg);
241 printf("USBPHY_CTRL == 0x%08x\n",
242 PHY_READ4(esc, USBPHY_CTRL));
243 printf("USBPHY_IP == 0x%08x\n",
244 PHY_READ4(esc, USBPHY_IP));
245 printf("USBPHY_STATUS == 0x%08x\n",
246 PHY_READ4(esc, USBPHY_STATUS));
247 printf("USBPHY_DEBUG == 0x%08x\n",
248 PHY_READ4(esc, USBPHY_DEBUG));
249 printf("USBPHY_DEBUG0_STATUS == 0x%08x\n",
250 PHY_READ4(esc, USBPHY_DEBUG0_STATUS));
251 printf("USBPHY_DEBUG1 == 0x%08x\n",
252 PHY_READ4(esc, USBPHY_DEBUG1));
259 vybrid_ehci_attach(device_t dev)
261 struct vybrid_ehci_softc *esc;
263 bus_space_handle_t bsh;
267 esc = device_get_softc(dev);
271 sc->sc_bus.parent = dev;
272 sc->sc_bus.devices = sc->sc_devices;
273 sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
274 sc->sc_bus.dma_bits = 32;
276 if (bus_alloc_resources(dev, vybrid_ehci_spec, esc->res)) {
277 device_printf(dev, "could not allocate resources\n");
282 sc->sc_io_tag = rman_get_bustag(esc->res[0]);
283 bsh = rman_get_bushandle(esc->res[0]);
284 sc->sc_io_size = rman_get_size(esc->res[0]);
286 esc->bst_usbc = rman_get_bustag(esc->res[1]);
287 esc->bsh_usbc = rman_get_bushandle(esc->res[1]);
289 esc->bst_phy = rman_get_bustag(esc->res[2]);
290 esc->bsh_phy = rman_get_bushandle(esc->res[2]);
292 /* get all DMA memory */
293 if (usb_bus_mem_alloc_all(&sc->sc_bus, USB_GET_DMA_TAG(dev),
294 &ehci_iterate_hw_softc))
298 printf("USBx_HCSPARAMS is 0x%08x\n",
299 bus_space_read_4(sc->sc_io_tag, bsh, USB_HCSPARAMS));
300 printf("USB_ID == 0x%08x\n",
301 bus_space_read_4(sc->sc_io_tag, bsh, USB_ID));
302 printf("USB_HWGENERAL == 0x%08x\n",
303 bus_space_read_4(sc->sc_io_tag, bsh, USB_HWGENERAL));
304 printf("USB_HWHOST == 0x%08x\n",
305 bus_space_read_4(sc->sc_io_tag, bsh, USB_HWHOST));
306 printf("USB_HWDEVICE == 0x%08x\n",
307 bus_space_read_4(sc->sc_io_tag, bsh, USB_HWDEVICE));
308 printf("USB_HWTXBUF == 0x%08x\n",
309 bus_space_read_4(sc->sc_io_tag, bsh, USB_HWTXBUF));
310 printf("USB_HWRXBUF == 0x%08x\n",
311 bus_space_read_4(sc->sc_io_tag, bsh, USB_HWRXBUF));
315 device_printf(dev, "Could not setup PHY\n");
320 * Set handle to USB related registers subregion used by
321 * generic EHCI driver.
323 err = bus_space_subregion(sc->sc_io_tag, bsh, 0x100,
324 sc->sc_io_size, &sc->sc_io_hdl);
328 /* Setup interrupt handler */
329 err = bus_setup_intr(dev, esc->res[3], INTR_TYPE_BIO | INTR_MPSAFE,
330 NULL, (driver_intr_t *)ehci_interrupt, sc,
333 device_printf(dev, "Could not setup irq, "
339 sc->sc_bus.bdev = device_add_child(dev, "usbus", -1);
340 if (!sc->sc_bus.bdev) {
341 device_printf(dev, "Could not add USB device\n");
342 err = bus_teardown_intr(dev, esc->res[5],
345 device_printf(dev, "Could not tear down irq,"
349 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
351 strlcpy(sc->sc_vendor, "Freescale", sizeof(sc->sc_vendor));
354 reg = bus_space_read_4(sc->sc_io_tag, sc->sc_io_hdl, 0xA8);
356 bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, 0xA8, reg);
358 /* Set flags and callbacks*/
359 sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM;
360 sc->sc_vendor_post_reset = vybrid_ehci_post_reset;
361 sc->sc_vendor_get_port_speed = ehci_get_port_speed_portsc;
365 sc->sc_flags |= EHCI_SCFLG_DONEINIT;
366 err = device_probe_and_attach(sc->sc_bus.bdev);
368 device_printf(dev, "USB init failed err=%d\n", err);
370 device_delete_child(dev, sc->sc_bus.bdev);
371 sc->sc_bus.bdev = NULL;
373 err = bus_teardown_intr(dev, esc->res[5],
376 device_printf(dev, "Could not tear down irq,"
384 vybrid_ehci_detach(device_t dev)
386 struct vybrid_ehci_softc *esc;
390 esc = device_get_softc(dev);
393 if (sc->sc_flags & EHCI_SCFLG_DONEINIT)
397 * only call ehci_detach() after ehci_init()
399 if (sc->sc_flags & EHCI_SCFLG_DONEINIT) {
401 sc->sc_flags &= ~EHCI_SCFLG_DONEINIT;
405 * Disable interrupts that might have been switched on in
408 if (sc->sc_io_tag && sc->sc_io_hdl)
409 bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl,
412 if (esc->res[5] && sc->sc_intr_hdl) {
413 err = bus_teardown_intr(dev, esc->res[5],
416 device_printf(dev, "Could not tear down irq,"
420 sc->sc_intr_hdl = NULL;
423 if (sc->sc_bus.bdev) {
424 device_delete_child(dev, sc->sc_bus.bdev);
425 sc->sc_bus.bdev = NULL;
428 /* During module unload there are lots of children leftover */
429 device_delete_children(dev);
431 bus_release_resources(dev, vybrid_ehci_spec, esc->res);