1 /* $NetBSD: cpu.h,v 1.2 2001/02/23 21:23:52 reinoud Exp $ */
7 #include <machine/armreg.h>
8 #include <machine/frame.h>
14 static __inline uint64_t
17 /* This '#if' asks the question 'Does CP15/SCC include performance counters?' */
18 #if defined(CPU_ARM1136) || defined(CPU_ARM1176) \
19 || defined(CPU_MV_PJ4B) \
20 || defined(CPU_CORTEXA) || defined(CPU_KRAIT)
25 * Read PMCCNTR. Curses! Its only 32 bits.
26 * TODO: Fix this by catching overflow with interrupt?
28 __asm __volatile("mrc p15, 0, %0, c9, c13, 0": "=r" (ccnt));
29 ccnt64 = (uint64_t)ccnt;
31 #else /* No performance counters, so use binuptime(9). This is slooooow */
35 return ((uint64_t)bt.sec << 56 | bt.frac >> 8);
40 #define TRAPF_USERMODE(frame) ((frame->tf_spsr & PSR_MODE) == PSR_USR32_MODE)
42 #define TRAPF_PC(tfp) ((tfp)->tf_pc)
44 #define cpu_getstack(td) ((td)->td_frame->tf_usr_sp)
45 #define cpu_setstack(td, sp) ((td)->td_frame->tf_usr_sp = (sp))
46 #define cpu_spinwait() /* nothing */
49 #define ARM_VEC_ALL 0xffffffff
51 extern vm_offset_t vector_page;
54 * Params passed into initarm. If you change the size of this you will
55 * need to update locore.S to allocate more memory on the stack before
58 struct arm_boot_params {
59 register_t abp_size; /* Size of this structure */
60 register_t abp_r0; /* r0 from the boot loader */
61 register_t abp_r1; /* r1 from the boot loader */
62 register_t abp_r2; /* r2 from the boot loader */
63 register_t abp_r3; /* r3 from the boot loader */
64 vm_offset_t abp_physaddr; /* The kernel physical address */
65 vm_offset_t abp_pagetable; /* The early page table */
68 void arm_vector_init(vm_offset_t, int);
69 void fork_trampoline(void);
70 void identify_arm_cpu(void);
71 void *initarm(struct arm_boot_params *);
75 int badaddr_read(void *, size_t, void *);
76 #endif /* !MACHINE_CPU_H */