1 /* $NetBSD: intr.h,v 1.7 2003/06/16 20:01:00 thorpej Exp $ */
4 * Copyright (c) 1997 Mark Brinicombe.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Mark Brinicombe
18 * for the NetBSD Project.
19 * 4. The name of the company nor the name of the author may be used to
20 * endorse or promote products derived from this software without specific
21 * prior written permission.
23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
24 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
25 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 #ifndef _MACHINE_INTR_H_
40 #define _MACHINE_INTR_H_
43 #include <dev/ofw/openfirm.h>
49 #define NIRQ 1024 /* XXX - It should be an option. */
53 #define INTR_SOLO INTR_MD1
54 typedef int intr_irq_filter_t(void *arg, struct trapframe *tf);
56 typedef int intr_irq_filter_t(void *arg);
59 #define INTR_ISRC_NAMELEN (MAXCOMLEN + 1)
61 typedef void intr_ipi_filter_t(void *arg);
68 #define INTR_ISRCF_REGISTERED 0x01 /* registered in a controller */
69 #define INTR_ISRCF_PERCPU 0x02 /* per CPU interrupt */
70 #define INTR_ISRCF_BOUND 0x04 /* bound to a CPU */
72 /* Interrupt source definition. */
74 device_t isrc_dev; /* where isrc is mapped */
75 intptr_t isrc_xref; /* device reference key */
76 uintptr_t isrc_data; /* device data for isrc */
77 u_int isrc_irq; /* unique identificator */
78 enum intr_isrc_type isrc_type; /* how is isrc decribed */
80 char isrc_name[INTR_ISRC_NAMELEN];
81 uint16_t isrc_nspc_type;
82 uint16_t isrc_nspc_num;
83 enum intr_trigger isrc_trig;
84 enum intr_polarity isrc_pol;
85 cpuset_t isrc_cpu; /* on which CPUs is enabled */
89 struct intr_event * isrc_event;
90 intr_irq_filter_t * isrc_filter;
91 intr_ipi_filter_t * isrc_ipifilter;
95 pcell_t isrc_cells[]; /* leave it last */
99 void intr_irq_set_name(struct intr_irqsrc *isrc, const char *fmt, ...)
102 void intr_irq_dispatch(struct intr_irqsrc *isrc, struct trapframe *tf);
104 #define INTR_IRQ_NSPC_NONE 0
105 #define INTR_IRQ_NSPC_PLAIN 1
106 #define INTR_IRQ_NSPC_IRQ 2
107 #define INTR_IRQ_NSPC_IPI 3
109 u_int intr_namespace_map_irq(device_t dev, uint16_t type, uint16_t num);
111 u_int intr_fdt_map_irq(phandle_t, pcell_t *, u_int);
114 int intr_pic_register(device_t dev, intptr_t xref);
115 int intr_pic_unregister(device_t dev, intptr_t xref);
116 int intr_pic_claim_root(device_t dev, intptr_t xref, intr_irq_filter_t *filter,
117 void *arg, u_int ipicount);
119 int intr_irq_add_handler(device_t dev, driver_filter_t, driver_intr_t, void *,
120 u_int, int, void **);
121 int intr_irq_remove_handler(device_t dev, u_int, void *);
122 int intr_irq_config(u_int, enum intr_trigger, enum intr_polarity);
123 int intr_irq_describe(u_int, void *, const char *);
125 u_int intr_irq_next_cpu(u_int current_cpu, cpuset_t *cpumask);
128 int intr_irq_bind(u_int, int);
130 void intr_ipi_dispatch(struct intr_irqsrc *isrc, struct trapframe *tf);
132 #define AISHF_NOALLOC 0x0001
134 int intr_ipi_set_handler(u_int ipi, const char *name, intr_ipi_filter_t *filter,
135 void *arg, u_int flags);
137 void intr_pic_init_secondary(void);
140 #else /* ARM_INTRNG */
142 /* XXX move to std.* files? */
143 #ifdef CPU_XSCALE_81342
145 #elif defined(CPU_XSCALE_PXA2X0)
146 #include <arm/xscale/pxa/pxareg.h>
147 #define NIRQ IRQ_GPIO_MAX
148 #elif defined(SOC_MV_DISCOVERY)
150 #elif defined(CPU_ARM9) || defined(SOC_MV_KIRKWOOD) || \
151 defined(CPU_XSCALE_IXP435)
153 #elif defined(CPU_CORTEXA)
155 #elif defined(CPU_KRAIT)
157 #elif defined(CPU_ARM1176)
159 #elif defined(SOC_MV_ARMADAXP)
160 #define MAIN_IRQ_NUM 116
161 #define ERR_IRQ_NUM 32
162 #define ERR_IRQ (MAIN_IRQ_NUM)
163 #define MSI_IRQ_NUM 32
164 #define MSI_IRQ (ERR_IRQ + ERR_IRQ_NUM)
165 #define NIRQ (MAIN_IRQ_NUM + ERR_IRQ_NUM + MSI_IRQ_NUM)
170 int arm_get_next_irq(int);
171 void arm_mask_irq(uintptr_t);
172 void arm_unmask_irq(uintptr_t);
173 void arm_intrnames_init(void);
174 void arm_setup_irqhandler(const char *, int (*)(void*), void (*)(void*),
175 void *, int, int, void **);
176 int arm_remove_irqhandler(int, void *);
177 extern void (*arm_post_filter)(void *);
178 extern int (*arm_config_irq)(int irq, enum intr_trigger trig,
179 enum intr_polarity pol);
181 void intr_pic_init_secondary(void);
184 int gic_decode_fdt(phandle_t, pcell_t *, int *, int *, int *);
185 int intr_fdt_map_irq(phandle_t, pcell_t *, int);
188 #endif /* ARM_INTRNG */
190 void arm_irq_memory_barrier(uintptr_t);
192 #endif /* _MACHINE_INTR_H */