2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 2001 David E. O'Brien
5 * Copyright (c) 1990 The Regents of the University of California.
8 * This code is derived from software contributed to Berkeley by
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20 * must display the following acknowledgement:
21 * This product includes software developed by the University of
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39 * from: @(#)param.h 5.8 (Berkeley) 6/28/91
42 #ifndef _ARM_INCLUDE_PARAM_H_
43 #define _ARM_INCLUDE_PARAM_H_
46 * Machine dependent constants for StrongARM
49 #include <machine/_align.h>
51 #define STACKALIGNBYTES (8 - 1)
52 #define STACKALIGN(p) ((u_int)(p) & ~STACKALIGNBYTES)
54 #define __PCI_REROUTE_INTERRUPT
61 #define MACHINE_ARCH "armv7"
63 #define MACHINE_ARCH "armv6"
79 #define ALIGNBYTES _ALIGNBYTES
80 #define ALIGN(p) _ALIGN(p)
82 * ALIGNED_POINTER is a boolean macro that checks whether an address
83 * is valid to fetch data elements of type t from on this architecture.
84 * This does not reflect the optimal alignment, just the possibility
85 * (within reasonable limits).
87 * armv4 and v5 require alignment to the type's size. armv6 requires 8-byte
88 * alignment for the ldrd/strd instructions, but otherwise follows armv7 rules.
89 * armv7 requires that an 8-byte type be aligned to at least a 4-byte boundary;
90 * access to smaller types can be unaligned, except that the compiler may
91 * optimize access to adjacent uint32_t values into a single load/store-multiple
92 * instruction which requires 4-byte alignment, so we must provide the most-
93 * pessimistic answer possible even on armv7.
95 #define ALIGNED_POINTER(p, t) ((((unsigned)(p)) & (sizeof(t)-1)) == 0)
98 * CACHE_LINE_SIZE is the compile-time maximum cache line size for an
99 * architecture. It should be used with appropriate caution.
101 #define CACHE_LINE_SHIFT 6
102 #define CACHE_LINE_SIZE (1 << CACHE_LINE_SHIFT)
104 #define PAGE_SHIFT 12
105 #define PAGE_SIZE (1 << PAGE_SHIFT) /* Page size */
106 #define PAGE_MASK (PAGE_SIZE - 1)
108 #define PDR_SHIFT 20 /* log2(NBPDR) */
109 #define NBPDR (1 << PDR_SHIFT)
110 #define PDRMASK (NBPDR - 1)
111 #define NPDEPG (1 << (32 - PDR_SHIFT))
113 #define MAXPAGESIZES 2 /* maximum number of supported page sizes */
116 #define KSTACK_PAGES 2
117 #endif /* !KSTACK_PAGES */
119 #ifndef FPCONTEXTSIZE
120 #define FPCONTEXTSIZE (0x100)
123 #ifndef KSTACK_GUARD_PAGES
124 #define KSTACK_GUARD_PAGES 1
125 #endif /* !KSTACK_GUARD_PAGES */
127 #define USPACE_SVC_STACK_TOP (kstack_pages * PAGE_SIZE)
130 * Mach derived conversion macros
132 #define trunc_page(x) ((x) & ~PAGE_MASK)
133 #define round_page(x) (((x) + PAGE_MASK) & ~PAGE_MASK)
134 #define trunc_1mpage(x) ((unsigned)(x) & ~PDRMASK)
135 #define round_1mpage(x) ((((unsigned)(x)) + PDRMASK) & ~PDRMASK)
137 #define atop(x) ((unsigned)(x) >> PAGE_SHIFT)
138 #define ptoa(x) ((unsigned)(x) << PAGE_SHIFT)
140 #define arm32_btop(x) ((unsigned)(x) >> PAGE_SHIFT)
141 #define arm32_ptob(x) ((unsigned)(x) << PAGE_SHIFT)
143 #define pgtok(x) ((x) * (PAGE_SIZE / 1024))
145 #endif /* !_ARM_INCLUDE_PARAM_H_ */