2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 2001 David E. O'Brien
5 * Copyright (c) 1990 The Regents of the University of California.
8 * This code is derived from software contributed to Berkeley by
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20 * must display the following acknowledgement:
21 * This product includes software developed by the University of
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39 * from: @(#)param.h 5.8 (Berkeley) 6/28/91
43 #ifndef _ARM_INCLUDE_PARAM_H_
44 #define _ARM_INCLUDE_PARAM_H_
47 * Machine dependent constants for StrongARM
50 #include <machine/_align.h>
52 #define STACKALIGNBYTES (8 - 1)
53 #define STACKALIGN(p) ((u_int)(p) & ~STACKALIGNBYTES)
55 #define __PCI_REROUTE_INTERRUPT
62 #define MACHINE_ARCH "armv7"
64 #define MACHINE_ARCH "armv6"
80 #define ALIGNBYTES _ALIGNBYTES
81 #define ALIGN(p) _ALIGN(p)
83 * ALIGNED_POINTER is a boolean macro that checks whether an address
84 * is valid to fetch data elements of type t from on this architecture.
85 * This does not reflect the optimal alignment, just the possibility
86 * (within reasonable limits).
88 * armv4 and v5 require alignment to the type's size. armv6 requires 8-byte
89 * alignment for the ldrd/strd instructions, but otherwise follows armv7 rules.
90 * armv7 requires that an 8-byte type be aligned to at least a 4-byte boundary;
91 * access to smaller types can be unaligned, except that the compiler may
92 * optimize access to adjacent uint32_t values into a single load/store-multiple
93 * instruction which requires 4-byte alignment, so we must provide the most-
94 * pessimistic answer possible even on armv7.
96 #define ALIGNED_POINTER(p, t) ((((unsigned)(p)) & (sizeof(t)-1)) == 0)
99 * CACHE_LINE_SIZE is the compile-time maximum cache line size for an
100 * architecture. It should be used with appropriate caution.
102 #define CACHE_LINE_SHIFT 6
103 #define CACHE_LINE_SIZE (1 << CACHE_LINE_SHIFT)
105 #define PAGE_SHIFT 12
106 #define PAGE_SIZE (1 << PAGE_SHIFT) /* Page size */
107 #define PAGE_MASK (PAGE_SIZE - 1)
109 #define PDR_SHIFT 20 /* log2(NBPDR) */
110 #define NBPDR (1 << PDR_SHIFT)
111 #define PDRMASK (NBPDR - 1)
112 #define NPDEPG (1 << (32 - PDR_SHIFT))
114 #define MAXPAGESIZES 2 /* maximum number of supported page sizes */
117 #define KSTACK_PAGES 2
118 #endif /* !KSTACK_PAGES */
120 #ifndef FPCONTEXTSIZE
121 #define FPCONTEXTSIZE (0x100)
124 #ifndef KSTACK_GUARD_PAGES
125 #define KSTACK_GUARD_PAGES 1
126 #endif /* !KSTACK_GUARD_PAGES */
128 #define USPACE_SVC_STACK_TOP (kstack_pages * PAGE_SIZE)
131 * Mach derived conversion macros
133 #define trunc_page(x) ((x) & ~PAGE_MASK)
134 #define round_page(x) (((x) + PAGE_MASK) & ~PAGE_MASK)
135 #define trunc_1mpage(x) ((unsigned)(x) & ~PDRMASK)
136 #define round_1mpage(x) ((((unsigned)(x)) + PDRMASK) & ~PDRMASK)
138 #define atop(x) ((unsigned)(x) >> PAGE_SHIFT)
139 #define ptoa(x) ((unsigned)(x) << PAGE_SHIFT)
141 #define arm32_btop(x) ((unsigned)(x) >> PAGE_SHIFT)
142 #define arm32_ptob(x) ((unsigned)(x) << PAGE_SHIFT)
144 #define pgtok(x) ((x) * (PAGE_SIZE / 1024))
146 #endif /* !_ARM_INCLUDE_PARAM_H_ */