2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2010 Jakub Wojciech Klama <jceel@FreeBSD.org>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
33 #include <sys/param.h>
34 #include <sys/systm.h>
36 #include <sys/kernel.h>
37 #include <sys/module.h>
38 #include <sys/malloc.h>
40 #include <sys/timetc.h>
41 #include <machine/bus.h>
42 #include <machine/intr.h>
44 #include <dev/fdt/fdt_common.h>
45 #include <dev/ofw/openfirm.h>
47 #include <dev/ofw/ofw_bus.h>
48 #include <dev/ofw/ofw_bus_subr.h>
50 #include <arm/lpc/lpcreg.h>
52 struct lpc_intc_softc {
53 struct resource * li_res;
54 bus_space_tag_t li_bst;
55 bus_space_handle_t li_bsh;
58 static int lpc_intc_probe(device_t);
59 static int lpc_intc_attach(device_t);
60 static void lpc_intc_eoi(void *);
62 static struct lpc_intc_softc *intc_softc = NULL;
64 #define intc_read_4(_sc, _reg) \
65 bus_space_read_4((_sc)->li_bst, (_sc)->li_bsh, (_reg))
66 #define intc_write_4(_sc, _reg, _val) \
67 bus_space_write_4((_sc)->li_bst, (_sc)->li_bsh, (_reg), (_val))
70 lpc_intc_probe(device_t dev)
73 if (!ofw_bus_status_okay(dev))
76 if (!ofw_bus_is_compatible(dev, "lpc,pic"))
79 device_set_desc(dev, "LPC32x0 Interrupt Controller");
80 return (BUS_PROBE_DEFAULT);
84 lpc_intc_attach(device_t dev)
86 struct lpc_intc_softc *sc = device_get_softc(dev);
92 sc->li_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
95 device_printf(dev, "could not alloc resources\n");
99 sc->li_bst = rman_get_bustag(sc->li_res);
100 sc->li_bsh = rman_get_bushandle(sc->li_res);
102 arm_post_filter = lpc_intc_eoi;
104 /* Clear interrupt status registers and disable all interrupts */
105 intc_write_4(sc, LPC_INTC_MIC_ER, 0);
106 intc_write_4(sc, LPC_INTC_SIC1_ER, 0);
107 intc_write_4(sc, LPC_INTC_SIC2_ER, 0);
108 intc_write_4(sc, LPC_INTC_MIC_RSR, ~0);
109 intc_write_4(sc, LPC_INTC_SIC1_RSR, ~0);
110 intc_write_4(sc, LPC_INTC_SIC2_RSR, ~0);
114 static device_method_t lpc_intc_methods[] = {
115 DEVMETHOD(device_probe, lpc_intc_probe),
116 DEVMETHOD(device_attach, lpc_intc_attach),
120 static driver_t lpc_intc_driver = {
123 sizeof(struct lpc_intc_softc),
126 static devclass_t lpc_intc_devclass;
128 DRIVER_MODULE(pic, simplebus, lpc_intc_driver, lpc_intc_devclass, 0, 0);
131 arm_get_next_irq(int last)
133 struct lpc_intc_softc *sc = intc_softc;
137 /* IRQs 0-31 are mapped to LPC_INTC_MIC_SR */
138 value = intc_read_4(sc, LPC_INTC_MIC_SR);
139 for (i = 0; i < 32; i++) {
140 if (value & (1 << i))
144 /* IRQs 32-63 are mapped to LPC_INTC_SIC1_SR */
145 value = intc_read_4(sc, LPC_INTC_SIC1_SR);
146 for (i = 0; i < 32; i++) {
147 if (value & (1 << i))
151 /* IRQs 64-95 are mapped to LPC_INTC_SIC2_SR */
152 value = intc_read_4(sc, LPC_INTC_SIC2_SR);
153 for (i = 0; i < 32; i++) {
154 if (value & (1 << i))
162 arm_mask_irq(uintptr_t nb)
164 struct lpc_intc_softc *sc = intc_softc;
168 /* Make sure that interrupt isn't active already */
169 lpc_intc_eoi((void *)nb);
173 reg = LPC_INTC_SIC2_ER;
174 } else if (nb > 31) {
176 reg = LPC_INTC_SIC1_ER;
178 reg = LPC_INTC_MIC_ER;
180 /* Clear bit in ER register */
181 value = intc_read_4(sc, reg);
183 intc_write_4(sc, reg, value);
187 arm_unmask_irq(uintptr_t nb)
189 struct lpc_intc_softc *sc = intc_softc;
195 reg = LPC_INTC_SIC2_ER;
196 } else if (nb > 31) {
198 reg = LPC_INTC_SIC1_ER;
200 reg = LPC_INTC_MIC_ER;
202 /* Set bit in ER register */
203 value = intc_read_4(sc, reg);
205 intc_write_4(sc, reg, value);
209 lpc_intc_eoi(void *data)
211 struct lpc_intc_softc *sc = intc_softc;
218 reg = LPC_INTC_SIC2_RSR;
219 } else if (nb > 31) {
221 reg = LPC_INTC_SIC1_RSR;
223 reg = LPC_INTC_MIC_RSR;
225 /* Set bit in RSR register */
226 value = intc_read_4(sc, reg);
228 intc_write_4(sc, reg, value);
234 fdt_pic_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig,
237 if (!ofw_bus_node_is_compatible(node, "lpc,pic"))
240 *interrupt = fdt32_to_cpu(intr[0]);
241 *trig = INTR_TRIGGER_CONFORM;
242 *pol = INTR_POLARITY_CONFORM;
246 fdt_pic_decode_t fdt_pic_table[] = {