2 * Copyright (c) 2010 Jakub Wojciech Klama <jceel@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
32 #include <sys/systm.h>
34 #include <sys/kernel.h>
35 #include <sys/module.h>
36 #include <sys/malloc.h>
38 #include <sys/timetc.h>
39 #include <machine/bus.h>
40 #include <machine/intr.h>
42 #include <dev/fdt/fdt_common.h>
43 #include <dev/ofw/openfirm.h>
45 #include <dev/ofw/ofw_bus.h>
46 #include <dev/ofw/ofw_bus_subr.h>
48 #include <arm/lpc/lpcreg.h>
50 struct lpc_intc_softc {
51 struct resource * li_res;
52 bus_space_tag_t li_bst;
53 bus_space_handle_t li_bsh;
56 static int lpc_intc_probe(device_t);
57 static int lpc_intc_attach(device_t);
58 static void lpc_intc_eoi(void *);
60 static struct lpc_intc_softc *intc_softc = NULL;
62 #define intc_read_4(_sc, _reg) \
63 bus_space_read_4((_sc)->li_bst, (_sc)->li_bsh, (_reg))
64 #define intc_write_4(_sc, _reg, _val) \
65 bus_space_write_4((_sc)->li_bst, (_sc)->li_bsh, (_reg), (_val))
68 lpc_intc_probe(device_t dev)
71 if (!ofw_bus_status_okay(dev))
74 if (!ofw_bus_is_compatible(dev, "lpc,pic"))
77 device_set_desc(dev, "LPC32x0 Interrupt Controller");
78 return (BUS_PROBE_DEFAULT);
82 lpc_intc_attach(device_t dev)
84 struct lpc_intc_softc *sc = device_get_softc(dev);
90 sc->li_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
93 device_printf(dev, "could not alloc resources\n");
97 sc->li_bst = rman_get_bustag(sc->li_res);
98 sc->li_bsh = rman_get_bushandle(sc->li_res);
100 arm_post_filter = lpc_intc_eoi;
102 /* Clear interrupt status registers and disable all interrupts */
103 intc_write_4(sc, LPC_INTC_MIC_ER, 0);
104 intc_write_4(sc, LPC_INTC_SIC1_ER, 0);
105 intc_write_4(sc, LPC_INTC_SIC2_ER, 0);
106 intc_write_4(sc, LPC_INTC_MIC_RSR, ~0);
107 intc_write_4(sc, LPC_INTC_SIC1_RSR, ~0);
108 intc_write_4(sc, LPC_INTC_SIC2_RSR, ~0);
112 static device_method_t lpc_intc_methods[] = {
113 DEVMETHOD(device_probe, lpc_intc_probe),
114 DEVMETHOD(device_attach, lpc_intc_attach),
118 static driver_t lpc_intc_driver = {
121 sizeof(struct lpc_intc_softc),
124 static devclass_t lpc_intc_devclass;
126 DRIVER_MODULE(pic, simplebus, lpc_intc_driver, lpc_intc_devclass, 0, 0);
129 arm_get_next_irq(int last)
131 struct lpc_intc_softc *sc = intc_softc;
135 /* IRQs 0-31 are mapped to LPC_INTC_MIC_SR */
136 value = intc_read_4(sc, LPC_INTC_MIC_SR);
137 for (i = 0; i < 32; i++) {
138 if (value & (1 << i))
142 /* IRQs 32-63 are mapped to LPC_INTC_SIC1_SR */
143 value = intc_read_4(sc, LPC_INTC_SIC1_SR);
144 for (i = 0; i < 32; i++) {
145 if (value & (1 << i))
149 /* IRQs 64-95 are mapped to LPC_INTC_SIC2_SR */
150 value = intc_read_4(sc, LPC_INTC_SIC2_SR);
151 for (i = 0; i < 32; i++) {
152 if (value & (1 << i))
160 arm_mask_irq(uintptr_t nb)
162 struct lpc_intc_softc *sc = intc_softc;
166 /* Make sure that interrupt isn't active already */
167 lpc_intc_eoi((void *)nb);
171 reg = LPC_INTC_SIC2_ER;
172 } else if (nb > 31) {
174 reg = LPC_INTC_SIC1_ER;
176 reg = LPC_INTC_MIC_ER;
178 /* Clear bit in ER register */
179 value = intc_read_4(sc, reg);
181 intc_write_4(sc, reg, value);
185 arm_unmask_irq(uintptr_t nb)
187 struct lpc_intc_softc *sc = intc_softc;
193 reg = LPC_INTC_SIC2_ER;
194 } else if (nb > 31) {
196 reg = LPC_INTC_SIC1_ER;
198 reg = LPC_INTC_MIC_ER;
200 /* Set bit in ER register */
201 value = intc_read_4(sc, reg);
203 intc_write_4(sc, reg, value);
207 lpc_intc_eoi(void *data)
209 struct lpc_intc_softc *sc = intc_softc;
216 reg = LPC_INTC_SIC2_RSR;
217 } else if (nb > 31) {
219 reg = LPC_INTC_SIC1_RSR;
221 reg = LPC_INTC_MIC_RSR;
223 /* Set bit in RSR register */
224 value = intc_read_4(sc, reg);
226 intc_write_4(sc, reg, value);
232 fdt_pic_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig,
235 if (!ofw_bus_node_is_compatible(node, "lpc,pic"))
238 *interrupt = fdt32_to_cpu(intr[0]);
239 *trig = INTR_TRIGGER_CONFORM;
240 *pol = INTR_POLARITY_CONFORM;
244 fdt_pic_decode_t fdt_pic_table[] = {