2 * Copyright (c) 2011 Jakub Wojciech Klama <jceel@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include <sys/stdint.h>
31 #include <sys/stddef.h>
32 #include <sys/param.h>
33 #include <sys/queue.h>
34 #include <sys/types.h>
35 #include <sys/systm.h>
36 #include <sys/kernel.h>
38 #include <sys/module.h>
40 #include <sys/mutex.h>
41 #include <sys/condvar.h>
42 #include <sys/sysctl.h>
45 #include <sys/unistd.h>
46 #include <sys/callout.h>
47 #include <sys/malloc.h>
52 #include <dev/ofw/ofw_bus.h>
53 #include <dev/ofw/ofw_bus_subr.h>
55 #include <dev/usb/usb.h>
56 #include <dev/usb/usbdi.h>
58 #include <dev/usb/usb_core.h>
59 #include <dev/usb/usb_busdma.h>
60 #include <dev/usb/usb_process.h>
61 #include <dev/usb/usb_util.h>
63 #include <dev/usb/usb_controller.h>
64 #include <dev/usb/usb_bus.h>
65 #include <dev/usb/controller/ohci.h>
66 #include <dev/usb/controller/ohcireg.h>
68 #include <arm/lpc/lpcreg.h>
69 #include <arm/lpc/lpcvar.h>
71 #define I2C_START_BIT (1 << 8)
72 #define I2C_STOP_BIT (1 << 9)
74 #define I2C_WRITE 0x00
75 #define DUMMY_BYTE 0x55
77 #define lpc_otg_read_4(_sc, _reg) \
78 bus_space_read_4(_sc->sc_io_tag, _sc->sc_io_hdl, _reg)
79 #define lpc_otg_write_4(_sc, _reg, _value) \
80 bus_space_write_4(_sc->sc_io_tag, _sc->sc_io_hdl, _reg, _value)
81 #define lpc_otg_wait_write_4(_sc, _wreg, _sreg, _value) \
83 lpc_otg_write_4(_sc, _wreg, _value); \
84 while ((lpc_otg_read_4(_sc, _sreg) & _value) != _value); \
87 static int lpc_ohci_probe(device_t dev);
88 static int lpc_ohci_attach(device_t dev);
89 static int lpc_ohci_detach(device_t dev);
91 static void lpc_otg_i2c_reset(struct ohci_softc *);
93 static int lpc_isp3101_read(struct ohci_softc *, int);
94 static void lpc_isp3101_write(struct ohci_softc *, int, int);
95 static void lpc_isp3101_clear(struct ohci_softc *, int, int);
96 static void lpc_isp3101_configure(device_t dev, struct ohci_softc *);
99 lpc_ohci_probe(device_t dev)
101 if (!ofw_bus_is_compatible(dev, "lpc,usb-ohci"))
104 device_set_desc(dev, "LPC32x0 USB OHCI controller");
105 return (BUS_PROBE_DEFAULT);
109 lpc_ohci_attach(device_t dev)
111 struct ohci_softc *sc = device_get_softc(dev);
118 sc->sc_bus.parent = dev;
119 sc->sc_bus.devices = sc->sc_devices;
120 sc->sc_bus.devices_max = OHCI_MAX_DEVICES;
122 if (usb_bus_mem_alloc_all(&sc->sc_bus, USB_GET_DMA_TAG(dev),
123 &ohci_iterate_hw_softc))
127 sc->sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
128 if (!sc->sc_io_res) {
129 device_printf(dev, "cannot map OHCI register space\n");
133 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
134 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
135 sc->sc_io_size = rman_get_size(sc->sc_io_res);
138 sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
139 if (sc->sc_irq_res == NULL) {
140 device_printf(dev, "cannot allocate interrupt\n");
144 sc->sc_bus.bdev = device_add_child(dev, "usbus", -1);
145 if (!(sc->sc_bus.bdev))
148 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
149 strlcpy(sc->sc_vendor, "NXP", sizeof(sc->sc_vendor));
151 err = bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
152 NULL, (void *)ohci_interrupt, sc, &sc->sc_intr_hdl);
154 sc->sc_intr_hdl = NULL;
158 usbctrl = lpc_pwr_read(dev, LPC_CLKPWR_USB_CTRL);
159 usbctrl |= LPC_CLKPWR_USB_CTRL_SLAVE_HCLK | LPC_CLKPWR_USB_CTRL_BUSKEEPER;
160 lpc_pwr_write(dev, LPC_CLKPWR_USB_CTRL, usbctrl);
162 /* Enable OTG I2C clock */
163 lpc_otg_wait_write_4(sc, LPC_OTG_CLOCK_CTRL,
164 LPC_OTG_CLOCK_STATUS, LPC_OTG_CLOCK_CTRL_I2C_EN);
166 /* Reset OTG I2C bus */
167 lpc_otg_i2c_reset(sc);
169 lpc_isp3101_configure(dev, sc);
172 usbctrl &= ~(LPC_CLKPWR_USB_CTRL_CLK_EN1 | LPC_CLKPWR_USB_CTRL_CLK_EN2);
173 lpc_pwr_write(dev, LPC_CLKPWR_USB_CTRL, usbctrl);
175 usbctrl |= LPC_CLKPWR_USB_CTRL_CLK_EN1;
176 lpc_pwr_write(dev, LPC_CLKPWR_USB_CTRL, usbctrl);
178 usbctrl |= LPC_CLKPWR_USB_CTRL_FDBKDIV(192-1);
179 usbctrl |= LPC_CLKPWR_USB_CTRL_POSTDIV(1);
180 usbctrl |= LPC_CLKPWR_USB_CTRL_PLL_PDOWN;
182 lpc_pwr_write(dev, LPC_CLKPWR_USB_CTRL, usbctrl);
184 usbctrl = lpc_pwr_read(dev, LPC_CLKPWR_USB_CTRL);
186 device_printf(dev, "USB OTG PLL doesn't lock!\n");
189 } while ((usbctrl & LPC_CLKPWR_USB_CTRL_PLL_LOCK) == 0);
191 usbctrl |= LPC_CLKPWR_USB_CTRL_CLK_EN2;
192 usbctrl |= LPC_CLKPWR_USB_CTRL_HOST_NEED_CLK_EN;
193 lpc_pwr_write(dev, LPC_CLKPWR_USB_CTRL, usbctrl);
194 lpc_otg_wait_write_4(sc, LPC_OTG_CLOCK_CTRL, LPC_OTG_CLOCK_STATUS,
195 (LPC_OTG_CLOCK_CTRL_AHB_EN | LPC_OTG_CLOCK_CTRL_OTG_EN |
196 LPC_OTG_CLOCK_CTRL_I2C_EN | LPC_OTG_CLOCK_CTRL_HOST_EN));
198 otgstatus = lpc_otg_read_4(sc, LPC_OTG_STATUS);
199 lpc_otg_write_4(sc, LPC_OTG_STATUS, otgstatus |
200 LPC_OTG_STATUS_HOST_EN);
202 lpc_isp3101_write(sc, LPC_ISP3101_OTG_CONTROL_1,
203 LPC_ISP3101_OTG1_VBUS_DRV);
209 err = device_probe_and_attach(sc->sc_bus.bdev);
217 bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_intr_hdl);
219 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res);
221 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_io_res);
227 lpc_isp3101_read(struct ohci_softc *sc, int reg)
232 lpc_otg_write_4(sc, LPC_OTG_I2C_TXRX,
233 (LPC_ISP3101_I2C_ADDR << 1) | I2C_START_BIT);
234 lpc_otg_write_4(sc, LPC_OTG_I2C_TXRX, reg);
235 lpc_otg_write_4(sc, LPC_OTG_I2C_TXRX, (LPC_ISP3101_I2C_ADDR << 1) |
236 I2C_START_BIT | I2C_READ);
237 lpc_otg_write_4(sc, LPC_OTG_I2C_TXRX, I2C_STOP_BIT | DUMMY_BYTE);
240 status = lpc_otg_read_4(sc, LPC_OTG_I2C_STATUS);
242 } while ((status & LPC_OTG_I2C_STATUS_TDI) == 0 || i < 100000);
244 lpc_otg_write_4(sc, LPC_OTG_I2C_STATUS, LPC_OTG_I2C_STATUS_TDI);
246 return (lpc_otg_read_4(sc, LPC_OTG_I2C_TXRX) & 0xff);
250 lpc_otg_i2c_reset(struct ohci_softc *sc)
255 lpc_otg_write_4(sc, LPC_OTG_I2C_CLKHI, 0x3f);
256 lpc_otg_write_4(sc, LPC_OTG_I2C_CLKLO, 0x3f);
258 ctrl = lpc_otg_read_4(sc, LPC_OTG_I2C_CTRL);
259 lpc_otg_write_4(sc, LPC_OTG_I2C_CTRL, ctrl | LPC_OTG_I2C_CTRL_SRST);
262 ctrl = lpc_otg_read_4(sc, LPC_OTG_I2C_CTRL);
264 } while (ctrl & LPC_OTG_I2C_CTRL_SRST);
268 lpc_isp3101_write(struct ohci_softc *sc, int reg, int value)
273 bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, LPC_OTG_I2C_TXRX,
274 (LPC_ISP3101_I2C_ADDR << 1) | I2C_START_BIT);
275 bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, LPC_OTG_I2C_TXRX,
277 bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, LPC_OTG_I2C_TXRX,
278 (value | I2C_STOP_BIT));
281 status = bus_space_read_4(sc->sc_io_tag, sc->sc_io_hdl,
284 } while ((status & LPC_OTG_I2C_STATUS_TDI) == 0 || i < 100000);
286 bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, LPC_OTG_I2C_STATUS,
287 LPC_OTG_I2C_STATUS_TDI);
291 lpc_isp3101_clear(struct ohci_softc *sc, int reg, int value)
293 lpc_isp3101_write(sc, (reg | LPC_ISP3101_REG_CLEAR_ADDR), value);
297 lpc_isp3101_configure(device_t dev, struct ohci_softc *sc)
299 lpc_isp3101_clear(sc, LPC_ISP3101_MODE_CONTROL_1, LPC_ISP3101_MC1_UART_EN);
300 lpc_isp3101_clear(sc, LPC_ISP3101_MODE_CONTROL_1, ~LPC_ISP3101_MC1_SPEED_REG);
301 lpc_isp3101_write(sc, LPC_ISP3101_MODE_CONTROL_1, LPC_ISP3101_MC1_SPEED_REG);
302 lpc_isp3101_clear(sc, LPC_ISP3101_MODE_CONTROL_2, ~0);
303 lpc_isp3101_write(sc, LPC_ISP3101_MODE_CONTROL_2,
304 (LPC_ISP3101_MC2_BI_DI | LPC_ISP3101_MC2_PSW_EN
305 | LPC_ISP3101_MC2_SPD_SUSP_CTRL));
307 lpc_isp3101_clear(sc, LPC_ISP3101_OTG_CONTROL_1, ~0);
308 lpc_isp3101_write(sc, LPC_ISP3101_MODE_CONTROL_1, LPC_ISP3101_MC1_DAT_SE0);
309 lpc_isp3101_write(sc, LPC_ISP3101_OTG_CONTROL_1,
310 (LPC_ISP3101_OTG1_DM_PULLDOWN | LPC_ISP3101_OTG1_DP_PULLDOWN));
312 lpc_isp3101_clear(sc, LPC_ISP3101_OTG_CONTROL_1,
313 (LPC_ISP3101_OTG1_DM_PULLUP | LPC_ISP3101_OTG1_DP_PULLUP));
315 lpc_isp3101_clear(sc, LPC_ISP3101_OTG_INTR_LATCH, ~0);
316 lpc_isp3101_clear(sc, LPC_ISP3101_OTG_INTR_FALLING, ~0);
317 lpc_isp3101_clear(sc, LPC_ISP3101_OTG_INTR_RISING, ~0);
320 "ISP3101 PHY <vendor:0x%04x, product:0x%04x, version:0x%04x>\n",
321 (lpc_isp3101_read(sc, 0x00) | (lpc_isp3101_read(sc, 0x01) << 8)),
322 (lpc_isp3101_read(sc, 0x03) | (lpc_isp3101_read(sc, 0x04) << 8)),
323 (lpc_isp3101_read(sc, 0x14) | (lpc_isp3101_read(sc, 0x15) << 8)));
327 lpc_ohci_detach(device_t dev)
333 static device_method_t lpc_ohci_methods[] = {
334 /* Device interface */
335 DEVMETHOD(device_probe, lpc_ohci_probe),
336 DEVMETHOD(device_attach, lpc_ohci_attach),
337 DEVMETHOD(device_detach, lpc_ohci_detach),
338 DEVMETHOD(device_shutdown, bus_generic_shutdown),
341 DEVMETHOD(bus_print_child, bus_generic_print_child),
345 static driver_t lpc_ohci_driver = {
348 sizeof(struct ohci_softc),
351 static devclass_t lpc_ohci_devclass;
353 DRIVER_MODULE(ohci, simplebus, lpc_ohci_driver, lpc_ohci_devclass, 0, 0);
354 MODULE_DEPEND(ohci, usb, 1, 1, 1);