3 # The Marvell CPU cores
4 # - Compliant with V5TE architecture
5 # - Super scalar dual issue CPU
8 # - L1 Cache: Supports streaming and write allocate
9 # - Variable pipeline stages
10 # - Out-of-order execution
13 # - Vector Floating Point (VFP) unit
15 arm/mv/gpio.c standard
16 arm/mv/mv_common.c standard
17 arm/mv/mv_localbus.c standard
18 arm/mv/mv_machdep.c standard
19 arm/mv/mv_pci.c optional pci
20 arm/mv/mv_ts.c standard
21 arm/mv/timer.c standard
22 arm/mv/twsi.c optional iicbus
24 dev/cesa/cesa.c optional cesa
25 dev/mge/if_mge.c optional mge
26 dev/nand/nfc_mv.c optional nand
27 dev/mvs/mvs_soc.c optional mvs
28 dev/uart/uart_dev_ns8250.c optional uart
29 dev/usb/controller/ehci_mv.c optional ehci
31 kern/kern_clocksource.c standard