2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2006 Benno Rice.
5 * Copyright (C) 2007-2008 MARVELL INTERNATIONAL LTD.
8 * Adapted and extended to Marvell SoCs by Semihalf.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 * from: FreeBSD: //depot/projects/arm/src/sys/arm/xscale/pxa2x0/pxa2x0_icu.c, rev 1
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
36 #include <sys/param.h>
37 #include <sys/systm.h>
39 #include <sys/kernel.h>
41 #include <sys/module.h>
43 #include <machine/bus.h>
44 #include <machine/intr.h>
46 #include <dev/ofw/ofw_bus.h>
47 #include <dev/ofw/ofw_bus_subr.h>
49 #include <arm/mv/mvreg.h>
50 #include <arm/mv/mvvar.h>
53 struct resource * ic_res[1];
54 bus_space_tag_t ic_bst;
55 bus_space_handle_t ic_bsh;
60 static struct resource_spec mv_ic_spec[] = {
61 { SYS_RES_MEMORY, 0, RF_ACTIVE },
65 static struct mv_ic_softc *mv_ic_sc = NULL;
67 static int mv_ic_probe(device_t);
68 static int mv_ic_attach(device_t);
70 uint32_t mv_ic_get_cause(void);
71 uint32_t mv_ic_get_mask(void);
72 void mv_ic_set_mask(uint32_t);
73 uint32_t mv_ic_get_cause_hi(void);
74 uint32_t mv_ic_get_mask_hi(void);
75 void mv_ic_set_mask_hi(uint32_t);
76 uint32_t mv_ic_get_cause_error(void);
77 uint32_t mv_ic_get_mask_error(void);
78 void mv_ic_set_mask_error(uint32_t);
79 static void arm_mask_irq_all(void);
82 mv_ic_probe(device_t dev)
85 if (!ofw_bus_status_okay(dev))
88 if (!ofw_bus_is_compatible(dev, "mrvl,pic"))
91 device_set_desc(dev, "Marvell Integrated Interrupt Controller");
96 mv_ic_attach(device_t dev)
98 struct mv_ic_softc *sc;
99 uint32_t dev_id, rev_id;
102 sc = (struct mv_ic_softc *)device_get_softc(dev);
104 if (mv_ic_sc != NULL)
108 soc_id(&dev_id, &rev_id);
110 sc->ic_high_regs = 0;
111 sc->ic_error_regs = 0;
113 if (dev_id == MV_DEV_88F6281 ||
114 dev_id == MV_DEV_88F6282 ||
115 dev_id == MV_DEV_MV78100 ||
116 dev_id == MV_DEV_MV78100_Z0)
117 sc->ic_high_regs = 1;
119 if (dev_id == MV_DEV_MV78100 || dev_id == MV_DEV_MV78100_Z0)
120 sc->ic_error_regs = 1;
122 error = bus_alloc_resources(dev, mv_ic_spec, sc->ic_res);
124 device_printf(dev, "could not allocate resources\n");
128 sc->ic_bst = rman_get_bustag(sc->ic_res[0]);
129 sc->ic_bsh = rman_get_bushandle(sc->ic_res[0]);
131 /* Mask all interrupts */
137 static device_method_t mv_ic_methods[] = {
138 DEVMETHOD(device_probe, mv_ic_probe),
139 DEVMETHOD(device_attach, mv_ic_attach),
143 static driver_t mv_ic_driver = {
146 sizeof(struct mv_ic_softc),
149 static devclass_t mv_ic_devclass;
151 DRIVER_MODULE(ic, simplebus, mv_ic_driver, mv_ic_devclass, 0, 0);
154 arm_get_next_irq(int last)
159 filt = ~((last >= 0) ? (2 << last) - 1 : 0);
160 irq = mv_ic_get_cause() & mv_ic_get_mask();
162 next = ffs(irq & filt) - 1;
165 if (mv_ic_sc->ic_high_regs) {
166 filt = ~((last >= 32) ? (2 << (last - 32)) - 1 : 0);
167 irq = mv_ic_get_cause_hi() & mv_ic_get_mask_hi();
169 next = ffs(irq & filt) + 31;
173 if (mv_ic_sc->ic_error_regs) {
174 filt = ~((last >= 64) ? (2 << (last - 64)) - 1 : 0);
175 irq = mv_ic_get_cause_error() & mv_ic_get_mask_error();
177 next = ffs(irq & filt) + 63;
184 CTR3(KTR_INTR, "%s: last=%d, next=%d", __func__, last, next);
189 arm_mask_irq_all(void)
194 if (mv_ic_sc->ic_high_regs)
195 mv_ic_set_mask_hi(0);
197 if (mv_ic_sc->ic_error_regs)
198 mv_ic_set_mask_error(0);
202 arm_mask_irq(uintptr_t nb)
207 mr = mv_ic_get_mask();
211 } else if ((nb < 64) && mv_ic_sc->ic_high_regs) {
212 mr = mv_ic_get_mask_hi();
213 mr &= ~(1 << (nb - 32));
214 mv_ic_set_mask_hi(mr);
216 } else if ((nb < 96) && mv_ic_sc->ic_error_regs) {
217 mr = mv_ic_get_mask_error();
218 mr &= ~(1 << (nb - 64));
219 mv_ic_set_mask_error(mr);
224 arm_unmask_irq(uintptr_t nb)
229 mr = mv_ic_get_mask();
233 } else if ((nb < 64) && mv_ic_sc->ic_high_regs) {
234 mr = mv_ic_get_mask_hi();
235 mr |= (1 << (nb - 32));
236 mv_ic_set_mask_hi(mr);
238 } else if ((nb < 96) && mv_ic_sc->ic_error_regs) {
239 mr = mv_ic_get_mask_error();
240 mr |= (1 << (nb - 64));
241 mv_ic_set_mask_error(mr);
246 mv_ic_set_mask(uint32_t val)
249 bus_space_write_4(mv_ic_sc->ic_bst, mv_ic_sc->ic_bsh,
257 return (bus_space_read_4(mv_ic_sc->ic_bst,
258 mv_ic_sc->ic_bsh, IRQ_MASK));
262 mv_ic_get_cause(void)
265 return (bus_space_read_4(mv_ic_sc->ic_bst,
266 mv_ic_sc->ic_bsh, IRQ_CAUSE));
270 mv_ic_set_mask_hi(uint32_t val)
273 bus_space_write_4(mv_ic_sc->ic_bst, mv_ic_sc->ic_bsh,
278 mv_ic_get_mask_hi(void)
281 return (bus_space_read_4(mv_ic_sc->ic_bst,
282 mv_ic_sc->ic_bsh, IRQ_MASK_HI));
286 mv_ic_get_cause_hi(void)
289 return (bus_space_read_4(mv_ic_sc->ic_bst,
290 mv_ic_sc->ic_bsh, IRQ_CAUSE_HI));
294 mv_ic_set_mask_error(uint32_t val)
297 bus_space_write_4(mv_ic_sc->ic_bst, mv_ic_sc->ic_bsh,
298 IRQ_MASK_ERROR, val);
302 mv_ic_get_mask_error(void)
305 return (bus_space_read_4(mv_ic_sc->ic_bst,
306 mv_ic_sc->ic_bsh, IRQ_MASK_ERROR));
310 mv_ic_get_cause_error(void)
313 return (bus_space_read_4(mv_ic_sc->ic_bst,
314 mv_ic_sc->ic_bsh, IRQ_CAUSE_ERROR));