2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2018 Rubicon Communications, LLC (Netgate)
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
33 #include <sys/param.h>
34 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 #include <sys/module.h>
41 #include <sys/mutex.h>
43 #include <machine/bus.h>
44 #include <machine/resource.h>
45 #include <machine/intr.h>
47 #include <dev/fdt/simplebus.h>
49 #include <dev/ofw/ofw_bus.h>
50 #include <dev/ofw/ofw_bus_subr.h>
54 #define MV_AP806_GICP_MAX_NIRQS 207
56 struct mv_ap806_gicp_softc {
61 ssize_t spi_ranges_cnt;
65 static struct ofw_compat_data compat_data[] = {
66 {"marvell,ap806-gicp", 1},
70 #define RD4(sc, reg) bus_read_4((sc)->res, (reg))
71 #define WR4(sc, reg, val) bus_write_4((sc)->res, (reg), (val))
74 mv_ap806_gicp_probe(device_t dev)
77 if (!ofw_bus_status_okay(dev))
80 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
83 device_set_desc(dev, "Marvell GICP");
84 return (BUS_PROBE_DEFAULT);
88 mv_ap806_gicp_attach(device_t dev)
90 struct mv_ap806_gicp_softc *sc;
91 phandle_t node, xref, intr_parent;
93 sc = device_get_softc(dev);
95 node = ofw_bus_get_node(dev);
97 /* Look for our parent */
98 if ((intr_parent = ofw_bus_find_iparent(node)) == 0) {
99 device_printf(dev, "Cannot find our parent interrupt controller\n");
102 if ((sc->parent = OF_device_from_xref(intr_parent)) == NULL) {
103 device_printf(dev, "cannot find parent interrupt controller device\n");
107 sc->spi_ranges_cnt = OF_getencprop_alloc(node, "marvell,spi-ranges",
108 (void **)&sc->spi_ranges);
110 xref = OF_xref_from_node(node);
111 if (intr_pic_register(dev, xref) == NULL) {
112 device_printf(dev, "Cannot register GICP\n");
116 OF_device_register_xref(xref, dev);
122 mv_ap806_gicp_detach(device_t dev)
129 mv_ap806_gicp_activate_intr(device_t dev, struct intr_irqsrc *isrc,
130 struct resource *res, struct intr_map_data *data)
132 struct mv_ap806_gicp_softc *sc;
134 sc = device_get_softc(dev);
136 return (PIC_ACTIVATE_INTR(sc->parent, isrc, res, data));
140 mv_ap806_gicp_enable_intr(device_t dev, struct intr_irqsrc *isrc)
142 struct mv_ap806_gicp_softc *sc;
144 sc = device_get_softc(dev);
146 PIC_ENABLE_INTR(sc->parent, isrc);
150 mv_ap806_gicp_disable_intr(device_t dev, struct intr_irqsrc *isrc)
152 struct mv_ap806_gicp_softc *sc;
154 sc = device_get_softc(dev);
156 PIC_DISABLE_INTR(sc->parent, isrc);
160 mv_ap806_gicp_map_intr(device_t dev, struct intr_map_data *data,
161 struct intr_irqsrc **isrcp)
163 struct mv_ap806_gicp_softc *sc;
164 struct intr_map_data_fdt *daf;
165 uint32_t group, irq_num, irq_type;
168 sc = device_get_softc(dev);
170 if (data->type != INTR_MAP_DATA_FDT)
173 daf = (struct intr_map_data_fdt *)data;
174 if (daf->ncells != 3 || daf->cells[0] >= MV_AP806_GICP_MAX_NIRQS)
177 group = daf->cells[0];
178 irq_num = daf->cells[1];
179 irq_type = daf->cells[2];
181 /* Map the interrupt number to spi number */
182 for (i = 0; i < sc->spi_ranges_cnt / 2; i += 2) {
183 if (irq_num < sc->spi_ranges[i + 1]) {
184 irq_num += sc->spi_ranges[i];
188 irq_num -= sc->spi_ranges[i];
191 daf->cells[1] = irq_num - 32;
193 return (PIC_MAP_INTR(sc->parent, data, isrcp));
197 mv_ap806_gicp_deactivate_intr(device_t dev, struct intr_irqsrc *isrc,
198 struct resource *res, struct intr_map_data *data)
200 struct mv_ap806_gicp_softc *sc;
202 sc = device_get_softc(dev);
204 return (PIC_DEACTIVATE_INTR(sc->parent, isrc, res, data));
208 mv_ap806_gicp_setup_intr(device_t dev, struct intr_irqsrc *isrc,
209 struct resource *res, struct intr_map_data *data)
211 struct mv_ap806_gicp_softc *sc;
213 sc = device_get_softc(dev);
215 return (PIC_SETUP_INTR(sc->parent, isrc, res, data));
219 mv_ap806_gicp_teardown_intr(device_t dev, struct intr_irqsrc *isrc,
220 struct resource *res, struct intr_map_data *data)
222 struct mv_ap806_gicp_softc *sc;
224 sc = device_get_softc(dev);
226 return (PIC_TEARDOWN_INTR(sc->parent, isrc, res, data));
230 mv_ap806_gicp_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
232 struct mv_ap806_gicp_softc *sc;
234 sc = device_get_softc(dev);
236 PIC_PRE_ITHREAD(sc->parent, isrc);
240 mv_ap806_gicp_post_ithread(device_t dev, struct intr_irqsrc *isrc)
242 struct mv_ap806_gicp_softc *sc;
244 sc = device_get_softc(dev);
246 PIC_POST_ITHREAD(sc->parent, isrc);
250 mv_ap806_gicp_post_filter(device_t dev, struct intr_irqsrc *isrc)
252 struct mv_ap806_gicp_softc *sc;
254 sc = device_get_softc(dev);
256 PIC_POST_FILTER(sc->parent, isrc);
259 static device_method_t mv_ap806_gicp_methods[] = {
260 /* Device interface */
261 DEVMETHOD(device_probe, mv_ap806_gicp_probe),
262 DEVMETHOD(device_attach, mv_ap806_gicp_attach),
263 DEVMETHOD(device_detach, mv_ap806_gicp_detach),
265 /* Interrupt controller interface */
266 DEVMETHOD(pic_activate_intr, mv_ap806_gicp_activate_intr),
267 DEVMETHOD(pic_disable_intr, mv_ap806_gicp_disable_intr),
268 DEVMETHOD(pic_enable_intr, mv_ap806_gicp_enable_intr),
269 DEVMETHOD(pic_map_intr, mv_ap806_gicp_map_intr),
270 DEVMETHOD(pic_deactivate_intr, mv_ap806_gicp_deactivate_intr),
271 DEVMETHOD(pic_setup_intr, mv_ap806_gicp_setup_intr),
272 DEVMETHOD(pic_teardown_intr, mv_ap806_gicp_teardown_intr),
273 DEVMETHOD(pic_post_filter, mv_ap806_gicp_post_filter),
274 DEVMETHOD(pic_post_ithread, mv_ap806_gicp_post_ithread),
275 DEVMETHOD(pic_pre_ithread, mv_ap806_gicp_pre_ithread),
280 static devclass_t mv_ap806_gicp_devclass;
282 static driver_t mv_ap806_gicp_driver = {
284 mv_ap806_gicp_methods,
285 sizeof(struct mv_ap806_gicp_softc),
288 EARLY_DRIVER_MODULE(mv_ap806_gicp, simplebus, mv_ap806_gicp_driver,
289 mv_ap806_gicp_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);