2 * Copyright (c) 2016 Stormshield
3 * Copyright (c) 2016 Semihalf
6 * Developed by Semihalf.
8 * Portions of this software were developed by Semihalf
9 * under sponsorship from the FreeBSD Foundation.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. Neither the name of MARVELL nor the names of contributors
20 * may be used to endorse or promote products derived from this software
21 * without specific prior written permission.
23 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * Marvell integrated PCI/PCI-Express Bus Controller Driver.
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD$");
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/kernel.h>
47 #include <sys/malloc.h>
48 #include <sys/module.h>
52 #include <dev/ofw/ofw_bus.h>
53 #include <dev/ofw/ofw_bus_subr.h>
55 static int mv_pcib_ctrl_probe(device_t);
56 static int mv_pcib_ctrl_attach(device_t);
57 static device_t mv_pcib_ctrl_add_child(device_t, u_int, const char *, int);
58 static const struct ofw_bus_devinfo * mv_pcib_ctrl_get_devinfo(device_t, device_t);
59 static struct resource * mv_pcib_ctrl_alloc_resource(device_t, device_t, int,
60 int *, rman_res_t, rman_res_t, rman_res_t, u_int);
61 void mv_pcib_ctrl_init(device_t, phandle_t);
62 static int mv_pcib_ofw_bus_attach(device_t);
64 struct mv_pcib_ctrl_range {
70 typedef int (*get_rl_t)(device_t dev, phandle_t node, pcell_t acells,
71 pcell_t scells, struct resource_list *rl);
73 struct mv_pcib_ctrl_softc {
77 struct mv_pcib_ctrl_range *ranges;
80 struct mv_pcib_ctrl_devinfo {
81 struct ofw_bus_devinfo di_dinfo;
82 struct resource_list di_rl;
85 static int mv_pcib_ctrl_fill_ranges(phandle_t, struct mv_pcib_ctrl_softc *);
88 * Bus interface definitions
90 static device_method_t mv_pcib_ctrl_methods[] = {
91 /* Device interface */
92 DEVMETHOD(device_probe, mv_pcib_ctrl_probe),
93 DEVMETHOD(device_attach, mv_pcib_ctrl_attach),
96 DEVMETHOD(bus_add_child, mv_pcib_ctrl_add_child),
97 DEVMETHOD(bus_alloc_resource, mv_pcib_ctrl_alloc_resource),
98 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
99 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
100 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
101 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
103 /* ofw_bus interface */
104 DEVMETHOD(ofw_bus_get_devinfo, mv_pcib_ctrl_get_devinfo),
105 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
106 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
107 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
108 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
109 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
114 static struct ofw_compat_data mv_pcib_ctrl_compat[] = {
115 {"mrvl,pcie-ctrl", (uintptr_t)&ofw_bus_reg_to_rl},
116 {"marvell,armada-370-pcie",
117 (uintptr_t)&ofw_bus_assigned_addresses_to_rl},
118 {NULL, (uintptr_t)NULL},
121 static driver_t mv_pcib_ctrl_driver = {
123 mv_pcib_ctrl_methods,
124 sizeof(struct mv_pcib_ctrl_softc),
127 devclass_t pcib_ctrl_devclass;
129 DRIVER_MODULE(pcib_ctrl, simplebus, mv_pcib_ctrl_driver, pcib_ctrl_devclass, 0, 0);
131 MALLOC_DEFINE(M_PCIB_CTRL, "PCIe Bus Controller",
132 "Marvell Integrated PCIe Bus Controller");
135 mv_pcib_ctrl_probe(device_t dev)
138 if (!ofw_bus_status_okay(dev))
141 if (!ofw_bus_search_compatible(dev, mv_pcib_ctrl_compat)->ocd_data)
144 device_set_desc(dev, "Marvell Integrated PCIe Bus Controller");
145 return (BUS_PROBE_DEFAULT);
149 mv_pcib_ctrl_attach(device_t dev)
153 err = mv_pcib_ofw_bus_attach(dev);
157 return (bus_generic_attach(dev));
161 mv_pcib_ofw_bus_attach(device_t dev)
163 struct mv_pcib_ctrl_devinfo *di;
164 struct mv_pcib_ctrl_softc *sc;
166 phandle_t parent, node;
169 parent = ofw_bus_get_node(dev);
170 sc = device_get_softc(dev);
173 if (OF_getencprop(parent, "#address-cells", &(sc->addr_cells),
174 sizeof(sc->addr_cells)) <= 0)
178 if (OF_getencprop(parent, "#size-cells", &(sc->size_cells),
179 sizeof(sc->size_cells)) <= 0)
182 for (node = OF_child(parent); node > 0; node = OF_peer(node)) {
183 di = malloc(sizeof(*di), M_PCIB_CTRL, M_WAITOK | M_ZERO);
184 if (ofw_bus_gen_setup_devinfo(&di->di_dinfo, node)) {
187 "Could not set up devinfo for PCI\n");
189 free(di, M_PCIB_CTRL);
193 child = device_add_child(dev, NULL, -1);
197 "Could not add child: %s\n",
198 di->di_dinfo.obd_name);
200 ofw_bus_gen_destroy_devinfo(&di->di_dinfo);
201 free(di, M_PCIB_CTRL);
205 resource_list_init(&di->di_rl);
206 get_rl = (get_rl_t) ofw_bus_search_compatible(dev,
207 mv_pcib_ctrl_compat)->ocd_data;
209 get_rl(child, node, sc->addr_cells,
210 sc->size_cells, &di->di_rl);
212 device_set_ivars(child, di);
216 if (mv_pcib_ctrl_fill_ranges(parent, sc) < 0) {
217 device_printf(dev, "could not get ranges\n");
225 mv_pcib_ctrl_add_child(device_t dev, u_int order, const char *name, int unit)
228 struct mv_pcib_ctrl_devinfo *di;
230 cdev = device_add_child_ordered(dev, order, name, unit);
234 di = malloc(sizeof(*di), M_DEVBUF, M_WAITOK | M_ZERO);
235 di->di_dinfo.obd_node = -1;
236 resource_list_init(&di->di_rl);
237 device_set_ivars(cdev, di);
242 static struct resource *
243 mv_pcib_ctrl_alloc_resource(device_t bus, device_t child, int type, int *rid,
244 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
246 struct mv_pcib_ctrl_devinfo *di;
247 struct resource_list_entry *rle;
248 struct mv_pcib_ctrl_softc *sc;
251 if (RMAN_IS_DEFAULT_RANGE(start, end)) {
253 if ((di = device_get_ivars(child)) == NULL)
255 if (type != SYS_RES_MEMORY)
258 /* Find defaults for this rid */
259 rle = resource_list_find(&di->di_rl, type, *rid);
269 sc = device_get_softc(bus);
270 if (type == SYS_RES_MEMORY) {
271 /* Remap through ranges property */
272 for (i = 0; i < sc->nranges; i++) {
273 if (start >= sc->ranges[i].bus && end <
274 sc->ranges[i].bus + sc->ranges[i].size) {
275 start -= sc->ranges[i].bus;
276 start += sc->ranges[i].host;
277 end -= sc->ranges[i].bus;
278 end += sc->ranges[i].host;
283 if (i == sc->nranges && sc->nranges != 0) {
284 device_printf(bus, "Could not map resource "
285 "%#llx-%#llx\n", start, end);
290 return (bus_generic_alloc_resource(bus, child, type, rid, start, end,
295 mv_pcib_ctrl_fill_ranges(phandle_t node, struct mv_pcib_ctrl_softc *sc)
297 int host_address_cells;
299 ssize_t nbase_ranges;
303 err = OF_searchencprop(OF_parent(node), "#address-cells",
304 &host_address_cells, sizeof(host_address_cells));
308 nbase_ranges = OF_getproplen(node, "ranges");
309 if (nbase_ranges < 0)
311 sc->nranges = nbase_ranges / sizeof(cell_t) /
312 (sc->addr_cells + host_address_cells + sc->size_cells);
313 if (sc->nranges == 0)
316 sc->ranges = malloc(sc->nranges * sizeof(sc->ranges[0]),
318 base_ranges = malloc(nbase_ranges, M_DEVBUF, M_WAITOK);
319 OF_getencprop(node, "ranges", base_ranges, nbase_ranges);
321 for (i = 0, j = 0; i < sc->nranges; i++) {
322 sc->ranges[i].bus = 0;
323 for (k = 0; k < sc->addr_cells; k++) {
324 sc->ranges[i].bus <<= 32;
325 sc->ranges[i].bus |= base_ranges[j++];
327 sc->ranges[i].host = 0;
328 for (k = 0; k < host_address_cells; k++) {
329 sc->ranges[i].host <<= 32;
330 sc->ranges[i].host |= base_ranges[j++];
332 sc->ranges[i].size = 0;
333 for (k = 0; k < sc->size_cells; k++) {
334 sc->ranges[i].size <<= 32;
335 sc->ranges[i].size |= base_ranges[j++];
339 free(base_ranges, M_DEVBUF);
340 return (sc->nranges);
343 static const struct ofw_bus_devinfo *
344 mv_pcib_ctrl_get_devinfo(device_t bus __unused, device_t child)
346 struct mv_pcib_ctrl_devinfo *di;
348 di = device_get_ivars(child);
349 return (&di->di_dinfo);