2 * Copyright (c) 2016 Stormshield
3 * Copyright (c) 2016 Semihalf
6 * Developed by Semihalf.
8 * Portions of this software were developed by Semihalf
9 * under sponsorship from the FreeBSD Foundation.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. Neither the name of MARVELL nor the names of contributors
20 * may be used to endorse or promote products derived from this software
21 * without specific prior written permission.
23 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * Marvell integrated PCI/PCI-Express Bus Controller Driver.
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD$");
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/kernel.h>
47 #include <sys/malloc.h>
48 #include <sys/module.h>
52 #include <dev/ofw/ofw_bus.h>
53 #include <dev/ofw/ofw_bus_subr.h>
55 static int mv_pcib_ctrl_probe(device_t);
56 static int mv_pcib_ctrl_attach(device_t);
57 static device_t mv_pcib_ctrl_add_child(device_t, u_int, const char *, int);
58 static const struct ofw_bus_devinfo * mv_pcib_ctrl_get_devinfo(device_t, device_t);
59 static struct resource * mv_pcib_ctrl_alloc_resource(device_t, device_t, int,
60 int *, rman_res_t, rman_res_t, rman_res_t, u_int);
61 void mv_pcib_ctrl_init(device_t, phandle_t);
62 static int mv_pcib_ofw_bus_attach(device_t);
64 struct mv_pcib_ctrl_range {
70 struct mv_pcib_ctrl_softc {
74 struct mv_pcib_ctrl_range *ranges;
77 struct mv_pcib_ctrl_devinfo {
78 struct ofw_bus_devinfo di_dinfo;
79 struct resource_list di_rl;
82 static int mv_pcib_ctrl_fill_ranges(phandle_t, struct mv_pcib_ctrl_softc *);
85 * Bus interface definitions
87 static device_method_t mv_pcib_ctrl_methods[] = {
88 /* Device interface */
89 DEVMETHOD(device_probe, mv_pcib_ctrl_probe),
90 DEVMETHOD(device_attach, mv_pcib_ctrl_attach),
93 DEVMETHOD(bus_add_child, mv_pcib_ctrl_add_child),
94 DEVMETHOD(bus_alloc_resource, mv_pcib_ctrl_alloc_resource),
95 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
96 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
97 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
99 /* ofw_bus interface */
100 DEVMETHOD(ofw_bus_get_devinfo, mv_pcib_ctrl_get_devinfo),
101 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
102 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
103 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
104 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
105 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
110 static driver_t mv_pcib_ctrl_driver = {
112 mv_pcib_ctrl_methods,
113 sizeof(struct mv_pcib_ctrl_softc),
116 devclass_t pcib_ctrl_devclass;
118 DRIVER_MODULE(pcib_ctrl, simplebus, mv_pcib_ctrl_driver, pcib_ctrl_devclass, 0, 0);
120 MALLOC_DEFINE(M_PCIB_CTRL, "PCIe Bus Controller",
121 "Marvell Integrated PCIe Bus Controller");
124 mv_pcib_ctrl_probe(device_t dev)
127 if (!ofw_bus_is_compatible(dev, "mrvl,pcie-ctrl") &&
128 !ofw_bus_is_compatible(dev, "marvell,armada-370-pcie"))
131 device_set_desc(dev, "Marvell Integrated PCIe Bus Controller");
132 return (BUS_PROBE_DEFAULT);
136 mv_pcib_ctrl_attach(device_t dev)
140 err = mv_pcib_ofw_bus_attach(dev);
144 return (bus_generic_attach(dev));
148 mv_pcib_ofw_bus_attach(device_t dev)
150 struct mv_pcib_ctrl_devinfo *di;
151 struct mv_pcib_ctrl_softc *sc;
153 phandle_t parent, node;
155 parent = ofw_bus_get_node(dev);
156 sc = device_get_softc(dev);
159 if (OF_getencprop(parent, "#address-cells", &(sc->addr_cells),
160 sizeof(sc->addr_cells)) <= 0)
164 if (OF_getencprop(parent, "#size-cells", &(sc->size_cells),
165 sizeof(sc->size_cells)) <= 0)
168 for (node = OF_child(parent); node > 0; node = OF_peer(node)) {
169 di = malloc(sizeof(*di), M_PCIB_CTRL, M_WAITOK | M_ZERO);
170 if (ofw_bus_gen_setup_devinfo(&di->di_dinfo, node)) {
173 "Could not set up devinfo for PCI\n");
175 free(di, M_PCIB_CTRL);
179 child = device_add_child(dev, NULL, -1);
183 "Could not add child: %s\n",
184 di->di_dinfo.obd_name);
186 ofw_bus_gen_destroy_devinfo(&di->di_dinfo);
187 free(di, M_PCIB_CTRL);
191 resource_list_init(&di->di_rl);
192 ofw_bus_reg_to_rl(child, node, sc->addr_cells,
193 sc->size_cells, &di->di_rl);
195 device_set_ivars(child, di);
199 if (mv_pcib_ctrl_fill_ranges(parent, sc) < 0) {
200 device_printf(dev, "could not get ranges\n");
208 mv_pcib_ctrl_add_child(device_t dev, u_int order, const char *name, int unit)
211 struct mv_pcib_ctrl_devinfo *di;
213 cdev = device_add_child_ordered(dev, order, name, unit);
217 di = malloc(sizeof(*di), M_DEVBUF, M_WAITOK | M_ZERO);
218 di->di_dinfo.obd_node = -1;
219 resource_list_init(&di->di_rl);
220 device_set_ivars(cdev, di);
225 static struct resource *
226 mv_pcib_ctrl_alloc_resource(device_t bus, device_t child, int type, int *rid,
227 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
229 struct mv_pcib_ctrl_devinfo *di;
230 struct resource_list_entry *rle;
231 struct mv_pcib_ctrl_softc *sc;
234 if (RMAN_IS_DEFAULT_RANGE(start, end)) {
236 if ((di = device_get_ivars(child)) == NULL)
238 if (type != SYS_RES_MEMORY)
241 /* Find defaults for this rid */
242 rle = resource_list_find(&di->di_rl, type, *rid);
252 sc = device_get_softc(bus);
253 if (type == SYS_RES_MEMORY) {
254 /* Remap through ranges property */
255 for (i = 0; i < sc->nranges; i++) {
256 if (start >= sc->ranges[i].bus && end <
257 sc->ranges[i].bus + sc->ranges[i].size) {
258 start -= sc->ranges[i].bus;
259 start += sc->ranges[i].host;
260 end -= sc->ranges[i].bus;
261 end += sc->ranges[i].host;
266 if (i == sc->nranges && sc->nranges != 0) {
267 device_printf(bus, "Could not map resource "
268 "%#llx-%#llx\n", start, end);
273 return (bus_generic_alloc_resource(bus, child, type, rid, start, end,
278 mv_pcib_ctrl_fill_ranges(phandle_t node, struct mv_pcib_ctrl_softc *sc)
280 int host_address_cells;
282 ssize_t nbase_ranges;
286 err = OF_searchencprop(OF_parent(node), "#address-cells",
287 &host_address_cells, sizeof(host_address_cells));
291 nbase_ranges = OF_getproplen(node, "ranges");
292 if (nbase_ranges < 0)
294 sc->nranges = nbase_ranges / sizeof(cell_t) /
295 (sc->addr_cells + host_address_cells + sc->size_cells);
296 if (sc->nranges == 0)
299 sc->ranges = malloc(sc->nranges * sizeof(sc->ranges[0]),
301 base_ranges = malloc(nbase_ranges, M_DEVBUF, M_WAITOK);
302 OF_getencprop(node, "ranges", base_ranges, nbase_ranges);
304 for (i = 0, j = 0; i < sc->nranges; i++) {
305 sc->ranges[i].bus = 0;
306 for (k = 0; k < sc->addr_cells; k++) {
307 sc->ranges[i].bus <<= 32;
308 sc->ranges[i].bus |= base_ranges[j++];
310 sc->ranges[i].host = 0;
311 for (k = 0; k < host_address_cells; k++) {
312 sc->ranges[i].host <<= 32;
313 sc->ranges[i].host |= base_ranges[j++];
315 sc->ranges[i].size = 0;
316 for (k = 0; k < sc->size_cells; k++) {
317 sc->ranges[i].size <<= 32;
318 sc->ranges[i].size |= base_ranges[j++];
322 free(base_ranges, M_DEVBUF);
323 return (sc->nranges);
326 static const struct ofw_bus_devinfo *
327 mv_pcib_ctrl_get_devinfo(device_t bus __unused, device_t child)
329 struct mv_pcib_ctrl_devinfo *di;
331 di = device_get_ivars(child);
332 return (&di->di_dinfo);