2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2018 Rubicon Communications, LLC (Netgate)
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
33 #include <sys/param.h>
34 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 #include <sys/module.h>
41 #include <sys/mutex.h>
43 #include <machine/bus.h>
44 #include <machine/resource.h>
45 #include <machine/intr.h>
47 #include <dev/extres/syscon/syscon.h>
49 #include <dev/fdt/fdt_pinctrl.h>
51 #include <dev/ofw/ofw_bus.h>
52 #include <dev/ofw/ofw_bus_subr.h>
54 #include "syscon_if.h"
56 #define PINS_PER_REG 8
57 #define BITS_PER_PIN 4
59 #define MAX_PIN_FUNC 5
63 const char *functions[MAX_PIN_FUNC];
67 const struct mv_pins *pins;
71 const static struct mv_pins ap806_pins[] = {
72 {"mpp0", {"gpio", "sdio", NULL, "spi0"}},
73 {"mpp1", {"gpio", "sdio", NULL, "spi0"}},
74 {"mpp2", {"gpio", "sdio", NULL, "spi0"}},
75 {"mpp3", {"gpio", "sdio", NULL, "spi0"}},
76 {"mpp4", {"gpio", "sdio", NULL, "i2c0"}},
77 {"mpp5", {"gpio", "sdio", NULL, "i2c0"}},
78 {"mpp6", {"gpio", "sdio", NULL, NULL}},
79 {"mpp7", {"gpio", "sdio", NULL, "uart1"}},
80 {"mpp8", {"gpio", "sdio", NULL, "uart1"}},
81 {"mpp9", {"gpio", "sdio", NULL, "spi0"}},
82 {"mpp10", {"gpio", "sdio", NULL, NULL}},
83 {"mpp11", {"gpio", NULL, NULL, "uart0"}},
84 {"mpp12", {"gpio", "sdio", "sdio", NULL}},
85 {"mpp13", {"gpio", NULL, NULL}},
86 {"mpp14", {"gpio", NULL, NULL}},
87 {"mpp15", {"gpio", NULL, NULL}},
88 {"mpp16", {"gpio", NULL, NULL}},
89 {"mpp17", {"gpio", NULL, NULL}},
90 {"mpp18", {"gpio", NULL, NULL}},
91 {"mpp19", {"gpio", NULL, NULL, "uart0", "sdio"}},
94 const struct mv_padconf ap806_padconf = {
95 .npins = nitems(ap806_pins),
99 struct mv_pinctrl_softc {
101 struct syscon *syscon;
103 struct mv_padconf *padconf;
107 static struct ofw_compat_data compat_data[] = {
108 {"marvell,ap806-pinctrl", (uintptr_t)&ap806_padconf},
112 #define RD4(sc, reg) SYSCON_READ_4((sc)->syscon, (reg))
113 #define WR4(sc, reg, val) SYSCON_WRITE_4((sc)->syscon, (reg), (val))
116 mv_pinctrl_configure_pin(struct mv_pinctrl_softc *sc, uint32_t pin,
119 uint32_t offset, shift, reg;
121 offset = (pin / PINS_PER_REG) * BITS_PER_PIN;
122 shift = (pin % PINS_PER_REG) * BITS_PER_PIN;
123 reg = RD4(sc, offset);
124 reg &= ~(PINS_MASK << shift);
125 reg |= function << shift;
126 WR4(sc, offset, reg);
130 mv_pinctrl_configure_pins(device_t dev, phandle_t cfgxref)
132 struct mv_pinctrl_softc *sc;
136 int i, pin_num, pin_func, npins;
138 sc = device_get_softc(dev);
139 node = OF_node_from_xref(cfgxref);
141 if (OF_getprop_alloc(node, "marvell,function",
142 (void **)&function) == -1)
145 npins = ofw_bus_string_list_to_array(node, "marvell,pins", &pins);
149 for (i = 0; i < npins; i++) {
150 for (pin_num = 0; pin_num < sc->padconf->npins; pin_num++) {
151 if (strcmp(pins[i], sc->padconf->pins[pin_num].name) == 0)
154 if (pin_num == sc->padconf->npins)
157 for (pin_func = 0; pin_func < MAX_PIN_FUNC; pin_func++)
158 if (sc->padconf->pins[pin_num].functions[pin_func] &&
159 strcmp(function, sc->padconf->pins[pin_num].functions[pin_func]) == 0)
162 if (pin_func == MAX_PIN_FUNC)
165 mv_pinctrl_configure_pin(sc, pin_num, pin_func);
174 mv_pinctrl_probe(device_t dev)
177 if (!ofw_bus_status_okay(dev))
180 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
183 device_set_desc(dev, "Marvell Pinctrl controller");
184 return (BUS_PROBE_DEFAULT);
188 mv_pinctrl_attach(device_t dev)
190 struct mv_pinctrl_softc *sc;
193 sc = device_get_softc(dev);
195 sc->padconf = (struct mv_padconf *)
196 ofw_bus_search_compatible(dev,compat_data)->ocd_data;
198 if (SYSCON_GET_HANDLE(sc->dev, &sc->syscon) != 0 ||
199 sc->syscon == NULL) {
200 device_printf(dev, "cannot get syscon for device\n");
204 node = ofw_bus_get_node(dev);
206 fdt_pinctrl_register(dev, "marvell,pins");
207 fdt_pinctrl_configure_tree(dev);
213 mv_pinctrl_detach(device_t dev)
219 static device_method_t mv_pinctrl_methods[] = {
220 /* Device interface */
221 DEVMETHOD(device_probe, mv_pinctrl_probe),
222 DEVMETHOD(device_attach, mv_pinctrl_attach),
223 DEVMETHOD(device_detach, mv_pinctrl_detach),
225 /* fdt_pinctrl interface */
226 DEVMETHOD(fdt_pinctrl_configure,mv_pinctrl_configure_pins),
231 static devclass_t mv_pinctrl_devclass;
233 static driver_t mv_pinctrl_driver = {
236 sizeof(struct mv_pinctrl_softc),
239 EARLY_DRIVER_MODULE(mv_pinctrl, simplebus, mv_pinctrl_driver,
240 mv_pinctrl_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);