]> CyberLeo.Net >> Repos - FreeBSD/FreeBSD.git/blob - sys/arm/mv/mvebu_pinctrl.c
Update tzcode to 2023c.
[FreeBSD/FreeBSD.git] / sys / arm / mv / mvebu_pinctrl.c
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2018 Rubicon Communications, LLC (Netgate)
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  * $FreeBSD$
28  */
29
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
32
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/bus.h>
36
37 #include <sys/kernel.h>
38 #include <sys/module.h>
39 #include <sys/rman.h>
40 #include <sys/lock.h>
41 #include <sys/mutex.h>
42
43 #include <machine/bus.h>
44 #include <machine/resource.h>
45 #include <machine/intr.h>
46
47 #include <dev/extres/syscon/syscon.h>
48
49 #include <dev/fdt/fdt_pinctrl.h>
50
51 #include <dev/ofw/ofw_bus.h>
52 #include <dev/ofw/ofw_bus_subr.h>
53
54 #include "syscon_if.h"
55
56 #define PINS_PER_REG    8
57 #define BITS_PER_PIN    4
58 #define PINS_MASK       0xf
59 #define MAX_PIN_FUNC    5
60
61 struct mv_pins {
62         const char      *name;
63         const char      *functions[MAX_PIN_FUNC];
64 };
65
66 struct mv_padconf {
67         const struct mv_pins    *pins;
68         size_t          npins;
69 };
70
71 const static struct mv_pins ap806_pins[] = {
72         {"mpp0", {"gpio", "sdio", NULL, "spi0"}},
73         {"mpp1", {"gpio", "sdio", NULL, "spi0"}},
74         {"mpp2", {"gpio", "sdio", NULL, "spi0"}},
75         {"mpp3", {"gpio", "sdio", NULL, "spi0"}},
76         {"mpp4", {"gpio", "sdio", NULL, "i2c0"}},
77         {"mpp5", {"gpio", "sdio", NULL, "i2c0"}},
78         {"mpp6", {"gpio", "sdio", NULL, NULL}},
79         {"mpp7", {"gpio", "sdio", NULL, "uart1"}},
80         {"mpp8", {"gpio", "sdio", NULL, "uart1"}},
81         {"mpp9", {"gpio", "sdio", NULL, "spi0"}},
82         {"mpp10", {"gpio", "sdio", NULL, NULL}},
83         {"mpp11", {"gpio", NULL, NULL, "uart0"}},
84         {"mpp12", {"gpio", "sdio", "sdio", NULL}},
85         {"mpp13", {"gpio", NULL, NULL}},
86         {"mpp14", {"gpio", NULL, NULL}},
87         {"mpp15", {"gpio", NULL, NULL}},
88         {"mpp16", {"gpio", NULL, NULL}},
89         {"mpp17", {"gpio", NULL, NULL}},
90         {"mpp18", {"gpio", NULL, NULL}},
91         {"mpp19", {"gpio", NULL, NULL, "uart0", "sdio"}},
92 };
93
94 const struct mv_padconf ap806_padconf = {
95         .npins = nitems(ap806_pins),
96         .pins = ap806_pins,
97 };
98
99 struct mv_pinctrl_softc {
100         device_t                dev;
101         struct syscon           *syscon;
102
103         struct mv_padconf       *padconf;
104 };
105
106 static struct ofw_compat_data compat_data[] = {
107         {"marvell,ap806-pinctrl", (uintptr_t)&ap806_padconf},
108         {NULL,             0}
109 };
110
111 #define RD4(sc, reg)            SYSCON_READ_4((sc)->syscon, (reg))
112 #define WR4(sc, reg, val)       SYSCON_WRITE_4((sc)->syscon, (reg), (val))
113
114 static void
115 mv_pinctrl_configure_pin(struct mv_pinctrl_softc *sc, uint32_t pin,
116     uint32_t function)
117 {
118         uint32_t offset, shift, reg;
119
120         offset = (pin / PINS_PER_REG) * BITS_PER_PIN;
121         shift = (pin % PINS_PER_REG) * BITS_PER_PIN;
122         reg = RD4(sc, offset);
123         reg &= ~(PINS_MASK << shift);
124         reg |= function << shift;
125         WR4(sc, offset, reg);
126 }
127
128 static int
129 mv_pinctrl_configure_pins(device_t dev, phandle_t cfgxref)
130 {
131         struct mv_pinctrl_softc *sc;
132         phandle_t node;
133         char *function;
134         const char **pins;
135         int i, pin_num, pin_func, npins;
136
137         sc = device_get_softc(dev);
138         node = OF_node_from_xref(cfgxref);
139
140         if (OF_getprop_alloc(node, "marvell,function",
141             (void **)&function) == -1)
142                 return (ENOMEM);
143
144         npins = ofw_bus_string_list_to_array(node, "marvell,pins", &pins);
145         if (npins == -1)
146                 return (ENOMEM);
147
148         for (i = 0; i < npins; i++) {
149                 for (pin_num = 0; pin_num < sc->padconf->npins; pin_num++) {
150                         if (strcmp(pins[i], sc->padconf->pins[pin_num].name) == 0)
151                                 break;
152                 }
153                 if (pin_num == sc->padconf->npins)
154                         continue;
155
156                 for (pin_func = 0; pin_func < MAX_PIN_FUNC; pin_func++)
157                         if (sc->padconf->pins[pin_num].functions[pin_func] &&
158                             strcmp(function, sc->padconf->pins[pin_num].functions[pin_func]) == 0)
159                                 break;
160
161                 if (pin_func == MAX_PIN_FUNC)
162                         continue;
163
164                 mv_pinctrl_configure_pin(sc, pin_num, pin_func);
165         }
166
167         OF_prop_free(pins);
168
169         return (0);
170 }
171
172 static int
173 mv_pinctrl_probe(device_t dev)
174 {
175
176         if (!ofw_bus_status_okay(dev))
177                 return (ENXIO);
178
179         if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
180                 return (ENXIO);
181
182         device_set_desc(dev, "Marvell Pinctrl controller");
183         return (BUS_PROBE_DEFAULT);
184 }
185
186 static int
187 mv_pinctrl_attach(device_t dev)
188 {
189         struct mv_pinctrl_softc *sc;
190
191         sc = device_get_softc(dev);
192         sc->dev = dev;
193         sc->padconf = (struct mv_padconf *)
194             ofw_bus_search_compatible(dev,compat_data)->ocd_data;
195
196         if (SYSCON_GET_HANDLE(sc->dev, &sc->syscon) != 0 ||
197             sc->syscon == NULL) {
198                 device_printf(dev, "cannot get syscon for device\n");
199                 return (ENXIO);
200         }
201
202         fdt_pinctrl_register(dev, "marvell,pins");
203         fdt_pinctrl_configure_tree(dev);
204
205         return (0);
206 }
207
208 static int
209 mv_pinctrl_detach(device_t dev)
210 {
211
212         return (EBUSY);
213 }
214
215 static device_method_t mv_pinctrl_methods[] = {
216         /* Device interface */
217         DEVMETHOD(device_probe,         mv_pinctrl_probe),
218         DEVMETHOD(device_attach,        mv_pinctrl_attach),
219         DEVMETHOD(device_detach,        mv_pinctrl_detach),
220
221         /* fdt_pinctrl interface */
222         DEVMETHOD(fdt_pinctrl_configure,mv_pinctrl_configure_pins),
223
224         DEVMETHOD_END
225 };
226
227 static driver_t mv_pinctrl_driver = {
228         "mv_pinctrl",
229         mv_pinctrl_methods,
230         sizeof(struct mv_pinctrl_softc),
231 };
232
233 EARLY_DRIVER_MODULE(mv_pinctrl, simplebus, mv_pinctrl_driver, 0, 0,
234     BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);