2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2018 Rubicon Communications, LLC (Netgate)
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
33 #include <sys/param.h>
34 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 #include <sys/module.h>
41 #include <sys/mutex.h>
43 #include <machine/bus.h>
44 #include <machine/resource.h>
45 #include <machine/intr.h>
47 #include <dev/fdt/simplebus.h>
49 #include <dev/ofw/ofw_bus.h>
50 #include <dev/ofw/ofw_bus_subr.h>
52 #include <dev/fdt/fdt_pinctrl.h>
56 #define PINS_PER_REG 8
57 #define BITS_PER_PIN 4
59 #define MAX_PIN_FUNC 5
63 const char *functions[MAX_PIN_FUNC];
67 const struct mv_pins *pins;
72 const static struct mv_pins ap806_pins[] = {
73 {"mpp0", {"gpio", "sdio", NULL, "spi0"}},
74 {"mpp1", {"gpio", "sdio", NULL, "spi0"}},
75 {"mpp2", {"gpio", "sdio", NULL, "spi0"}},
76 {"mpp3", {"gpio", "sdio", NULL, "spi0"}},
77 {"mpp4", {"gpio", "sdio", NULL, "i2c0"}},
78 {"mpp5", {"gpio", "sdio", NULL, "i2c0"}},
79 {"mpp6", {"gpio", "sdio", NULL, NULL}},
80 {"mpp7", {"gpio", "sdio", NULL, "uart1"}},
81 {"mpp8", {"gpio", "sdio", NULL, "uart1"}},
82 {"mpp9", {"gpio", "sdio", NULL, "spi0"}},
83 {"mpp10", {"gpio", "sdio", NULL, NULL}},
84 {"mpp11", {"gpio", NULL, NULL, "uart0"}},
85 {"mpp12", {"gpio", "sdio", "sdio", NULL}},
86 {"mpp13", {"gpio", NULL, NULL}},
87 {"mpp14", {"gpio", NULL, NULL}},
88 {"mpp15", {"gpio", NULL, NULL}},
89 {"mpp16", {"gpio", NULL, NULL}},
90 {"mpp17", {"gpio", NULL, NULL}},
91 {"mpp18", {"gpio", NULL, NULL}},
92 {"mpp19", {"gpio", NULL, NULL, "uart0", "sdio"}},
95 const struct mv_padconf ap806_padconf = {
96 .npins = nitems(ap806_pins),
101 struct mv_pinctrl_softc {
103 struct resource *res;
105 struct mv_padconf *padconf;
108 static struct resource_spec mv_pinctrl_res_spec[] = {
109 { SYS_RES_MEMORY, 0, RF_ACTIVE | RF_SHAREABLE },
113 static struct ofw_compat_data compat_data[] = {
114 #ifdef SOC_MARVELL_8K
115 {"marvell,ap806-pinctrl", (uintptr_t)&ap806_padconf},
120 #define RD4(sc, reg) bus_read_4((sc)->res, (reg))
121 #define WR4(sc, reg, val) bus_write_4((sc)->res, (reg), (val))
124 mv_pinctrl_configure_pin(struct mv_pinctrl_softc *sc, uint32_t pin,
127 uint32_t offset, shift, reg;
129 offset = (pin / PINS_PER_REG) * BITS_PER_PIN;
130 shift = (pin % PINS_PER_REG) * BITS_PER_PIN;
131 reg = RD4(sc, offset);
132 reg &= ~(PINS_MASK << shift);
133 reg |= function << shift;
134 WR4(sc, offset, reg);
138 mv_pinctrl_configure_pins(device_t dev, phandle_t cfgxref)
140 struct mv_pinctrl_softc *sc;
144 int i, pin_num, pin_func, npins;
146 sc = device_get_softc(dev);
147 node = OF_node_from_xref(cfgxref);
149 if (OF_getprop_alloc(node, "marvell,function",
150 (void **)&function) == -1)
153 npins = ofw_bus_string_list_to_array(node, "marvell,pins", &pins);
157 for (i = 0; i < npins; i++) {
158 for (pin_num = 0; pin_num < sc->padconf->npins; pin_num++) {
159 if (strcmp(pins[i], sc->padconf->pins[pin_num].name) == 0)
162 if (pin_num == sc->padconf->npins)
165 for (pin_func = 0; pin_func < MAX_PIN_FUNC; pin_func++)
166 if (sc->padconf->pins[pin_num].functions[pin_func] &&
167 strcmp(function, sc->padconf->pins[pin_num].functions[pin_func]) == 0)
170 if (pin_func == MAX_PIN_FUNC)
173 mv_pinctrl_configure_pin(sc, pin_num, pin_func);
182 mv_pinctrl_probe(device_t dev)
185 if (!ofw_bus_status_okay(dev))
188 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
191 device_set_desc(dev, "Marvell Pinctrl controller");
192 return (BUS_PROBE_DEFAULT);
196 mv_pinctrl_attach(device_t dev)
198 struct mv_pinctrl_softc *sc;
201 sc = device_get_softc(dev);
203 sc->padconf = (struct mv_padconf *)ofw_bus_search_compatible(dev, compat_data)->ocd_data;
205 if (bus_alloc_resources(dev, mv_pinctrl_res_spec, &sc->res) != 0) {
206 device_printf(dev, "cannot allocate resources for device\n");
210 node = ofw_bus_get_node(dev);
212 fdt_pinctrl_register(dev, "marvell,pins");
213 fdt_pinctrl_configure_tree(dev);
219 mv_pinctrl_detach(device_t dev)
225 static device_method_t mv_pinctrl_methods[] = {
226 /* Device interface */
227 DEVMETHOD(device_probe, mv_pinctrl_probe),
228 DEVMETHOD(device_attach, mv_pinctrl_attach),
229 DEVMETHOD(device_detach, mv_pinctrl_detach),
231 /* fdt_pinctrl interface */
232 DEVMETHOD(fdt_pinctrl_configure,mv_pinctrl_configure_pins),
237 static devclass_t mv_pinctrl_devclass;
239 static driver_t mv_pinctrl_driver = {
242 sizeof(struct mv_pinctrl_softc),
245 EARLY_DRIVER_MODULE(mv_pinctrl, simplebus, mv_pinctrl_driver,
246 mv_pinctrl_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);